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authorTristan Gingold2016-01-05 06:28:31 +0100
committerTristan Gingold2016-01-06 18:38:36 +0100
commitf3468eaa313e7cd16005e59a59392390a0bce9f4 (patch)
tree6fcb6dbc5dd4c1513d436e6aac445f67c060340f /src/vhdl/translate
parent4edf243e194587a5435b6386c9f936b6b6e9da73 (diff)
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if/else: add debug line for elsif part.
Diffstat (limited to 'src/vhdl/translate')
-rw-r--r--src/vhdl/translate/trans-chap8.adb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/vhdl/translate/trans-chap8.adb b/src/vhdl/translate/trans-chap8.adb
index 9bedbf3..d939ce4 100644
--- a/src/vhdl/translate/trans-chap8.adb
+++ b/src/vhdl/translate/trans-chap8.adb
@@ -304,6 +304,7 @@ package body Trans.Chap8 is
State_Jump (State_Allocate);
else
Open_Temp;
+ New_Debug_Line_Stmt (Get_Line_Number (Else_Clause));
Translate_If_Statement_State_Jumps (Else_Clause, Fall_State);
Close_Temp;
end if;
@@ -358,6 +359,7 @@ package body Trans.Chap8 is
(Get_Sequential_Statement_Chain (Else_Clause));
else
Open_Temp;
+ New_Debug_Line_Stmt (Get_Line_Number (Else_Clause));
Translate_If_Statement_Direct (Else_Clause);
Close_Temp;
end if;