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author | Tristan Gingold | 2014-01-05 15:12:54 +0100 |
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committer | Tristan Gingold | 2014-01-05 15:12:54 +0100 |
commit | 6ab63305d08ac83573aeb65bfd4dd266b8ad9aed (patch) | |
tree | 5ff6a4274dff7a8c9d5aaa2fa7fef6c8647c4715 /sem.adb | |
parent | d9e0243d4a38de3334069a1be94b423135c5a1ee (diff) | |
download | ghdl-6ab63305d08ac83573aeb65bfd4dd266b8ad9aed.tar.gz ghdl-6ab63305d08ac83573aeb65bfd4dd266b8ad9aed.tar.bz2 ghdl-6ab63305d08ac83573aeb65bfd4dd266b8ad9aed.zip |
Fix bug15702: require generic association in direct entity instantiation.
Diffstat (limited to 'sem.adb')
-rw-r--r-- | sem.adb | 16 |
1 files changed, 7 insertions, 9 deletions
@@ -358,19 +358,17 @@ package body Sem is -- ... -- Each local port (or subelement or slice therof) must be -- associated {VHDL87: exactly}{VHDL93: at most} once. - if Flags.Vhdl_Std = Vhdl_87 then + + -- GHDL: for a direct instantiation, follow rules of + -- LRM 1.1.1.1 Generic and LRM 1.1.1.2 Ports. + if Flags.Vhdl_Std = Vhdl_87 + or else Get_Kind (Inter_Parent) = Iir_Kind_Entity_Declaration + then Miss_Generic := Missing_Generic; Miss_Port := Missing_Port; else Miss_Generic := Missing_Allowed; - if Get_Kind (Inter_Parent) = Iir_Kind_Entity_Declaration then - -- FIXME: to be checked. - -- Ghdl: for a direct instantiation, follow rules of - -- LRM 1.1.1.2 Ports. - Miss_Port := Missing_Port; - else - Miss_Port := Missing_Allowed; - end if; + Miss_Port := Missing_Allowed; end if; when Iir_Kind_Binding_Indication => -- LRM 5.2.1.2 Generic map and port map aspects |