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author | Tristan Gingold | 2014-06-30 02:40:31 +0200 |
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committer | Tristan Gingold | 2014-06-30 02:40:31 +0200 |
commit | d6f65268ff859a80667978af2d4f4f1623ff6c66 (patch) | |
tree | d7dcf93413083cf2265342be0675736bcd5e8225 | |
parent | f2ece9d895747a95453add597cad3e6d6b1cd2f2 (diff) | |
download | ghdl-d6f65268ff859a80667978af2d4f4f1623ff6c66.tar.gz ghdl-d6f65268ff859a80667978af2d4f4f1623ff6c66.tar.bz2 ghdl-d6f65268ff859a80667978af2d4f4f1623ff6c66.zip |
Add many vhdl08 predefined operators and functions. Add std.env
-rw-r--r-- | configuration.adb | 2 | ||||
-rw-r--r-- | errorout.adb | 4 | ||||
-rw-r--r-- | evaluation.adb | 69 | ||||
-rw-r--r-- | iirs.ads | 74 | ||||
-rw-r--r-- | libraries/Makefile.inc | 2 | ||||
-rw-r--r-- | libraries/std/env.vhdl | 28 | ||||
-rw-r--r-- | libraries/std/env_body.vhdl | 65 | ||||
-rw-r--r-- | parse.adb | 41 | ||||
-rw-r--r-- | sem_decls.adb | 245 | ||||
-rw-r--r-- | sem_names.adb | 7 | ||||
-rw-r--r-- | simulate/execution.adb | 42 | ||||
-rw-r--r-- | std_names.adb | 2 | ||||
-rw-r--r-- | std_names.ads | 4 | ||||
-rw-r--r-- | tokens.ads | 2 | ||||
-rw-r--r-- | translate/translation.adb | 63 |
15 files changed, 508 insertions, 142 deletions
diff --git a/configuration.adb b/configuration.adb index 8c75f8a..9cd95b1 100644 --- a/configuration.adb +++ b/configuration.adb @@ -175,7 +175,7 @@ package body Configuration is -- LIB_UNIT requires a body. if Bod = Null_Iir then Error_Msg_Elab ("body of " & Disp_Node (Lib_Unit) - & " was never analyzed"); + & " was never analyzed", Lib_Unit); elsif Get_Date (Bod) < Get_Date (Unit) then Error_Msg_Elab (Disp_Node (Bod) & " is outdated"); Bod := Null_Iir; diff --git a/errorout.adb b/errorout.adb index 404c91f..e6a9a94 100644 --- a/errorout.adb +++ b/errorout.adb @@ -523,6 +523,10 @@ package body Errorout is return "PSL instantiation"; when Iir_Kind_Constant_Interface_Declaration => + if Get_Parent (Node) = Null_Iir then + -- For constant interface of predefined operator. + return "anonymous interface"; + end if; case Get_Kind (Get_Parent (Node)) is when Iir_Kind_Entity_Declaration | Iir_Kind_Block_Statement diff --git a/evaluation.adb b/evaluation.adb index 52c1af2..9f0bae4 100644 --- a/evaluation.adb +++ b/evaluation.adb @@ -466,7 +466,7 @@ package body Evaluation is return Build_Enumeration (Boolean'Pos (Get_Enum_Pos (Operand) = 0), Orig); - when Iir_Predefined_Bit_Array_Not => + when Iir_Predefined_TF_Array_Not => declare O_List : Iir_List; R_List : Iir_List; @@ -506,7 +506,7 @@ package body Evaluation is function Eval_Dyadic_Bit_Array_Operator (Expr : Iir; Left, Right : Iir; - Func : Iir_Predefined_Dyadic_Bit_Array_Functions) + Func : Iir_Predefined_Dyadic_TF_Array_Functions) return Iir is use Str_Table; @@ -522,7 +522,7 @@ package body Evaluation is else Id := Start; case Func is - when Iir_Predefined_Bit_Array_And => + when Iir_Predefined_TF_Array_And => for I in 1 .. Len loop case L_Str (I) is when '0' => @@ -533,7 +533,7 @@ package body Evaluation is raise Internal_Error; end case; end loop; - when Iir_Predefined_Bit_Array_Nand => + when Iir_Predefined_TF_Array_Nand => for I in 1 .. Len loop case L_Str (I) is when '0' => @@ -551,7 +551,7 @@ package body Evaluation is raise Internal_Error; end case; end loop; - when Iir_Predefined_Bit_Array_Or => + when Iir_Predefined_TF_Array_Or => for I in 1 .. Len loop case L_Str (I) is when '1' => @@ -562,7 +562,7 @@ package body Evaluation is raise Internal_Error; end case; end loop; - when Iir_Predefined_Bit_Array_Nor => + when Iir_Predefined_TF_Array_Nor => for I in 1 .. Len loop case L_Str (I) is when '1' => @@ -580,7 +580,7 @@ package body Evaluation is raise Internal_Error; end case; end loop; - when Iir_Predefined_Bit_Array_Xor => + when Iir_Predefined_TF_Array_Xor => for I in 1 .. Len loop case L_Str (I) is when '1' => @@ -1136,7 +1136,8 @@ package body Evaluation is (not (Get_Enum_Pos (Left) = 1 xor Get_Enum_Pos (Right) = 1), Orig); - when Iir_Predefined_Dyadic_Bit_Array_Functions => + when Iir_Predefined_Dyadic_TF_Array_Functions => + -- FIXME: only for bit ? return Eval_Dyadic_Bit_Array_Operator (Orig, Left, Right, Func); when Iir_Predefined_Universal_R_I_Mul => @@ -1167,13 +1168,7 @@ package body Evaluation is when Iir_Predefined_Array_Less | Iir_Predefined_Array_Less_Equal | Iir_Predefined_Array_Greater - | Iir_Predefined_Array_Greater_Equal - | Iir_Predefined_Boolean_Array_And - | Iir_Predefined_Boolean_Array_Nand - | Iir_Predefined_Boolean_Array_Or - | Iir_Predefined_Boolean_Array_Nor - | Iir_Predefined_Boolean_Array_Xor - | Iir_Predefined_Boolean_Array_Xnor => + | Iir_Predefined_Array_Greater_Equal => -- FIXME: todo. Error_Internal (Orig, "eval_dyadic_operator: " & Iir_Predefined_Functions'Image (Func)); @@ -1198,8 +1193,7 @@ package body Evaluation is | Iir_Predefined_Record_Inequality | Iir_Predefined_Access_Equality | Iir_Predefined_Access_Inequality - | Iir_Predefined_Bit_Array_Not - | Iir_Predefined_Boolean_Array_Not + | Iir_Predefined_TF_Array_Not | Iir_Predefined_Now_Function | Iir_Predefined_Deallocate | Iir_Predefined_Write @@ -1232,6 +1226,15 @@ package body Evaluation is Error_Internal (Orig, "eval_dyadic_operator: " & Iir_Predefined_Functions'Image (Func)); + when Iir_Predefined_Bit_Condition => + raise Internal_Error; + + when Iir_Predefined_Array_Minimum + | Iir_Predefined_Array_Maximum + | Iir_Predefined_Vector_Minimum + | Iir_Predefined_Vector_Maximum => + raise Internal_Error; + when Iir_Predefined_Std_Ulogic_Match_Equality | Iir_Predefined_Std_Ulogic_Match_Inequality | Iir_Predefined_Std_Ulogic_Match_Less @@ -1250,6 +1253,38 @@ package body Evaluation is | Iir_Predefined_Time_To_String_Unit => -- TODO raise Internal_Error; + + when Iir_Predefined_TF_Array_Element_And + | Iir_Predefined_TF_Element_Array_And + | Iir_Predefined_TF_Array_Element_Or + | Iir_Predefined_TF_Element_Array_Or + | Iir_Predefined_TF_Array_Element_Nand + | Iir_Predefined_TF_Element_Array_Nand + | Iir_Predefined_TF_Array_Element_Nor + | Iir_Predefined_TF_Element_Array_Nor + | Iir_Predefined_TF_Array_Element_Xor + | Iir_Predefined_TF_Element_Array_Xor + | Iir_Predefined_TF_Array_Element_Xnor + | Iir_Predefined_TF_Element_Array_Xnor => + -- TODO + raise Internal_Error; + + when Iir_Predefined_TF_Reduction_And + | Iir_Predefined_TF_Reduction_Or + | Iir_Predefined_TF_Reduction_Nand + | Iir_Predefined_TF_Reduction_Nor + | Iir_Predefined_TF_Reduction_Xor + | Iir_Predefined_TF_Reduction_Xnor + | Iir_Predefined_TF_Reduction_Not => + -- TODO + raise Internal_Error; + + when Iir_Predefined_Bit_Array_Match_Equality + | Iir_Predefined_Bit_Array_Match_Inequality + | Iir_Predefined_Std_Ulogic_Array_Match_Equality + | Iir_Predefined_Std_Ulogic_Array_Match_Inequality => + -- TODO + raise Internal_Error; end case; exception when Constraint_Error => @@ -3131,6 +3131,8 @@ package Iirs is Iir_Predefined_Bit_Match_Greater, Iir_Predefined_Bit_Match_Greater_Equal, + Iir_Predefined_Bit_Condition, + Iir_Predefined_Bit_Rising_Edge, Iir_Predefined_Bit_Falling_Edge, @@ -3240,6 +3242,11 @@ package Iirs is Iir_Predefined_Element_Array_Concat, Iir_Predefined_Element_Element_Concat, + Iir_Predefined_Array_Minimum, + Iir_Predefined_Array_Maximum, + Iir_Predefined_Vector_Minimum, + Iir_Predefined_Vector_Maximum, + -- Predefined shift operators. Iir_Predefined_Array_Sll, Iir_Predefined_Array_Srl, @@ -3248,22 +3255,40 @@ package Iirs is Iir_Predefined_Array_Rol, Iir_Predefined_Array_Ror, - -- Predefined operators for one dimensional array - Iir_Predefined_Bit_Array_And, - Iir_Predefined_Bit_Array_Or, - Iir_Predefined_Bit_Array_Nand, - Iir_Predefined_Bit_Array_Nor, - Iir_Predefined_Bit_Array_Xor, - Iir_Predefined_Bit_Array_Xnor, - Iir_Predefined_Bit_Array_Not, - - Iir_Predefined_Boolean_Array_And, - Iir_Predefined_Boolean_Array_Or, - Iir_Predefined_Boolean_Array_Nand, - Iir_Predefined_Boolean_Array_Nor, - Iir_Predefined_Boolean_Array_Xor, - Iir_Predefined_Boolean_Array_Xnor, - Iir_Predefined_Boolean_Array_Not, + -- Predefined operators for one dimensional array. + -- For bit and boolean type, the operations are the same. For a neutral + -- noun, we use TF (for True/False) instead of Bit, Boolean or Logic. + Iir_Predefined_TF_Array_And, + Iir_Predefined_TF_Array_Or, + Iir_Predefined_TF_Array_Nand, + Iir_Predefined_TF_Array_Nor, + Iir_Predefined_TF_Array_Xor, + Iir_Predefined_TF_Array_Xnor, + Iir_Predefined_TF_Array_Not, + + Iir_Predefined_TF_Reduction_And, + Iir_Predefined_TF_Reduction_Or, + Iir_Predefined_TF_Reduction_Nand, + Iir_Predefined_TF_Reduction_Nor, + Iir_Predefined_TF_Reduction_Xor, + Iir_Predefined_TF_Reduction_Xnor, + Iir_Predefined_TF_Reduction_Not, + + Iir_Predefined_TF_Array_Element_And, + Iir_Predefined_TF_Element_Array_And, + Iir_Predefined_TF_Array_Element_Or, + Iir_Predefined_TF_Element_Array_Or, + Iir_Predefined_TF_Array_Element_Nand, + Iir_Predefined_TF_Element_Array_Nand, + Iir_Predefined_TF_Array_Element_Nor, + Iir_Predefined_TF_Element_Array_Nor, + Iir_Predefined_TF_Array_Element_Xor, + Iir_Predefined_TF_Element_Array_Xor, + Iir_Predefined_TF_Array_Element_Xnor, + Iir_Predefined_TF_Element_Array_Xnor, + + Iir_Predefined_Bit_Array_Match_Equality, + Iir_Predefined_Bit_Array_Match_Inequality, -- Predefined attribute functions. Iir_Predefined_Attribute_Image, @@ -3308,6 +3333,9 @@ package Iirs is Iir_Predefined_Std_Ulogic_Match_Greater, Iir_Predefined_Std_Ulogic_Match_Greater_Equal, + Iir_Predefined_Std_Ulogic_Array_Match_Equality, + Iir_Predefined_Std_Ulogic_Array_Match_Inequality, + -- Predefined function. Iir_Predefined_Now_Function ); @@ -3319,14 +3347,14 @@ package Iirs is subtype Iir_Predefined_Pure_Functions is Iir_Predefined_Functions range Iir_Predefined_Boolean_And .. Iir_Predefined_Attribute_Driving_Value; - subtype Iir_Predefined_Dyadic_Bit_Array_Functions + subtype Iir_Predefined_Dyadic_TF_Array_Functions is Iir_Predefined_Functions range - Iir_Predefined_Bit_Array_And .. - --Iir_Predefined_Bit_Array_Or - --Iir_Predefined_Bit_Array_Nand - --Iir_Predefined_Bit_Array_Nor - --Iir_Predefined_Bit_Array_Xor - Iir_Predefined_Bit_Array_Xnor; + Iir_Predefined_TF_Array_And .. + --Iir_Predefined_TF_Array_Or + --Iir_Predefined_TF_Array_Nand + --Iir_Predefined_TF_Array_Nor + --Iir_Predefined_TF_Array_Xor + Iir_Predefined_TF_Array_Xnor; subtype Iir_Predefined_Shift_Functions is Iir_Predefined_Functions range Iir_Predefined_Array_Sll .. diff --git a/libraries/Makefile.inc b/libraries/Makefile.inc index fed7457..5d1cc76 100644 --- a/libraries/Makefile.inc +++ b/libraries/Makefile.inc @@ -70,7 +70,7 @@ ieee2008/fixed_pkg.vhdl STD87_BSRCS := $(STD_SRCS:.vhdl=.v87) STD93_BSRCS := $(STD_SRCS:.vhdl=.v93) -STD08_BSRCS := $(STD_SRCS:.vhdl=.v08) +STD08_BSRCS := $(STD_SRCS:.vhdl=.v08) std/env.vhdl std/env_body.vhdl IEEE87_BSRCS := $(IEEE_SRCS:.vhdl=.v87) IEEE93_BSRCS := $(IEEE_SRCS:.vhdl=.v93) $(MATH_SRCS) SYNOPSYS87_BSRCS := $(SYNOPSYS_BSRCS) diff --git a/libraries/std/env.vhdl b/libraries/std/env.vhdl new file mode 100644 index 0000000..35cbb02 --- /dev/null +++ b/libraries/std/env.vhdl @@ -0,0 +1,28 @@ +-- Std.Env package declaration. This file is part of GHDL. +-- This file was written from the clause 14.3 of the VHDL LRM. +-- Copyright (C) 2014 Tristan Gingold +-- +-- GHDL is free software; you can redistribute it and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation; either version 2, or (at your option) any later +-- version. +-- +-- GHDL is distributed in the hope that it will be useful, but WITHOUT ANY +-- WARRANTY; without even the implied warranty of MERCHANTABILITY or +-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with GCC; see the file COPYING. If not, write to the Free +-- Software Foundation, 59 Temple Place - Suite 330, Boston, MA +-- 02111-1307, USA. + +package Env is + procedure Stop (Status : Integer); + procedure Stop; + + procedure Finish (status : Integer); + procedure Finish; + + function Resolution_Limit return Delay_Length; +end package Env; diff --git a/libraries/std/env_body.vhdl b/libraries/std/env_body.vhdl new file mode 100644 index 0000000..d36519f --- /dev/null +++ b/libraries/std/env_body.vhdl @@ -0,0 +1,65 @@ +-- Std.Env package declaration. This file is part of GHDL. +-- This file was written from the clause 14.3 of the VHDL LRM. +-- Copyright (C) 2014 Tristan Gingold +-- +-- GHDL is free software; you can redistribute it and/or modify it under +-- the terms of the GNU General Public License as published by the Free +-- Software Foundation; either version 2, or (at your option) any later +-- version. +-- +-- GHDL is distributed in the hope that it will be useful, but WITHOUT ANY +-- WARRANTY; without even the implied warranty of MERCHANTABILITY or +-- FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License +-- for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with GCC; see the file COPYING. If not, write to the Free +-- Software Foundation, 59 Temple Place - Suite 330, Boston, MA +-- 02111-1307, USA. + +package body Env is + procedure control_simulation (Is_Stop : Boolean; + Has_Status : Boolean; + Status : Integer); + attribute foreign of control_simulation : procedure is "GHDL intrinsic"; + + procedure control_simulation (Is_Stop : Boolean; + Has_Status : Boolean; + Status : Integer) is + begin + assert false report "must not be called" severity failure; + end control_simulation; + + procedure Stop (Status : Integer) is + begin + control_simulation (True, True, Status); + end Stop; + + procedure Stop is + begin + control_simulation (True, False, -1); + end Stop; + + procedure Finish (status : integer) is + begin + control_simulation (False, True, Status); + end Finish; + + procedure Finish is + begin + control_simulation (False, False, -1); + end Finish; + + function Get_Resolution_Limit return Delay_Length; + attribute foreign of Get_Resolution_Limit : function is "GHDL intrinsic"; + + function Get_Resolution_Limit return Delay_Length is + begin + assert false report "must not be called" severity failure; + end Get_Resolution_Limit; + + function Resolution_Limit return Delay_Length is + begin + return Get_Resolution_Limit; + end Resolution_Limit; +end package body Env; @@ -1674,7 +1674,9 @@ package body Parse is end if; Set_Identifier (Decl, Ident); Set_Location (Decl, Loc); + Parse_Declarative_Part (Res); + Expect (Tok_End); Scan_Expect (Tok_Protected); if Get_Kind (Res) = Iir_Kind_Protected_Type_Body then @@ -3709,8 +3711,16 @@ package body Parse is Error_Msg_Parse ("'-' and '+' are not allowed in primary, use parenthesis"); return Parse_Simple_Expression; + when Tok_Comma + | Tok_Semi_Colon + | Tok_Eof + | Tok_End => + -- Token not to be skipped + Unexpected ("primary"); + return Null_Iir; when others => Unexpected ("primary"); + Scan; return Null_Iir; end case; end Parse_Primary; @@ -4079,9 +4089,27 @@ package body Parse is -- precond : next token -- postcond: next token - function Parse_Expression return Iir_Expression is + -- + -- LRM08 9.1 General + -- expression ::= condition_operator primary + -- | logical_expression + function Parse_Expression return Iir_Expression + is + Res : Iir; begin - return Parse_Expression_Rhs (Parse_Relation); + if Current_Token = Tok_Condition then + Res := Create_Iir (Iir_Kind_Condition_Operator); + Set_Location (Res); + + -- Skip '??' + Scan; + + Set_Operand (Res, Parse_Primary); + else + Res := Parse_Expression_Rhs (Parse_Relation); + end if; + + return Res; end Parse_Expression; -- precond : next token @@ -6467,8 +6495,15 @@ package body Parse is if Flags.Vhdl_Std = Vhdl_87 then Error_Msg_Parse ("'package' keyword not allowed here by vhdl 87"); end if; - Scan_Expect (Tok_Body); + -- Skip 'package' Scan; + + if Current_Token /= Tok_Body then + Error_Msg_Parse ("missing 'body' after 'package'"); + else + -- Skip 'body' + Scan; + end if; end if; Check_End_Name (Res); Expect (Tok_Semi_Colon); diff --git a/sem_decls.adb b/sem_decls.adb index 899a851..1f96fb7 100644 --- a/sem_decls.adb +++ b/sem_decls.adb @@ -367,6 +367,7 @@ package body Sem_Decls is Set_Parent (Proc, Get_Parent (Decl)); Set_Identifier (Proc, Std_Names.Name_File_Open); Set_Type_Reference (Proc, Decl); + Set_Visible_Flag (Proc, True); Build_Init (Last_Interface); case I is when 1 => @@ -423,6 +424,7 @@ package body Sem_Decls is Set_Parent (Proc, Get_Parent (Decl)); Set_Implicit_Definition (Proc, Iir_Predefined_File_Close); Set_Type_Reference (Proc, Decl); + Set_Visible_Flag (Proc, True); Build_Init (Last_Interface); Inter := Create_Iir (Iir_Kind_File_Interface_Declaration); Set_Identifier (Inter, Std_Names.Name_F); @@ -448,6 +450,7 @@ package body Sem_Decls is Set_Location (Proc, Loc); Set_Parent (Proc, Get_Parent (Decl)); Set_Type_Reference (Proc, Decl); + Set_Visible_Flag (Proc, True); Build_Init (Last_Interface); Inter := Create_Iir (File_Interface_Kind); Set_Identifier (Inter, Std_Names.Name_F); @@ -487,6 +490,7 @@ package body Sem_Decls is Set_Location (Proc, Loc); Set_Parent (Proc, Get_Parent (Decl)); Set_Type_Reference (Proc, Decl); + Set_Visible_Flag (Proc, True); Build_Init (Last_Interface); Inter := Create_Iir (File_Interface_Kind); Set_Identifier (Inter, Std_Names.Name_F); @@ -513,8 +517,9 @@ package body Sem_Decls is Func := Create_Iir (Iir_Kind_Implicit_Function_Declaration); Set_Identifier (Func, Std_Names.Name_Endfile); Set_Location (Func, Loc); - Set_Parent (Proc, Get_Parent (Decl)); - Set_Type_Reference (Proc, Decl); + Set_Parent (Func, Get_Parent (Decl)); + Set_Type_Reference (Func, Decl); + Set_Visible_Flag (Func, True); Build_Init (Last_Interface); Inter := Create_Iir (File_Interface_Kind); Set_Identifier (Inter, Std_Names.Name_F); @@ -569,6 +574,7 @@ package body Sem_Decls is Set_Return_Type (Operation, Return_Type); Set_Implicit_Definition (Operation, Def); Set_Identifier (Operation, Name); + Set_Visible_Flag (Operation, True); Compute_Subprogram_Hash (Operation); Insert_Incr (Last, Operation); end Add_Operation; @@ -602,6 +608,17 @@ package body Sem_Decls is Add_Operation (Name, Def, Left, Type_Definition); end Add_Min_Max; + procedure Add_Vector_Min_Max + (Name : Name_Id; Def : Iir_Predefined_Functions) + is + Left : Iir; + begin + Left := Create_Anonymous_Interface (Type_Definition); + Set_Identifier (Left, Name_L); + Add_Operation + (Name, Def, Left, Get_Element_Subtype (Type_Definition)); + end Add_Vector_Min_Max; + procedure Add_Shift_Operators is Inter_Chain : Iir_Constant_Interface_Declaration; @@ -657,6 +674,10 @@ package body Sem_Decls is Add_Min_Max (Name_Minimum, Iir_Predefined_Enum_Minimum); Add_Min_Max (Name_Maximum, Iir_Predefined_Enum_Maximum); + -- LRM08 9.2.3 Relational operators + -- The matching relational operators are predefined for the + -- [predefined type BIT and for the] type STD_ULOGIC defined + -- in package STD_LOGIC_1164. if Type_Definition = Ieee.Std_Logic_1164.Std_Ulogic_Type then Add_Binary (Name_Op_Match_Equality, Iir_Predefined_Std_Ulogic_Match_Equality); @@ -676,8 +697,11 @@ package body Sem_Decls is when Iir_Kind_Array_Type_Definition | Iir_Kind_Array_Subtype_Definition => declare - Inter_Chain : Iir; Element_Type : Iir; + + Element_Array_Inter_Chain : Iir; + Array_Element_Inter_Chain : Iir; + Element_Element_Inter_Chain : Iir; begin Add_Relational (Name_Op_Equality, Iir_Predefined_Array_Equality); @@ -693,37 +717,54 @@ package body Sem_Decls is (Name_Op_Less, Iir_Predefined_Array_Less); Add_Relational (Name_Op_Less_Equal, Iir_Predefined_Array_Less_Equal); + + -- LRM08 5.3.2.4 Predefined operations on array types + -- Given a type declaration that declares a discrete array + -- type T, the following operatons are implicitly declared + -- immediately following the type declaration: + -- function MINIMUM (L, R : T) return T; + -- function MAXIMUM (L, R : T) return T; + if Vhdl_Std >= Vhdl_08 then + Add_Min_Max (Name_Maximum, Iir_Predefined_Array_Maximum); + Add_Min_Max (Name_Minimum, Iir_Predefined_Array_Minimum); + end if; end if; Element_Type := Get_Element_Subtype (Type_Definition); if Is_One_Dimensional (Type_Definition) then + -- LRM93 7.2.4 Adding operators + -- The concatenation operator & is predefined for any + -- one-dimensional array type. Add_Operation (Name_Op_Concatenation, Iir_Predefined_Array_Array_Concat, Binary_Chain, Type_Definition); - Inter_Chain := Create_Anonymous_Interface (Element_Type); - Set_Chain (Inter_Chain, Unary_Chain); + Element_Array_Inter_Chain := + Create_Anonymous_Interface (Element_Type); + Set_Chain (Element_Array_Inter_Chain, Unary_Chain); Add_Operation (Name_Op_Concatenation, Iir_Predefined_Element_Array_Concat, - Inter_Chain, - Type_Definition); + Element_Array_Inter_Chain, + Type_Definition); - Inter_Chain := Create_Anonymous_Interface (Type_Definition); - Set_Chain (Inter_Chain, + Array_Element_Inter_Chain := + Create_Anonymous_Interface (Type_Definition); + Set_Chain (Array_Element_Inter_Chain, Create_Anonymous_Interface (Element_Type)); Add_Operation (Name_Op_Concatenation, Iir_Predefined_Array_Element_Concat, - Inter_Chain, + Array_Element_Inter_Chain, Type_Definition); - Inter_Chain := Create_Anonymous_Interface (Element_Type); - Set_Chain (Inter_Chain, + Element_Element_Inter_Chain := + Create_Anonymous_Interface (Element_Type); + Set_Chain (Element_Element_Inter_Chain, Create_Anonymous_Interface (Element_Type)); Add_Operation (Name_Op_Concatenation, Iir_Predefined_Element_Element_Concat, - Inter_Chain, + Element_Element_Inter_Chain, Type_Definition); -- LRM08 5.3.2.4 Predefined operations on array type @@ -745,35 +786,157 @@ package body Sem_Decls is Unary_Chain, String_Type_Definition); end if; - end if; - if Is_Discrete_Array (Type_Definition) then - if Element_Type = Std_Package.Boolean_Type_Definition then - Add_Unary (Name_Not, Iir_Predefined_Boolean_Array_Not); - - Add_Binary (Name_And, Iir_Predefined_Boolean_Array_And); - Add_Binary (Name_Or, Iir_Predefined_Boolean_Array_Or); - Add_Binary (Name_Nand, Iir_Predefined_Boolean_Array_Nand); - Add_Binary (Name_Nor, Iir_Predefined_Boolean_Array_Nor); - Add_Binary (Name_Xor, Iir_Predefined_Boolean_Array_Xor); + -- LRM08 5.3.2.4 Predefined operations on array types + -- In addition, given a type declaration that declares a + -- one-dimensional array type T whose elements are of a + -- sclar type E, the following operations are implicitly + -- declared immediately following the type declaration: + -- function MINIMUM (L : T) return E; + -- function MAXIMUM (L : T) return E; + if Vhdl_Std >= Vhdl_08 + and then (Get_Kind (Element_Type) in + Iir_Kinds_Scalar_Type_Definition) + then + Add_Vector_Min_Max + (Name_Maximum, Iir_Predefined_Vector_Maximum); + Add_Vector_Min_Max + (Name_Minimum, Iir_Predefined_Vector_Minimum); + end if; + + if Element_Type = Std_Package.Boolean_Type_Definition + or else Element_Type = Std_Package.Bit_Type_Definition + then + -- LRM93 7.2.1 Logical operators + -- LRM08 9.2.2 Logical operators + -- The binary logical operators AND, OR, NAND, NOR, XOR, + -- and XNOR, and the unary logical operator NOT are + -- defined for predefined types BIT and BOOLEAN. They + -- are also defined for any one-dimensional array type + -- whose element type is BIT or BOOLEAN. + + Add_Unary (Name_Not, Iir_Predefined_TF_Array_Not); + + Add_Binary (Name_And, Iir_Predefined_TF_Array_And); + Add_Binary (Name_Or, Iir_Predefined_TF_Array_Or); + Add_Binary (Name_Nand, Iir_Predefined_TF_Array_Nand); + Add_Binary (Name_Nor, Iir_Predefined_TF_Array_Nor); + Add_Binary (Name_Xor, Iir_Predefined_TF_Array_Xor); if Flags.Vhdl_Std > Vhdl_87 then - Add_Binary - (Name_Xnor, Iir_Predefined_Boolean_Array_Xnor); + Add_Binary (Name_Xnor, Iir_Predefined_TF_Array_Xnor); + -- LRM93 7.2.3 Shift operators + -- The shift operators SLL, SRL, SLA, SRA, ROL and + -- ROR are defined for any one-dimensional array type + -- whose element type is either of the predefined + -- types BIT or BOOLEAN. Add_Shift_Operators; end if; - elsif Element_Type = Std_Package.Bit_Type_Definition then - Add_Unary (Name_Not, Iir_Predefined_Bit_Array_Not); - - Add_Binary (Name_And, Iir_Predefined_Bit_Array_And); - Add_Binary (Name_Or, Iir_Predefined_Bit_Array_Or); - Add_Binary (Name_Nand, Iir_Predefined_Bit_Array_Nand); - Add_Binary (Name_Nor, Iir_Predefined_Bit_Array_Nor); - Add_Binary (Name_Xor, Iir_Predefined_Bit_Array_Xor); - if Flags.Vhdl_Std > Vhdl_87 then - Add_Binary (Name_Xnor, Iir_Predefined_Bit_Array_Xnor); - Add_Shift_Operators; + -- LRM08 9.2.2 Logical operators + -- For the binary operators AND, OR, NAND, NOR, XOR and + -- XNOR, the operands shall both be [of the same base + -- type,] or one operand shall be of a scalar type and + -- the other operand shall be a one-dimensional array + -- whose element type is the scalar type. The result + -- type is the same as the base type of the operands if + -- [both operands are scalars of the same base type or] + -- both operands are arrays, or the same as the base type + -- of the array operand if one operand is a scalar and + -- the other operand is an array. + if Flags.Vhdl_Std >= Vhdl_08 then + Add_Operation + (Name_And, Iir_Predefined_TF_Element_Array_And, + Element_Array_Inter_Chain, Type_Definition); + Add_Operation + (Name_And, Iir_Predefined_TF_Array_Element_And, + Array_Element_Inter_Chain, Type_Definition); + Add_Operation + (Name_Or, Iir_Predefined_TF_Element_Array_Or, + Element_Array_Inter_Chain, Type_Definition); + Add_Operation + (Name_Or, Iir_Predefined_TF_Array_Element_Or, + Array_Element_Inter_Chain, Type_Definition); + Add_Operation + (Name_Nand, Iir_Predefined_TF_Element_Array_Nand, + Element_Array_Inter_Chain, Type_Definition); + Add_Operation + (Name_Nand, Iir_Predefined_TF_Array_Element_Nand, + Array_Element_Inter_Chain, Type_Definition); + Add_Operation + (Name_Nor, Iir_Predefined_TF_Element_Array_Nor, + Element_Array_Inter_Chain, Type_Definition); + Add_Operation + (Name_Nor, Iir_Predefined_TF_Array_Element_Nor, + Array_Element_Inter_Chain, Type_Definition); + Add_Operation + (Name_Xor, Iir_Predefined_TF_Element_Array_Xor, + Element_Array_Inter_Chain, Type_Definition); + Add_Operation + (Name_Xor, Iir_Predefined_TF_Array_Element_Xor, + Array_Element_Inter_Chain, Type_Definition); + Add_Operation + (Name_Xnor, Iir_Predefined_TF_Element_Array_Xnor, + Element_Array_Inter_Chain, Type_Definition); + Add_Operation + (Name_Xnor, Iir_Predefined_TF_Array_Element_Xnor, + Array_Element_Inter_Chain, Type_Definition); + end if; + + if Flags.Vhdl_Std >= Vhdl_08 then + -- LRM08 9.2.2 Logical operations + -- The unary logical operators AND, OR, NAND, NOR, + -- XOR, and XNOR are referred to as logical reduction + -- operators. The logical reduction operators are + -- predefined for any one-dimensional array type whose + -- element type is BIT or BOOLEAN. The result type + -- for the logical reduction operators is the same as + -- the element type of the operand. + Add_Operation + (Name_And, Iir_Predefined_TF_Reduction_And, + Unary_Chain, Element_Type); + Add_Operation + (Name_Or, Iir_Predefined_TF_Reduction_Or, + Unary_Chain, Element_Type); + Add_Operation + (Name_Nand, Iir_Predefined_TF_Reduction_Nand, + Unary_Chain, Element_Type); + Add_Operation + (Name_Nor, Iir_Predefined_TF_Reduction_Nor, + Unary_Chain, Element_Type); + Add_Operation + (Name_Xor, Iir_Predefined_TF_Reduction_Xor, + Unary_Chain, Element_Type); + Add_Operation + (Name_Xnor, Iir_Predefined_TF_Reduction_Xnor, + Unary_Chain, Element_Type); + end if; + end if; + + -- LRM08 9.2.3 Relational operators + -- The matching equality and matching inequality operatotrs + -- are also defined for any one-dimensional array type + -- whose element type is BIT or STD_ULOGIC. + if Flags.Vhdl_Std >= Vhdl_08 then + if Element_Type = Std_Package.Bit_Type_Definition then + Add_Operation + (Name_Op_Match_Equality, + Iir_Predefined_Bit_Array_Match_Equality, + Binary_Chain, Element_Type); + Add_Operation + (Name_Op_Match_Inequality, + Iir_Predefined_Bit_Array_Match_Inequality, + Binary_Chain, Element_Type); + elsif Element_Type = Ieee.Std_Logic_1164.Std_Ulogic_Type + then + Add_Operation + (Name_Op_Match_Equality, + Iir_Predefined_Std_Ulogic_Array_Match_Equality, + Binary_Chain, Element_Type); + Add_Operation + (Name_Op_Match_Inequality, + Iir_Predefined_Std_Ulogic_Array_Match_Inequality, + Binary_Chain, Element_Type); end if; end if; end if; @@ -801,6 +964,7 @@ package body Sem_Decls is --Set_Purity_State (Deallocate_Proc, Impure); Set_Wait_State (Deallocate_Proc, False); Set_Type_Reference (Deallocate_Proc, Decl); + Set_Visible_Flag (Deallocate_Proc, True); Set_Interface_Declaration_Chain (Deallocate_Proc, Var_Interface); @@ -1015,6 +1179,13 @@ package body Sem_Decls is Iir_Predefined_Bit_Match_Greater); Add_Binary (Name_Op_Match_Greater_Equal, Iir_Predefined_Bit_Match_Greater_Equal); + + -- LRM08 9.2.9 Condition operator + -- The unary operator ?? is predefined for type BIT defined in + -- package STANDARD. + Add_Operation (Name_Op_Condition, Iir_Predefined_Bit_Condition, + Unary_Chain, Std_Package.Boolean_Type_Definition); + end if; elsif Decl = Std_Package.Universal_Real_Type then declare @@ -2495,7 +2666,7 @@ package body Sem_Decls is when Iir_Kind_Implicit_Function_Declaration | Iir_Kind_Implicit_Procedure_Declaration => Sem_Scopes.Add_Name (Decl); - Name_Visible (Decl); + -- Implicit subprogram are already visible. when Iir_Kind_Non_Object_Alias_Declaration => -- Added by Sem_Alias_Declaration. Need to check that no -- existing attribute specification apply to them. diff --git a/sem_names.adb b/sem_names.adb index 48f4d28..bc9b0ed 100644 --- a/sem_names.adb +++ b/sem_names.adb @@ -2033,6 +2033,10 @@ package body Sem_Names is when Iir_Kinds_Function_Declaration => Sem_Parenthesis_Function (Prefix); if Res = Null_Iir then + Error_Msg_Sem + ("cannot match " & Disp_Node (Prefix) & " with actuals", + Name); + -- Display error message. declare Match : Boolean; begin @@ -2040,9 +2044,6 @@ package body Sem_Names is (Get_Interface_Declaration_Chain (Prefix), Assoc_Chain, True, Missing_Parameter, Name, Match); end; - Error_Msg_Sem - ("prefix is neither a function name " - & "nor can it be sliced or indexed", Name); end if; when Iir_Kinds_Object_Declaration diff --git a/simulate/execution.adb b/simulate/execution.adb index a3d8c24..3be904f 100644 --- a/simulate/execution.adb +++ b/simulate/execution.adb @@ -21,6 +21,7 @@ with Ada.Text_IO; use Ada.Text_IO; with System; with Grt.Types; use Grt.Types; with Errorout; use Errorout; +with Std_Package; with Evaluation; with Iirs_Utils; use Iirs_Utils; with Annotations; use Annotations; @@ -803,44 +804,38 @@ package body Execution is Eval_Right; Result := Create_F64_Value (Left.F64 * Ghdl_F64 (Right.I64)); - when Iir_Predefined_Bit_Array_And - | Iir_Predefined_Boolean_Array_And => + when Iir_Predefined_TF_Array_And => Eval_Array; for I in Result.Val_Array.V'Range loop Result.Val_Array.V (I).B2 := Result.Val_Array.V (I).B2 and Right.Val_Array.V (I).B2; end loop; - when Iir_Predefined_Bit_Array_Nand - | Iir_Predefined_Boolean_Array_Nand => + when Iir_Predefined_TF_Array_Nand => Eval_Array; for I in Result.Val_Array.V'Range loop Result.Val_Array.V (I).B2 := not (Result.Val_Array.V (I).B2 and Right.Val_Array.V (I).B2); end loop; - when Iir_Predefined_Bit_Array_Or - | Iir_Predefined_Boolean_Array_Or => + when Iir_Predefined_TF_Array_Or => Eval_Array; for I in Result.Val_Array.V'Range loop Result.Val_Array.V (I).B2 := Result.Val_Array.V (I).B2 or Right.Val_Array.V (I).B2; end loop; - when Iir_Predefined_Bit_Array_Nor - | Iir_Predefined_Boolean_Array_Nor => + when Iir_Predefined_TF_Array_Nor => Eval_Array; for I in Result.Val_Array.V'Range loop Result.Val_Array.V (I).B2 := not (Result.Val_Array.V (I).B2 or Right.Val_Array.V (I).B2); end loop; - when Iir_Predefined_Bit_Array_Xor - | Iir_Predefined_Boolean_Array_Xor => + when Iir_Predefined_TF_Array_Xor => Eval_Array; for I in Result.Val_Array.V'Range loop Result.Val_Array.V (I).B2 := Result.Val_Array.V (I).B2 xor Right.Val_Array.V (I).B2; end loop; - when Iir_Predefined_Bit_Array_Not - | Iir_Predefined_Boolean_Array_Not => + when Iir_Predefined_TF_Array_Not => -- Need to copy as the result is modified. Result := Unshare (Operand, Expr_Pool'Access); for I in Result.Val_Array.V'Range loop @@ -3137,6 +3132,23 @@ package body Execution is end if; end Adjust_Up_Link_For_Protected_Object; + function Execute_Foreign_Function_Call + (Block: Block_Instance_Acc; Expr : Iir; Imp : Iir) + return Iir_Value_Literal_Acc + is + pragma Unreferenced (Block); + begin + case Get_Identifier (Imp) is + when Std_Names.Name_Get_Resolution_Limit => + return Create_I64_Value + (Ghdl_I64 + (Evaluation.Get_Physical_Value (Std_Package.Time_Base))); + when others => + Error_Msg_Exec ("unsupported foreign function call", Expr); + end case; + return null; + end Execute_Foreign_Function_Call; + -- BLOCK is the block instance in which the function call appears. function Execute_Function_Call (Block: Block_Instance_Acc; Expr: Iir; Imp : Iir) @@ -3168,7 +3180,11 @@ package body Execution is Error_Kind ("execute_subprogram_call_init", Expr); end case; - Res := Execute_Function_Body (Subprg_Block, Imp); + if Get_Foreign_Flag (Imp) then + Res := Execute_Foreign_Function_Call (Subprg_Block, Expr, Imp); + else + Res := Execute_Function_Body (Subprg_Block, Imp); + end if; -- Unfortunately, we don't know where the result has been allocated, -- so copy it before releasing the instance pool. diff --git a/std_names.adb b/std_names.adb index 67fb47b..98b4f06 100644 --- a/std_names.adb +++ b/std_names.adb @@ -265,6 +265,8 @@ package body Std_Names is Def ("minimum", Name_Minimum); Def ("maximum", Name_Maximum); Def ("untruncated_text_read", Name_Untruncated_Text_Read); + Def ("get_resolution_limit", Name_Get_Resolution_Limit); + Def ("control_simulation", Name_Control_Simulation); Def ("ieee", Name_Ieee); Def ("std_logic_1164", Name_Std_Logic_1164); diff --git a/std_names.ads b/std_names.ads index 6b87814..0a44c91 100644 --- a/std_names.ads +++ b/std_names.ads @@ -458,7 +458,9 @@ package Std_Names is Name_Minimum : constant Name_Id := Name_First_Misc + 022; Name_Maximum : constant Name_Id := Name_First_Misc + 023; Name_Untruncated_Text_Read : constant Name_Id := Name_First_Misc + 024; - Name_Last_Misc : constant Name_Id := Name_Untruncated_Text_Read; + Name_Get_Resolution_Limit : constant Name_Id := Name_First_Misc + 025; + Name_Control_Simulation : constant Name_Id := Name_First_Misc + 026; + Name_Last_Misc : constant Name_Id := Name_Control_Simulation; Name_First_Ieee : constant Name_Id := Name_Last_Misc + 1; Name_Ieee : constant Name_Id := Name_First_Ieee + 000; @@ -70,7 +70,7 @@ package Tokens is -- and adding_operator Tok_Ampersand, -- & - Tok_Condition, + Tok_Condition, -- ?? -- PSL Tok_And_And, -- && diff --git a/translate/translation.adb b/translate/translation.adb index 815db0d..38f4bdf 100644 --- a/translate/translation.adb +++ b/translate/translation.adb @@ -15331,20 +15331,13 @@ package body Translation is New_Lit (Ghdl_Compare_Eq), Std_Boolean_Type_Node); - when Iir_Predefined_Bit_Array_And - | Iir_Predefined_Bit_Array_Or - | Iir_Predefined_Bit_Array_Nand - | Iir_Predefined_Bit_Array_Nor - | Iir_Predefined_Bit_Array_Xor - | Iir_Predefined_Bit_Array_Xnor - | Iir_Predefined_Bit_Array_Not - | Iir_Predefined_Boolean_Array_And - | Iir_Predefined_Boolean_Array_Or - | Iir_Predefined_Boolean_Array_Nand - | Iir_Predefined_Boolean_Array_Nor - | Iir_Predefined_Boolean_Array_Xor - | Iir_Predefined_Boolean_Array_Xnor - | Iir_Predefined_Boolean_Array_Not + when Iir_Predefined_TF_Array_And + | Iir_Predefined_TF_Array_Or + | Iir_Predefined_TF_Array_Nand + | Iir_Predefined_TF_Array_Nor + | Iir_Predefined_TF_Array_Xor + | Iir_Predefined_TF_Array_Xnor + | Iir_Predefined_TF_Array_Not | Iir_Predefined_Array_Srl | Iir_Predefined_Array_Sra | Iir_Predefined_Array_Ror => @@ -17899,38 +17892,31 @@ package body Translation is Is_Monadic := False; case Get_Implicit_Definition (Subprg) is - when Iir_Predefined_Bit_Array_And - | Iir_Predefined_Boolean_Array_And => + when Iir_Predefined_TF_Array_And => Name := Create_Identifier (Id, "_AND"); Op := ON_And; Do_Invert := False; - when Iir_Predefined_Bit_Array_Or - | Iir_Predefined_Boolean_Array_Or => + when Iir_Predefined_TF_Array_Or => Name := Create_Identifier (Id, "_OR"); Op := ON_Or; Do_Invert := False; - when Iir_Predefined_Bit_Array_Nand - | Iir_Predefined_Boolean_Array_Nand => + when Iir_Predefined_TF_Array_Nand => Name := Create_Identifier (Id, "_NAND"); Op := ON_And; Do_Invert := True; - when Iir_Predefined_Bit_Array_Nor - | Iir_Predefined_Boolean_Array_Nor => + when Iir_Predefined_TF_Array_Nor => Name := Create_Identifier (Id, "_NOR"); Op := ON_Or; Do_Invert := True; - when Iir_Predefined_Bit_Array_Xor - | Iir_Predefined_Boolean_Array_Xor => + when Iir_Predefined_TF_Array_Xor => Name := Create_Identifier (Id, "_XOR"); Op := ON_Xor; Do_Invert := False; - when Iir_Predefined_Bit_Array_Xnor - | Iir_Predefined_Boolean_Array_Xnor => + when Iir_Predefined_TF_Array_Xnor => Name := Create_Identifier (Id, "_XNOR"); Op := ON_Xor; Do_Invert := True; - when Iir_Predefined_Bit_Array_Not - | Iir_Predefined_Boolean_Array_Not => + when Iir_Predefined_TF_Array_Not => Name := Create_Identifier (Id, "_NOT"); Is_Monadic := True; Op := ON_Not; @@ -18677,20 +18663,13 @@ package body Translation is Set_Info (Subprg, Infos.Arr_Concat_Info); end if; - when Iir_Predefined_Bit_Array_And - | Iir_Predefined_Bit_Array_Or - | Iir_Predefined_Bit_Array_Nand - | Iir_Predefined_Bit_Array_Nor - | Iir_Predefined_Bit_Array_Xor - | Iir_Predefined_Bit_Array_Xnor - | Iir_Predefined_Bit_Array_Not - | Iir_Predefined_Boolean_Array_And - | Iir_Predefined_Boolean_Array_Or - | Iir_Predefined_Boolean_Array_Nand - | Iir_Predefined_Boolean_Array_Nor - | Iir_Predefined_Boolean_Array_Xor - | Iir_Predefined_Boolean_Array_Xnor - | Iir_Predefined_Boolean_Array_Not => + when Iir_Predefined_TF_Array_And + | Iir_Predefined_TF_Array_Or + | Iir_Predefined_TF_Array_Nand + | Iir_Predefined_TF_Array_Nor + | Iir_Predefined_TF_Array_Xor + | Iir_Predefined_TF_Array_Xnor + | Iir_Predefined_TF_Array_Not => Translate_Predefined_Array_Logical (Subprg); when Iir_Predefined_Array_Sll |