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| author | Abhishek Patel | 2016-06-25 14:14:12 +0530 |
|---|---|---|
| committer | Abhishek Patel | 2016-06-25 14:14:12 +0530 |
| commit | 7b18632ad83bb034655c983bae017d429d574934 (patch) | |
| tree | 038f7b35697627477ff9040a9d0b24089d3f144d /views/webtronix_server/spice/full_adder.sub | |
| parent | d3deccfc9c64c7eb4996ca5e1a3253c037a1c0c7 (diff) | |
| download | eSimWebApp-7b18632ad83bb034655c983bae017d429d574934.tar.gz eSimWebApp-7b18632ad83bb034655c983bae017d429d574934.tar.bz2 eSimWebApp-7b18632ad83bb034655c983bae017d429d574934.zip | |
subcircuits added,netlisterrors removed,chrome supported
Diffstat (limited to 'views/webtronix_server/spice/full_adder.sub')
| -rw-r--r-- | views/webtronix_server/spice/full_adder.sub | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/views/webtronix_server/spice/full_adder.sub b/views/webtronix_server/spice/full_adder.sub new file mode 100644 index 0000000..5f261f7 --- /dev/null +++ b/views/webtronix_server/spice/full_adder.sub @@ -0,0 +1,13 @@ +* Subcircuit full_adder +.subckt full_adder 8 7 5 4 1 +* eeschema netlist version 1.1 (spice format) creation date: wed jun 24 12:24:33 2015 +.include half_adder.sub +x1 8 7 6 2 half_adder +x2 5 6 4 3 half_adder +* u2 3 2 1 d_or +a1 [3 2 ] 1 u2 +* Schematic Name: d_or, NgSpice Name: d_or +.model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) +* Control Statements + +.ends full_adder
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