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* c:\users\shanthipriya\desktop\madeeasy\fossee\esim\library\subcircuitlibrary\3_nor\3_nor.cir
* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_nor
* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_nor
* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port
a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2
a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3
* Schematic Name: d_nor, NgSpice Name: d_nor
.model u2 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nor, NgSpice Name: d_nor
.model u3 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
.tran 0e-00 0e-00 0e-00
* Control Statements
.control
run
print allv > plot_data_v.txt
print alli > plot_data_i.txt
.endc
.end
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