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* d:\fossee\esim\library\subcircuitlibrary\sn5442a_ic\sn5442a_ic.cir
* u11 net-_u11-pad1_ net-_u11-pad2_ net-_u11-pad3_ d_nand
* u12 net-_u10-pad1_ net-_u12-pad2_ net-_u12-pad3_ d_nand
* u31 net-_u11-pad3_ net-_u11-pad3_ net-_u31-pad3_ d_nand
* u32 net-_u12-pad3_ net-_u12-pad3_ net-_u32-pad3_ d_nand
* u51 net-_u31-pad3_ net-_u32-pad3_ net-_u51-pad3_ d_nand
* u13 net-_u13-pad1_ net-_u11-pad2_ net-_u13-pad3_ d_nand
* u14 net-_u10-pad1_ net-_u12-pad2_ net-_u14-pad3_ d_nand
* u33 net-_u13-pad3_ net-_u13-pad3_ net-_u33-pad3_ d_nand
* u34 net-_u14-pad3_ net-_u14-pad3_ net-_u34-pad3_ d_nand
* u52 net-_u33-pad3_ net-_u34-pad3_ net-_u52-pad3_ d_nand
* u15 net-_u11-pad1_ net-_u15-pad2_ net-_u15-pad3_ d_nand
* u16 net-_u10-pad1_ net-_u12-pad2_ net-_u16-pad3_ d_nand
* u35 net-_u15-pad3_ net-_u15-pad3_ net-_u35-pad3_ d_nand
* u36 net-_u16-pad3_ net-_u16-pad3_ net-_u36-pad3_ d_nand
* u53 net-_u35-pad3_ net-_u36-pad3_ net-_u53-pad3_ d_nand
* u17 net-_u13-pad1_ net-_u15-pad2_ net-_u17-pad3_ d_nand
* u18 net-_u10-pad1_ net-_u12-pad2_ net-_u18-pad3_ d_nand
* u37 net-_u17-pad3_ net-_u17-pad3_ net-_u37-pad3_ d_nand
* u38 net-_u18-pad3_ net-_u18-pad3_ net-_u38-pad3_ d_nand
* u54 net-_u37-pad3_ net-_u38-pad3_ net-_u54-pad3_ d_nand
* u19 net-_u11-pad1_ net-_u11-pad2_ net-_u19-pad3_ d_nand
* u20 net-_u10-pad2_ net-_u12-pad2_ net-_u20-pad3_ d_nand
* u39 net-_u19-pad3_ net-_u19-pad3_ net-_u39-pad3_ d_nand
* u40 net-_u20-pad3_ net-_u20-pad3_ net-_u40-pad3_ d_nand
* u55 net-_u39-pad3_ net-_u40-pad3_ net-_u55-pad3_ d_nand
* u21 net-_u13-pad1_ net-_u11-pad2_ net-_u21-pad3_ d_nand
* u22 net-_u10-pad2_ net-_u12-pad2_ net-_u22-pad3_ d_nand
* u41 net-_u21-pad3_ net-_u21-pad3_ net-_u41-pad3_ d_nand
* u42 net-_u22-pad3_ net-_u22-pad3_ net-_u42-pad3_ d_nand
* u56 net-_u41-pad3_ net-_u42-pad3_ net-_u56-pad3_ d_nand
* u23 net-_u11-pad1_ net-_u15-pad2_ net-_u23-pad3_ d_nand
* u24 net-_u10-pad2_ net-_u12-pad2_ net-_u24-pad3_ d_nand
* u43 net-_u23-pad3_ net-_u23-pad3_ net-_u43-pad3_ d_nand
* u44 net-_u24-pad3_ net-_u24-pad3_ net-_u44-pad3_ d_nand
* u57 net-_u43-pad3_ net-_u44-pad3_ net-_u57-pad3_ d_nand
* u25 net-_u13-pad1_ net-_u15-pad2_ net-_u25-pad3_ d_nand
* u26 net-_u10-pad2_ net-_u12-pad2_ net-_u26-pad3_ d_nand
* u45 net-_u25-pad3_ net-_u25-pad3_ net-_u45-pad3_ d_nand
* u46 net-_u26-pad3_ net-_u26-pad3_ net-_u46-pad3_ d_nand
* u58 net-_u45-pad3_ net-_u46-pad3_ net-_u58-pad3_ d_nand
* u27 net-_u11-pad1_ net-_u11-pad2_ net-_u27-pad3_ d_nand
* u28 net-_u10-pad1_ net-_u28-pad2_ net-_u28-pad3_ d_nand
* u47 net-_u27-pad3_ net-_u27-pad3_ net-_u47-pad3_ d_nand
* u48 net-_u28-pad3_ net-_u28-pad3_ net-_u48-pad3_ d_nand
* u59 net-_u47-pad3_ net-_u48-pad3_ net-_u59-pad3_ d_nand
* u29 net-_u13-pad1_ net-_u11-pad2_ net-_u29-pad3_ d_nand
* u30 net-_u10-pad1_ net-_u28-pad2_ net-_u30-pad3_ d_nand
* u49 net-_u29-pad3_ net-_u29-pad3_ net-_u49-pad3_ d_nand
* u50 net-_u30-pad3_ net-_u30-pad3_ net-_u50-pad3_ d_nand
* u60 net-_u49-pad3_ net-_u50-pad3_ net-_u60-pad3_ d_nand
* u4 net-_u2-pad5_ net-_u11-pad1_ d_inverter
* u9 net-_u11-pad1_ net-_u13-pad1_ d_inverter
* u3 net-_u2-pad6_ net-_u11-pad2_ d_inverter
* u7 net-_u11-pad2_ net-_u15-pad2_ d_inverter
* u6 net-_u2-pad7_ net-_u10-pad1_ d_inverter
* u10 net-_u10-pad1_ net-_u10-pad2_ d_inverter
* u5 net-_u2-pad8_ net-_u12-pad2_ d_inverter
* u8 net-_u12-pad2_ net-_u28-pad2_ d_inverter
* u62 net-_u51-pad3_ net-_u52-pad3_ net-_u53-pad3_ net-_u54-pad3_ net-_u55-pad3_ net-_u56-pad3_ net-_u57-pad3_ net-_u58-pad3_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ dac_bridge_8
* u61 net-_u59-pad3_ net-_u60-pad3_ net-_u1-pad9_ net-_u1-pad10_ dac_bridge_2
* u2 net-_u1-pad14_ net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad11_ net-_u2-pad5_ net-_u2-pad6_ net-_u2-pad7_ net-_u2-pad8_ adc_bridge_4
* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ port
a1 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u11-pad3_ u11
a2 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u12-pad3_ u12
a3 [net-_u11-pad3_ net-_u11-pad3_ ] net-_u31-pad3_ u31
a4 [net-_u12-pad3_ net-_u12-pad3_ ] net-_u32-pad3_ u32
a5 [net-_u31-pad3_ net-_u32-pad3_ ] net-_u51-pad3_ u51
a6 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u13-pad3_ u13
a7 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u14-pad3_ u14
a8 [net-_u13-pad3_ net-_u13-pad3_ ] net-_u33-pad3_ u33
a9 [net-_u14-pad3_ net-_u14-pad3_ ] net-_u34-pad3_ u34
a10 [net-_u33-pad3_ net-_u34-pad3_ ] net-_u52-pad3_ u52
a11 [net-_u11-pad1_ net-_u15-pad2_ ] net-_u15-pad3_ u15
a12 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u16-pad3_ u16
a13 [net-_u15-pad3_ net-_u15-pad3_ ] net-_u35-pad3_ u35
a14 [net-_u16-pad3_ net-_u16-pad3_ ] net-_u36-pad3_ u36
a15 [net-_u35-pad3_ net-_u36-pad3_ ] net-_u53-pad3_ u53
a16 [net-_u13-pad1_ net-_u15-pad2_ ] net-_u17-pad3_ u17
a17 [net-_u10-pad1_ net-_u12-pad2_ ] net-_u18-pad3_ u18
a18 [net-_u17-pad3_ net-_u17-pad3_ ] net-_u37-pad3_ u37
a19 [net-_u18-pad3_ net-_u18-pad3_ ] net-_u38-pad3_ u38
a20 [net-_u37-pad3_ net-_u38-pad3_ ] net-_u54-pad3_ u54
a21 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u19-pad3_ u19
a22 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u20-pad3_ u20
a23 [net-_u19-pad3_ net-_u19-pad3_ ] net-_u39-pad3_ u39
a24 [net-_u20-pad3_ net-_u20-pad3_ ] net-_u40-pad3_ u40
a25 [net-_u39-pad3_ net-_u40-pad3_ ] net-_u55-pad3_ u55
a26 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u21-pad3_ u21
a27 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u22-pad3_ u22
a28 [net-_u21-pad3_ net-_u21-pad3_ ] net-_u41-pad3_ u41
a29 [net-_u22-pad3_ net-_u22-pad3_ ] net-_u42-pad3_ u42
a30 [net-_u41-pad3_ net-_u42-pad3_ ] net-_u56-pad3_ u56
a31 [net-_u11-pad1_ net-_u15-pad2_ ] net-_u23-pad3_ u23
a32 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u24-pad3_ u24
a33 [net-_u23-pad3_ net-_u23-pad3_ ] net-_u43-pad3_ u43
a34 [net-_u24-pad3_ net-_u24-pad3_ ] net-_u44-pad3_ u44
a35 [net-_u43-pad3_ net-_u44-pad3_ ] net-_u57-pad3_ u57
a36 [net-_u13-pad1_ net-_u15-pad2_ ] net-_u25-pad3_ u25
a37 [net-_u10-pad2_ net-_u12-pad2_ ] net-_u26-pad3_ u26
a38 [net-_u25-pad3_ net-_u25-pad3_ ] net-_u45-pad3_ u45
a39 [net-_u26-pad3_ net-_u26-pad3_ ] net-_u46-pad3_ u46
a40 [net-_u45-pad3_ net-_u46-pad3_ ] net-_u58-pad3_ u58
a41 [net-_u11-pad1_ net-_u11-pad2_ ] net-_u27-pad3_ u27
a42 [net-_u10-pad1_ net-_u28-pad2_ ] net-_u28-pad3_ u28
a43 [net-_u27-pad3_ net-_u27-pad3_ ] net-_u47-pad3_ u47
a44 [net-_u28-pad3_ net-_u28-pad3_ ] net-_u48-pad3_ u48
a45 [net-_u47-pad3_ net-_u48-pad3_ ] net-_u59-pad3_ u59
a46 [net-_u13-pad1_ net-_u11-pad2_ ] net-_u29-pad3_ u29
a47 [net-_u10-pad1_ net-_u28-pad2_ ] net-_u30-pad3_ u30
a48 [net-_u29-pad3_ net-_u29-pad3_ ] net-_u49-pad3_ u49
a49 [net-_u30-pad3_ net-_u30-pad3_ ] net-_u50-pad3_ u50
a50 [net-_u49-pad3_ net-_u50-pad3_ ] net-_u60-pad3_ u60
a51 net-_u2-pad5_ net-_u11-pad1_ u4
a52 net-_u11-pad1_ net-_u13-pad1_ u9
a53 net-_u2-pad6_ net-_u11-pad2_ u3
a54 net-_u11-pad2_ net-_u15-pad2_ u7
a55 net-_u2-pad7_ net-_u10-pad1_ u6
a56 net-_u10-pad1_ net-_u10-pad2_ u10
a57 net-_u2-pad8_ net-_u12-pad2_ u5
a58 net-_u12-pad2_ net-_u28-pad2_ u8
a59 [net-_u51-pad3_ net-_u52-pad3_ net-_u53-pad3_ net-_u54-pad3_ net-_u55-pad3_ net-_u56-pad3_ net-_u57-pad3_ net-_u58-pad3_ ] [net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ ] u62
a60 [net-_u59-pad3_ net-_u60-pad3_ ] [net-_u1-pad9_ net-_u1-pad10_ ] u61
a61 [net-_u1-pad14_ net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad11_ ] [net-_u2-pad5_ net-_u2-pad6_ net-_u2-pad7_ net-_u2-pad8_ ] u2
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u11 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u12 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u31 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u32 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u51 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u13 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u14 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u33 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u34 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u52 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u15 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u16 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u35 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u36 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u53 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u17 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u18 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u37 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u38 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u54 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u19 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u20 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u39 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u40 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u55 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u21 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u22 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u41 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u42 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u56 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u23 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u24 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u43 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u44 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u57 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u25 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u26 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u45 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u46 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u58 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u27 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u28 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u47 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u48 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u59 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u29 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u30 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u49 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u50 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_nand, NgSpice Name: d_nand
.model u60 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u10 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: dac_bridge_8, NgSpice Name: dac_bridge
.model u62 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 )
* Schematic Name: dac_bridge_2, NgSpice Name: dac_bridge
.model u61 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 )
* Schematic Name: adc_bridge_4, NgSpice Name: adc_bridge
.model u2 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 )
.tran 0e-00 0e-00 0e-00
* Control Statements
.control
run
print allv > plot_data_v.txt
print alli > plot_data_i.txt
.endc
.end
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