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|
* c:\fossee\esim\library\subcircuitlibrary\sn54154\sn54154.cir
* u11 net-_u11-pad1_ net-_u11-pad2_ g d_and
* u5 ? net-_u11-pad1_ d_inverter
* u6 ? net-_u11-pad2_ d_inverter
* u1 ? a_bar d_inverter
* u7 a_bar a d_inverter
* u2 ? b_bar d_inverter
* u8 b_bar b d_inverter
* u3 ? c_bar d_inverter
* u9 c_bar c d_inverter
* u4 ? d_bar d_inverter
* u10 d_bar d d_inverter
* u60 g net-_u44-pad3_ net-_u60-pad3_ d_and
* u44 a_bar net-_u28-pad3_ net-_u44-pad3_ d_and
* u28 b_bar net-_u12-pad3_ net-_u28-pad3_ d_and
* u12 c_bar d_bar net-_u12-pad3_ d_and
* u61 g net-_u45-pad3_ net-_u61-pad3_ d_and
* u45 a net-_u29-pad3_ net-_u45-pad3_ d_and
* u29 b_bar net-_u13-pad3_ net-_u29-pad3_ d_and
* u13 c_bar d_bar net-_u13-pad3_ d_and
* u62 g net-_u46-pad3_ net-_u62-pad3_ d_and
* u46 a_bar net-_u30-pad3_ net-_u46-pad3_ d_and
* u30 b net-_u14-pad3_ net-_u30-pad3_ d_and
* u14 c_bar d_bar net-_u14-pad3_ d_and
* u15 c_bar d_bar net-_u15-pad3_ d_and
* u31 b net-_u15-pad3_ net-_u31-pad3_ d_and
* u47 a net-_u31-pad3_ net-_u47-pad3_ d_and
* u63 g net-_u47-pad3_ net-_u63-pad3_ d_and
* u16 c d_bar net-_u16-pad3_ d_and
* u32 b_bar net-_u16-pad3_ net-_u32-pad3_ d_and
* u48 a_bar net-_u32-pad3_ net-_u48-pad3_ d_and
* u64 g net-_u48-pad3_ net-_u64-pad3_ d_and
* u17 c d_bar net-_u17-pad3_ d_and
* u33 b_bar net-_u17-pad3_ net-_u33-pad3_ d_and
* u49 a net-_u33-pad3_ net-_u49-pad3_ d_and
* u65 g net-_u49-pad3_ net-_u65-pad3_ d_and
* u18 c d_bar net-_u18-pad3_ d_and
* u34 b net-_u18-pad3_ net-_u34-pad3_ d_and
* u50 a_bar net-_u34-pad3_ net-_u50-pad3_ d_and
* u66 g net-_u50-pad3_ net-_u66-pad3_ d_and
* u19 c d_bar net-_u19-pad3_ d_and
* u35 b net-_u19-pad3_ net-_u35-pad3_ d_and
* u51 a net-_u35-pad3_ net-_u51-pad3_ d_and
* u67 g net-_u51-pad3_ net-_u67-pad3_ d_and
* u20 c_bar d net-_u20-pad3_ d_and
* u36 b_bar net-_u20-pad3_ net-_u36-pad3_ d_and
* u52 a_bar net-_u36-pad3_ net-_u52-pad3_ d_and
* u68 g net-_u52-pad3_ net-_u68-pad3_ d_and
* u21 c_bar d net-_u21-pad3_ d_and
* u37 b_bar net-_u21-pad3_ net-_u37-pad3_ d_and
* u53 a net-_u37-pad3_ net-_u53-pad3_ d_and
* u69 g net-_u53-pad3_ net-_u69-pad3_ d_and
* u22 c_bar d net-_u22-pad3_ d_and
* u38 b net-_u22-pad3_ net-_u38-pad3_ d_and
* u54 a_bar net-_u38-pad3_ net-_u54-pad3_ d_and
* u70 g net-_u54-pad3_ net-_u70-pad3_ d_and
* u25 c_bar d net-_u25-pad3_ d_and
* u41 b net-_u25-pad3_ net-_u41-pad3_ d_and
* u57 a net-_u41-pad3_ net-_u57-pad3_ d_and
* u73 g net-_u57-pad3_ net-_u73-pad3_ d_and
* u26 c d net-_u26-pad3_ d_and
* u42 b_bar net-_u26-pad3_ net-_u42-pad3_ d_and
* u58 a_bar net-_u42-pad3_ net-_u58-pad3_ d_and
* u74 g net-_u58-pad3_ net-_u74-pad3_ d_and
* u23 c d net-_u23-pad3_ d_and
* u39 b_bar net-_u23-pad3_ net-_u39-pad3_ d_and
* u55 a net-_u39-pad3_ net-_u55-pad3_ d_and
* u71 g net-_u55-pad3_ net-_u71-pad3_ d_and
* u24 c d net-_u24-pad3_ d_and
* u40 b net-_u24-pad3_ net-_u40-pad3_ d_and
* u56 a_bar net-_u40-pad3_ net-_u56-pad3_ d_and
* u72 g net-_u56-pad3_ net-_u72-pad3_ d_and
* u27 c d net-_u27-pad3_ d_and
* u43 b net-_u27-pad3_ net-_u43-pad3_ d_and
* u59 a net-_u43-pad3_ net-_u59-pad3_ d_and
* u75 g net-_u59-pad3_ net-_u75-pad3_ d_and
* u76 net-_u60-pad3_ ? d_inverter
* u77 net-_u61-pad3_ ? d_inverter
* u78 net-_u62-pad3_ ? d_inverter
* u79 net-_u63-pad3_ ? d_inverter
* u80 net-_u64-pad3_ ? d_inverter
* u81 net-_u65-pad3_ ? d_inverter
* u82 net-_u66-pad3_ ? d_inverter
* u83 net-_u67-pad3_ ? d_inverter
* u84 net-_u68-pad3_ ? d_inverter
* u85 net-_u69-pad3_ ? d_inverter
* u86 net-_u70-pad3_ ? d_inverter
* u89 net-_u73-pad3_ ? d_inverter
* u90 net-_u74-pad3_ ? d_inverter
* u87 net-_u71-pad3_ ? d_inverter
* u88 net-_u72-pad3_ ? d_inverter
* u91 net-_u75-pad3_ ? d_inverter
a1 [net-_u11-pad1_ net-_u11-pad2_ ] g u11
a2 g1_bar net-_u11-pad1_ u5
a3 g2_bar net-_u11-pad2_ u6
a4 a_in a_bar u1
a5 a_bar a u7
a6 b_in b_bar u2
a7 b_bar b u8
a8 c_in c_bar u3
a9 c_bar c u9
a10 d_in d_bar u4
a11 d_bar d u10
a12 [g net-_u44-pad3_ ] net-_u60-pad3_ u60
a13 [a_bar net-_u28-pad3_ ] net-_u44-pad3_ u44
a14 [b_bar net-_u12-pad3_ ] net-_u28-pad3_ u28
a15 [c_bar d_bar ] net-_u12-pad3_ u12
a16 [g net-_u45-pad3_ ] net-_u61-pad3_ u61
a17 [a net-_u29-pad3_ ] net-_u45-pad3_ u45
a18 [b_bar net-_u13-pad3_ ] net-_u29-pad3_ u29
a19 [c_bar d_bar ] net-_u13-pad3_ u13
a20 [g net-_u46-pad3_ ] net-_u62-pad3_ u62
a21 [a_bar net-_u30-pad3_ ] net-_u46-pad3_ u46
a22 [b net-_u14-pad3_ ] net-_u30-pad3_ u30
a23 [c_bar d_bar ] net-_u14-pad3_ u14
a24 [c_bar d_bar ] net-_u15-pad3_ u15
a25 [b net-_u15-pad3_ ] net-_u31-pad3_ u31
a26 [a net-_u31-pad3_ ] net-_u47-pad3_ u47
a27 [g net-_u47-pad3_ ] net-_u63-pad3_ u63
a28 [c d_bar ] net-_u16-pad3_ u16
a29 [b_bar net-_u16-pad3_ ] net-_u32-pad3_ u32
a30 [a_bar net-_u32-pad3_ ] net-_u48-pad3_ u48
a31 [g net-_u48-pad3_ ] net-_u64-pad3_ u64
a32 [c d_bar ] net-_u17-pad3_ u17
a33 [b_bar net-_u17-pad3_ ] net-_u33-pad3_ u33
a34 [a net-_u33-pad3_ ] net-_u49-pad3_ u49
a35 [g net-_u49-pad3_ ] net-_u65-pad3_ u65
a36 [c d_bar ] net-_u18-pad3_ u18
a37 [b net-_u18-pad3_ ] net-_u34-pad3_ u34
a38 [a_bar net-_u34-pad3_ ] net-_u50-pad3_ u50
a39 [g net-_u50-pad3_ ] net-_u66-pad3_ u66
a40 [c d_bar ] net-_u19-pad3_ u19
a41 [b net-_u19-pad3_ ] net-_u35-pad3_ u35
a42 [a net-_u35-pad3_ ] net-_u51-pad3_ u51
a43 [g net-_u51-pad3_ ] net-_u67-pad3_ u67
a44 [c_bar d ] net-_u20-pad3_ u20
a45 [b_bar net-_u20-pad3_ ] net-_u36-pad3_ u36
a46 [a_bar net-_u36-pad3_ ] net-_u52-pad3_ u52
a47 [g net-_u52-pad3_ ] net-_u68-pad3_ u68
a48 [c_bar d ] net-_u21-pad3_ u21
a49 [b_bar net-_u21-pad3_ ] net-_u37-pad3_ u37
a50 [a net-_u37-pad3_ ] net-_u53-pad3_ u53
a51 [g net-_u53-pad3_ ] net-_u69-pad3_ u69
a52 [c_bar d ] net-_u22-pad3_ u22
a53 [b net-_u22-pad3_ ] net-_u38-pad3_ u38
a54 [a_bar net-_u38-pad3_ ] net-_u54-pad3_ u54
a55 [g net-_u54-pad3_ ] net-_u70-pad3_ u70
a56 [c_bar d ] net-_u25-pad3_ u25
a57 [b net-_u25-pad3_ ] net-_u41-pad3_ u41
a58 [a net-_u41-pad3_ ] net-_u57-pad3_ u57
a59 [g net-_u57-pad3_ ] net-_u73-pad3_ u73
a60 [c d ] net-_u26-pad3_ u26
a61 [b_bar net-_u26-pad3_ ] net-_u42-pad3_ u42
a62 [a_bar net-_u42-pad3_ ] net-_u58-pad3_ u58
a63 [g net-_u58-pad3_ ] net-_u74-pad3_ u74
a64 [c d ] net-_u23-pad3_ u23
a65 [b_bar net-_u23-pad3_ ] net-_u39-pad3_ u39
a66 [a net-_u39-pad3_ ] net-_u55-pad3_ u55
a67 [g net-_u55-pad3_ ] net-_u71-pad3_ u71
a68 [c d ] net-_u24-pad3_ u24
a69 [b net-_u24-pad3_ ] net-_u40-pad3_ u40
a70 [a_bar net-_u40-pad3_ ] net-_u56-pad3_ u56
a71 [g net-_u56-pad3_ ] net-_u72-pad3_ u72
a72 [c d ] net-_u27-pad3_ u27
a73 [b net-_u27-pad3_ ] net-_u43-pad3_ u43
a74 [a net-_u43-pad3_ ] net-_u59-pad3_ u59
a75 [g net-_u59-pad3_ ] net-_u75-pad3_ u75
a76 net-_u60-pad3_ o0 u76
a77 net-_u61-pad3_ o1 u77
a78 net-_u62-pad3_ o2 u78
a79 net-_u63-pad3_ o3 u79
a80 net-_u64-pad3_ o4 u80
a81 net-_u65-pad3_ o5 u81
a82 net-_u66-pad3_ o6 u82
a83 net-_u67-pad3_ o7 u83
a84 net-_u68-pad3_ o8 u84
a85 net-_u69-pad3_ o9 u85
a86 net-_u70-pad3_ o10 u86
a87 net-_u73-pad3_ o11 u89
a88 net-_u74-pad3_ o12 u90
a89 net-_u71-pad3_ o13 u87
a90 net-_u72-pad3_ o14 u88
a91 net-_u75-pad3_ o15 u91
* Schematic Name: d_and, NgSpice Name: d_and
.model u11 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u5 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u1 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u7 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u8 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u3 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u9 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u4 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u10 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u60 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u44 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u28 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u12 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u61 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u45 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u29 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u13 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u62 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u46 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u30 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u14 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u15 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u31 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u47 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u63 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u16 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u32 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u48 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u64 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u17 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u33 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u49 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u65 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u18 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u34 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u50 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u66 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u19 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u35 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u51 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u67 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u20 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u36 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u52 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u68 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u21 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u37 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u53 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u69 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u22 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u38 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u54 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u70 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u25 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u41 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u57 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u73 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u26 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u42 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u58 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u74 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u23 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u39 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u55 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u71 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u24 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u40 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u56 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u72 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u27 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u43 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u59 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_and, NgSpice Name: d_and
.model u75 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u76 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u77 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u78 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u79 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u80 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u81 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u82 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u83 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u84 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u85 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u86 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u89 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u90 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u87 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u88 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_inverter, NgSpice Name: d_inverter
.model u91 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
.tran 0e-00 0e-00 0e-00
* Control Statements
.control
run
print allv > plot_data_v.txt
print alli > plot_data_i.txt
.endc
.end
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