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path: root/library/SubcircuitLibrary/MC1455B_IC/MC1455B_IC.cir.out
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* c:\users\aditya\esim-workspace\mc1455b_ic\mc1455b_ic.cir

.include MC1455B_ic1.sub
r2  out gnd 1k
r3  in net-_r1-pad1_ 5.1k
c1  net-_c1-pad1_ gnd 0.01u
c2  vcap gnd 0.1u
r1  net-_r1-pad1_ vcap 100.9k
v1 in gnd  dc 15
x1 gnd vcap out in net-_c1-pad1_ vcap net-_r1-pad1_ in MC1455B_ic1
r4  in out 1k
* u1  in plot_v1
* u2  out plot_v1
* u3  vcap plot_v1
.tran 0.01e-03 50e-03 0e-03

* Control Statements 
.control
run
print allv > plot_data_v.txt
print alli > plot_data_i.txt
plot v(in)
plot v(out)
plot v(vcap)
.endc
.end