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* c:\fossee\esim\library\subcircuitlibrary\74hc86_subcircuit\74hc86_subcircuit.cir
* u2 net-_u1-pad1_ net-_u1-pad3_ net-_u1-pad5_ d_xor
* u3 net-_u1-pad2_ net-_u1-pad4_ net-_u1-pad6_ d_xor
* u4 net-_u1-pad9_ net-_u1-pad12_ net-_u1-pad7_ d_xor
* u5 net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad8_ d_xor
* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ port
a1 [net-_u1-pad1_ net-_u1-pad3_ ] net-_u1-pad5_ u2
a2 [net-_u1-pad2_ net-_u1-pad4_ ] net-_u1-pad6_ u3
a3 [net-_u1-pad9_ net-_u1-pad12_ ] net-_u1-pad7_ u4
a4 [net-_u1-pad10_ net-_u1-pad11_ ] net-_u1-pad8_ u5
* Schematic Name: d_xor, NgSpice Name: d_xor
.model u2 d_xor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_xor, NgSpice Name: d_xor
.model u3 d_xor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_xor, NgSpice Name: d_xor
.model u4 d_xor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
* Schematic Name: d_xor, NgSpice Name: d_xor
.model u5 d_xor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 )
.tran 0e-00 0e-00 0e-00
* Control Statements
.control
run
print allv > plot_data_v.txt
print alli > plot_data_i.txt
.endc
.end
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