Examples - eSim/.git - This repository contain source code for new flow of FreeEDA now know as eSim

Mode	Name	Size
d---------	4_bit_JK_ff	484	log plain
d---------	BJT_Biascircuit	497	log plain
d---------	BJT_CB_config	483	log plain
d---------	BJT_CE_config	535	log plain
d---------	BJT_Frequency_Response	486	log plain
d---------	BJT_amplifier	676	log plain
d---------	BasicGates	623	log plain
d---------	CMOS_Inverter	787	log plain
d---------	Clampercircuit	488	log plain
d---------	Clippercircuit	488	log plain
d---------	Diac_Triac	1336	log plain
d---------	Differentiator	861	log plain
d---------	Diode_characteristics	537	log plain
d---------	FET_Amplifier	535	log plain
d---------	FET_Characteristic	518	log plain
d---------	FrequencyResponse_JFET	722	log plain
d---------	FullAdder	1060	log plain
d---------	FullwaveRectifier_SCR	1000	log plain
d---------	Fullwavebridgerectifier	551	log plain
d---------	Half_Adder	829	log plain
d---------	HalfwaveRectifier_SCR	949	log plain
d---------	Halfwave_Rectifier	573	log plain
d---------	High_Pass_Filter	469	log plain
d---------	Integrator	1035	log plain
d---------	InvertingAmplifier	1040	log plain
d---------	JK_Flipflop	434	log plain
d---------	Low_Pass_Filter	462	log plain
d---------	Parallel_Resonance	483	log plain
d---------	RC	371	log plain
d---------	RL	371	log plain
d---------	RLC	378	log plain
d---------	Series_Resonance	469	log plain
d---------	Transformer	342	log plain
d---------	Zener_Characteristic	540	log plain