blob: 26968c36e76b15366a40d0827349dd6d199362a8 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
|
* /home/fossee/downloads/esim-master/examples/half_adder/half_adder.cir
.include half_adder.sub
x1 net-_u1-pad3_ net-_u1-pad4_ net-_u2-pad1_ net-_u2-pad2_ half_adder
* u1 a b net-_u1-pad3_ net-_u1-pad4_ adc_bridge_2
* u2 net-_u2-pad1_ net-_u2-pad2_ sum cout dac_bridge_2
v1 a gnd dc 5
v2 b gnd dc 0
r1 sum gnd 1k
r2 cout gnd 1k
a1 [a b ] [net-_u1-pad3_ net-_u1-pad4_ ] u1
a2 [net-_u2-pad1_ net-_u2-pad2_ ] [sum cout ] u2
* Schematic Name: adc_bridge_2, NgSpice Name: adc_bridge
.model u1 adc_bridge(fall_delay=1.0e-9 in_high=2.0 rise_delay=1.0e-9 in_low=1.0 )
* Schematic Name: dac_bridge_2, NgSpice Name: dac_bridge
.model u2 dac_bridge(out_undef=0.5 out_low=0.0 out_high=5.0 t_rise=1.0e-9 t_fall=1.0e-9 input_load=1.0e-12 )
.tran 10e-03 100e-03 0e-03
* Control Statements
.control
run
print allv > plot_data_v.txt
print alli > plot_data_i.txt
.endc
.end
|