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path: root/Examples/Analysis_Of_Digital_IC/4023_test/4023.sch
blob: ed64345f69d72ed45cab791a5d7824eca7cbf1aa (plain)
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EESchema Schematic File Version 2
LIBS:power
LIBS:eSim_Analog
LIBS:eSim_Devices
LIBS:eSim_Digital
LIBS:eSim_Hybrid
LIBS:eSim_Miscellaneous
LIBS:eSim_Plot
LIBS:eSim_Power
LIBS:eSim_Sources
LIBS:eSim_Subckt
LIBS:eSim_User
EELAYER 25 0
EELAYER END
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F 2 "" H 4800 2500 60  0000 C CNN
F 3 "" H 4800 2500 60  0000 C CNN
	1    4800 2500
	1    0    0    -1  
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L d_inverter U4
U 1 1 5CF0FB13
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F 2 "" H 6200 2400 60  0000 C CNN
F 3 "" H 6200 2400 60  0000 C CNN
	1    6150 2450
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L PORT U1
U 11 1 5CF0FB34
P 3100 1950
F 0 "U1" H 3150 2050 30  0000 C CNN
F 1 "PORT" H 3100 1950 30  0000 C CNN
F 2 "" H 3100 1950 60  0000 C CNN
F 3 "" H 3100 1950 60  0000 C CNN
	11   3100 1950
	1    0    0    -1  
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$Comp
L PORT U1
U 12 1 5CF0FB90
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F 2 "" H 3100 2350 60  0000 C CNN
F 3 "" H 3100 2350 60  0000 C CNN
	12   3100 2350
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L PORT U1
U 13 1 5CF0FBB8
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	13   3100 2750
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L PORT U1
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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L 3_and X2
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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Wire Wire Line
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