index
:
eSim/.git
master
This repository contain source code for new flow of FreeEDA now know as eSim
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
src
/
kicadtoNgspice
/
Convert.py
Age
Commit message (
Expand
)
Author
2015-06-26
Subject: Added feature for initial voltage condition
fahim
2015-06-23
Added subcircuit functionality
Tanay Mathur
2015-06-10
Subject: Bug fixing for adding device model library for windows
fahim
2015-06-09
Subject: Adding functionality of .op analysis
fahim
2015-06-05
Subject: Changes in device library,ModelEditor.py,Convert.py. Added more
fahim
2015-06-03
Subject: Bug fixing in Convert.py
fahim
2015-06-02
Subject: Written function to extract Refrence name for device Library
fahim
2015-05-27
Subject: Removed unwanted comment and print statement
fahim
2015-05-13
Project Explorer Compeleted
komalsheth236
2015-04-22
Subject: Added Device Libarary Tab.Few Changes in Workspace class.
fahim
2015-04-20
Changes in Convert.py
komalsheth236
2015-04-17
Subject : Modified in Analysis Inserter function
fahim
2015-04-16
Subject: added Model Widget functionality
fahim
2015-04-09
Subject: Analysis inserter functionality
fahim
2015-04-07
Subject: Added new Icon images and Modified code to get model from xml
fahim
2015-03-27
Subject: Minor changes in variable name,remove comment
fahim
2015-03-25
Subject: Added module for source tab
fahim