summaryrefslogtreecommitdiff
path: root/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.cir
diff options
context:
space:
mode:
Diffstat (limited to 'src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.cir')
-rw-r--r--src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.cir16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.cir b/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.cir
new file mode 100644
index 00000000..ec177d39
--- /dev/null
+++ b/src/SubcircuitLibrary/LOGIC_ADDER/LOGIC_ADDER.cir
@@ -0,0 +1,16 @@
+* C:\eSim\eSim\src\SubcircuitLibrary\LOGIC_ADDER\LOGIC_ADDER.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 3/24/2018 7:23:20 PM
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U2 A B Net-_U2-Pad3_ d_and
+U4 Net-_U3-Pad3_ CIN Net-_U4-Pad3_ d_and
+U3 A B Net-_U3-Pad3_ d_xor
+U5 Net-_U3-Pad3_ CIN SUM d_xor
+U6 Net-_U2-Pad3_ Net-_U4-Pad3_ CARRY d_or
+U1 A B CIN SUM CARRY PORT
+
+.end