diff options
Diffstat (limited to 'src/SubcircuitLibrary/4_bit_FA/3_and.sub')
| -rw-r--r-- | src/SubcircuitLibrary/4_bit_FA/3_and.sub | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/SubcircuitLibrary/4_bit_FA/3_and.sub b/src/SubcircuitLibrary/4_bit_FA/3_and.sub new file mode 100644 index 00000000..b949ae4f --- /dev/null +++ b/src/SubcircuitLibrary/4_bit_FA/3_and.sub @@ -0,0 +1,14 @@ +* Subcircuit 3_and
+.subckt 3_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_
+* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir
+* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and
+* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and
+a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2
+a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Control Statements
+
+.ends 3_and
\ No newline at end of file |