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-rw-r--r--library/SubcircuitLibrary/lm123_sub/NJF.lib4
-rw-r--r--library/SubcircuitLibrary/lm123_sub/NPN.lib4
-rw-r--r--library/SubcircuitLibrary/lm123_sub/PNP.lib4
-rw-r--r--library/SubcircuitLibrary/lm123_sub/analysis1
-rw-r--r--library/SubcircuitLibrary/lm123_sub/lm123_sub-cache.lib158
-rw-r--r--library/SubcircuitLibrary/lm123_sub/lm123_sub.cir64
-rw-r--r--library/SubcircuitLibrary/lm123_sub/lm123_sub.cir.out77
-rw-r--r--library/SubcircuitLibrary/lm123_sub/lm123_sub.pro73
-rw-r--r--library/SubcircuitLibrary/lm123_sub/lm123_sub.sch976
-rw-r--r--library/SubcircuitLibrary/lm123_sub/lm123_sub.sub71
-rw-r--r--library/SubcircuitLibrary/lm123_sub/lm123_sub_Previous_Values.xml1
11 files changed, 1433 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/lm123_sub/NJF.lib b/library/SubcircuitLibrary/lm123_sub/NJF.lib
new file mode 100644
index 00000000..dbb2cbae
--- /dev/null
+++ b/library/SubcircuitLibrary/lm123_sub/NJF.lib
@@ -0,0 +1,4 @@
+.model J2N3819 NJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3
++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u
++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18
++ Af=1)
diff --git a/library/SubcircuitLibrary/lm123_sub/NPN.lib b/library/SubcircuitLibrary/lm123_sub/NPN.lib
new file mode 100644
index 00000000..be5f3073
--- /dev/null
+++ b/library/SubcircuitLibrary/lm123_sub/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/lm123_sub/PNP.lib b/library/SubcircuitLibrary/lm123_sub/PNP.lib
new file mode 100644
index 00000000..7edda0ea
--- /dev/null
+++ b/library/SubcircuitLibrary/lm123_sub/PNP.lib
@@ -0,0 +1,4 @@
+.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/lm123_sub/analysis b/library/SubcircuitLibrary/lm123_sub/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/lm123_sub/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/lm123_sub/lm123_sub-cache.lib b/library/SubcircuitLibrary/lm123_sub/lm123_sub-cache.lib
new file mode 100644
index 00000000..c28cbe9d
--- /dev/null
+++ b/library/SubcircuitLibrary/lm123_sub/lm123_sub-cache.lib
@@ -0,0 +1,158 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS capacitor
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NJF
+#
+DEF eSim_NJF J 0 0 Y N 1 F N
+F0 "J" -100 50 50 H V R CNN
+F1 "eSim_NJF" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS jfet_n
+DRAW
+C 50 0 111 0 1 10 N
+P 3 0 1 10 10 75 10 -75 10 -75 N
+P 3 0 1 0 100 -100 100 -50 10 -50 N
+P 3 0 1 0 100 100 100 55 10 55 N
+P 4 0 1 0 0 0 -40 15 -40 -15 0 0 F
+X D 1 100 200 100 D 50 50 1 1 P
+X G 2 -200 0 210 R 50 50 1 1 P
+X S 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# zener
+#
+DEF zener U 0 40 Y Y 1 F N
+F0 "U" -50 -100 60 H V C CNN
+F1 "zener" 0 100 60 H V C CNN
+F2 "" 50 0 60 H V C CNN
+F3 "" 50 0 60 H V C CNN
+DRAW
+P 2 0 1 0 100 -50 50 -100 N
+P 2 0 1 0 100 50 100 -50 N
+P 2 0 1 0 100 50 150 100 N
+P 4 0 1 0 0 50 0 -50 100 0 0 50 N
+X ~ IN -200 0 200 R 50 43 1 1 I
+X ~ OUT 300 0 200 L 50 43 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/lm123_sub/lm123_sub.cir b/library/SubcircuitLibrary/lm123_sub/lm123_sub.cir
new file mode 100644
index 00000000..c1a66832
--- /dev/null
+++ b/library/SubcircuitLibrary/lm123_sub/lm123_sub.cir
@@ -0,0 +1,64 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\lm123_sub\lm123_sub.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/06/2024 11:06:50 AM
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q2 Net-_J1-Pad1_ Net-_J1-Pad1_ Net-_Q2-Pad3_ eSim_PNP
+Q3 Net-_Q1-Pad2_ Net-_J1-Pad1_ Net-_Q2-Pad3_ eSim_PNP
+Q5 Net-_Q10-Pad1_ Net-_J1-Pad1_ Net-_Q2-Pad3_ eSim_PNP
+J1 Net-_J1-Pad1_ Net-_J1-Pad2_ Net-_J1-Pad3_ jfet_n
+R1 Net-_Q4-Pad2_ Net-_J1-Pad3_ 4k
+R2 Net-_J1-Pad2_ Net-_Q4-Pad2_ 250
+U2 Net-_J1-Pad2_ Net-_Q1-Pad2_ zener
+Q1 Net-_J1-Pad1_ Net-_Q1-Pad2_ Net-_J1-Pad3_ eSim_NPN
+Q4 Net-_Q10-Pad1_ Net-_Q4-Pad2_ Net-_J1-Pad2_ eSim_NPN
+R3 Net-_J1-Pad2_ Net-_Q6-Pad3_ 1k
+Q6 Net-_Q6-Pad1_ Net-_Q6-Pad2_ Net-_Q6-Pad3_ eSim_NPN
+R4 Net-_Q6-Pad1_ Net-_Q9-Pad3_ 2k
+R5 Net-_Q6-Pad2_ Net-_Q9-Pad3_ 1.32k
+R6 Net-_Q10-Pad2_ Net-_Q6-Pad2_ 100
+Q7 Net-_Q10-Pad2_ Net-_Q6-Pad3_ Net-_Q7-Pad3_ eSim_NPN
+R7 Net-_J1-Pad2_ Net-_Q7-Pad3_ 100
+Q10 Net-_Q10-Pad1_ Net-_Q10-Pad2_ Net-_Q10-Pad3_ eSim_NPN
+R8 Net-_J1-Pad2_ Net-_Q10-Pad3_ 12k
+R10 Net-_J1-Pad2_ Net-_Q11-Pad3_ 1k
+Q11 Net-_C1-Pad1_ Net-_Q10-Pad3_ Net-_Q11-Pad3_ eSim_NPN
+Q14 Net-_Q13-Pad3_ Net-_Q13-Pad3_ Net-_Q14-Pad3_ eSim_NPN
+R11 Net-_J1-Pad2_ Net-_Q14-Pad3_ 4k
+Q13 Net-_C1-Pad2_ Net-_C1-Pad1_ Net-_Q13-Pad3_ eSim_NPN
+Q16 Net-_C1-Pad2_ Net-_Q13-Pad3_ Net-_J1-Pad2_ eSim_NPN
+R9 Net-_C1-Pad1_ Net-_Q12-Pad3_ 20k
+C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 30pF
+Q12 Net-_Q12-Pad1_ Net-_Q12-Pad2_ Net-_Q12-Pad3_ eSim_NPN
+Q9 Net-_Q6-Pad1_ Net-_Q6-Pad1_ Net-_Q9-Pad3_ eSim_NPN
+Q8 Net-_J1-Pad1_ Net-_Q12-Pad1_ Net-_Q6-Pad1_ eSim_NPN
+R14 Net-_Q12-Pad2_ Net-_Q12-Pad1_ 50k
+R15 Net-_Q20-Pad3_ Net-_Q12-Pad2_ 500
+Q20 Net-_Q12-Pad1_ Net-_Q12-Pad1_ Net-_Q20-Pad3_ eSim_NPN
+R16 Net-_J1-Pad2_ Net-_Q20-Pad3_ 20k
+R19 Net-_J1-Pad2_ Net-_Q12-Pad1_ 4k
+U4 Net-_J1-Pad2_ Net-_Q12-Pad1_ zener
+Q19 Net-_C2-Pad1_ Net-_C2-Pad2_ Net-_Q12-Pad1_ eSim_NPN
+Q17 Net-_J1-Pad2_ Net-_C1-Pad2_ Net-_Q10-Pad1_ eSim_PNP
+R12 Net-_C1-Pad2_ Net-_Q15-Pad3_ 1k
+Q15 Net-_Q10-Pad1_ Net-_Q10-Pad1_ Net-_Q15-Pad3_ eSim_NPN
+Q18 Net-_J1-Pad2_ Net-_C2-Pad1_ Net-_Q10-Pad1_ eSim_PNP
+R13 Net-_C2-Pad1_ Net-_Q10-Pad1_ 2k
+C2 Net-_C2-Pad1_ Net-_C2-Pad2_ 10pF
+R17 Net-_C2-Pad2_ Net-_Q21-Pad1_ 2k
+R18 Net-_Q21-Pad1_ Net-_Q21-Pad2_ 200
+Q21 Net-_Q21-Pad1_ Net-_Q21-Pad2_ Net-_Q21-Pad3_ eSim_NPN
+R20 Net-_Q21-Pad2_ Net-_Q10-Pad1_ 6k
+R22 Net-_Q21-Pad3_ Net-_Q23-Pad3_ 50
+R21 Net-_Q21-Pad3_ Net-_R21-Pad2_ 50k
+R24 Net-_Q12-Pad1_ Net-_Q23-Pad3_ 0.03
+R23 Net-_Q23-Pad3_ Net-_Q22-Pad3_ 1k
+Q22 Net-_Q2-Pad3_ Net-_Q10-Pad1_ Net-_Q22-Pad3_ eSim_NPN
+Q23 Net-_Q2-Pad3_ Net-_Q22-Pad3_ Net-_Q23-Pad3_ eSim_NPN
+U3 Net-_R21-Pad2_ Net-_Q2-Pad3_ zener
+U1 Net-_Q2-Pad3_ Net-_Q12-Pad1_ Net-_J1-Pad2_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/lm123_sub/lm123_sub.cir.out b/library/SubcircuitLibrary/lm123_sub/lm123_sub.cir.out
new file mode 100644
index 00000000..b71432eb
--- /dev/null
+++ b/library/SubcircuitLibrary/lm123_sub/lm123_sub.cir.out
@@ -0,0 +1,77 @@
+* c:\fossee\esim\library\subcircuitlibrary\lm123_sub\lm123_sub.cir
+
+.include PNP.lib
+.include NJF.lib
+.include NPN.lib
+q2 net-_j1-pad1_ net-_j1-pad1_ net-_q2-pad3_ Q2N2907A
+q3 net-_q1-pad2_ net-_j1-pad1_ net-_q2-pad3_ Q2N2907A
+q5 net-_q10-pad1_ net-_j1-pad1_ net-_q2-pad3_ Q2N2907A
+j1 net-_j1-pad1_ net-_j1-pad2_ net-_j1-pad3_ J2N3819
+r1 net-_q4-pad2_ net-_j1-pad3_ 4k
+r2 net-_j1-pad2_ net-_q4-pad2_ 250
+* u2 net-_j1-pad2_ net-_q1-pad2_ zener
+q1 net-_j1-pad1_ net-_q1-pad2_ net-_j1-pad3_ Q2N2222
+q4 net-_q10-pad1_ net-_q4-pad2_ net-_j1-pad2_ Q2N2222
+r3 net-_j1-pad2_ net-_q6-pad3_ 1k
+q6 net-_q6-pad1_ net-_q6-pad2_ net-_q6-pad3_ Q2N2222
+r4 net-_q6-pad1_ net-_q9-pad3_ 2k
+r5 net-_q6-pad2_ net-_q9-pad3_ 1.32k
+r6 net-_q10-pad2_ net-_q6-pad2_ 100
+q7 net-_q10-pad2_ net-_q6-pad3_ net-_q7-pad3_ Q2N2222
+r7 net-_j1-pad2_ net-_q7-pad3_ 100
+q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222
+r8 net-_j1-pad2_ net-_q10-pad3_ 12k
+r10 net-_j1-pad2_ net-_q11-pad3_ 1k
+q11 net-_c1-pad1_ net-_q10-pad3_ net-_q11-pad3_ Q2N2222
+q14 net-_q13-pad3_ net-_q13-pad3_ net-_q14-pad3_ Q2N2222
+r11 net-_j1-pad2_ net-_q14-pad3_ 4k
+q13 net-_c1-pad2_ net-_c1-pad1_ net-_q13-pad3_ Q2N2222
+q16 net-_c1-pad2_ net-_q13-pad3_ net-_j1-pad2_ Q2N2222
+r9 net-_c1-pad1_ net-_q12-pad3_ 20k
+c1 net-_c1-pad1_ net-_c1-pad2_ 30pf
+q12 net-_q12-pad1_ net-_q12-pad2_ net-_q12-pad3_ Q2N2222
+q9 net-_q6-pad1_ net-_q6-pad1_ net-_q9-pad3_ Q2N2222
+q8 net-_j1-pad1_ net-_q12-pad1_ net-_q6-pad1_ Q2N2222
+r14 net-_q12-pad2_ net-_q12-pad1_ 50k
+r15 net-_q20-pad3_ net-_q12-pad2_ 500
+q20 net-_q12-pad1_ net-_q12-pad1_ net-_q20-pad3_ Q2N2222
+r16 net-_j1-pad2_ net-_q20-pad3_ 20k
+r19 net-_j1-pad2_ net-_q12-pad1_ 4k
+* u4 net-_j1-pad2_ net-_q12-pad1_ zener
+q19 net-_c2-pad1_ net-_c2-pad2_ net-_q12-pad1_ Q2N2222
+q17 net-_j1-pad2_ net-_c1-pad2_ net-_q10-pad1_ Q2N2907A
+r12 net-_c1-pad2_ net-_q15-pad3_ 1k
+q15 net-_q10-pad1_ net-_q10-pad1_ net-_q15-pad3_ Q2N2222
+q18 net-_j1-pad2_ net-_c2-pad1_ net-_q10-pad1_ Q2N2907A
+r13 net-_c2-pad1_ net-_q10-pad1_ 2k
+c2 net-_c2-pad1_ net-_c2-pad2_ 10pf
+r17 net-_c2-pad2_ net-_q21-pad1_ 2k
+r18 net-_q21-pad1_ net-_q21-pad2_ 200
+q21 net-_q21-pad1_ net-_q21-pad2_ net-_q21-pad3_ Q2N2222
+r20 net-_q21-pad2_ net-_q10-pad1_ 6k
+r22 net-_q21-pad3_ net-_q23-pad3_ 50
+r21 net-_q21-pad3_ net-_r21-pad2_ 50k
+r24 net-_q12-pad1_ net-_q23-pad3_ 0.03
+r23 net-_q23-pad3_ net-_q22-pad3_ 1k
+q22 net-_q2-pad3_ net-_q10-pad1_ net-_q22-pad3_ Q2N2222
+q23 net-_q2-pad3_ net-_q22-pad3_ net-_q23-pad3_ Q2N2222
+* u3 net-_r21-pad2_ net-_q2-pad3_ zener
+* u1 net-_q2-pad3_ net-_q12-pad1_ net-_j1-pad2_ port
+a1 net-_j1-pad2_ net-_q1-pad2_ u2
+a2 net-_j1-pad2_ net-_q12-pad1_ u4
+a3 net-_r21-pad2_ net-_q2-pad3_ u3
+* Schematic Name: zener, NgSpice Name: zener
+.model u2 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+* Schematic Name: zener, NgSpice Name: zener
+.model u4 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+* Schematic Name: zener, NgSpice Name: zener
+.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/lm123_sub/lm123_sub.pro b/library/SubcircuitLibrary/lm123_sub/lm123_sub.pro
new file mode 100644
index 00000000..e27a398b
--- /dev/null
+++ b/library/SubcircuitLibrary/lm123_sub/lm123_sub.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/lm123_sub/lm123_sub.sch b/library/SubcircuitLibrary/lm123_sub/lm123_sub.sch
new file mode 100644
index 00000000..45edcf59
--- /dev/null
+++ b/library/SubcircuitLibrary/lm123_sub/lm123_sub.sch
@@ -0,0 +1,976 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:lm123_sub-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
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+Date ""
+Rev ""
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+Connection ~ 5100 4800
+Wire Wire Line
+ 5450 4200 5300 4200
+Wire Wire Line
+ 5300 4200 5300 4800
+Connection ~ 5300 4800
+Wire Wire Line
+ 6400 4200 5750 4200
+Wire Wire Line
+ 5100 4150 5100 3900
+Wire Wire Line
+ 3900 3150 10650 3150
+Wire Wire Line
+ 5100 3500 5100 3150
+Connection ~ 5100 3150
+Wire Wire Line
+ 7400 3500 7400 3850
+Wire Wire Line
+ 7400 2650 7400 3200
+Connection ~ 7400 3150
+Wire Wire Line
+ 5400 3700 7400 3700
+Connection ~ 7400 3700
+Wire Wire Line
+ 7750 3900 7750 5850
+Wire Wire Line
+ 7750 6150 7750 6300
+Connection ~ 7750 6300
+Wire Wire Line
+ 8800 5850 8800 3150
+Connection ~ 8800 3150
+Wire Wire Line
+ 8050 3700 8300 3700
+Wire Wire Line
+ 8300 3700 8300 3150
+Connection ~ 8300 3150
+Wire Wire Line
+ 7750 3500 7750 3150
+Connection ~ 7750 3150
+Wire Wire Line
+ 7400 4150 7400 4300
+Wire Wire Line
+ 7400 4300 7750 4300
+Connection ~ 7750 4300
+Wire Wire Line
+ 6400 2400 6400 4900
+Wire Wire Line
+ 5800 4600 6400 4600
+Connection ~ 6400 4600
+Connection ~ 6400 4200
+Wire Wire Line
+ 6850 2800 6850 6300
+Connection ~ 6850 6300
+Wire Wire Line
+ 6400 2100 6400 1900
+Wire Wire Line
+ 6400 1500 6400 1200
+Connection ~ 6400 1200
+Wire Wire Line
+ 6100 1700 5900 1700
+Wire Wire Line
+ 5900 1700 5900 1200
+Connection ~ 5900 1200
+Wire Wire Line
+ 7000 1450 7000 1200
+Connection ~ 7000 1200
+Wire Wire Line
+ 6550 2600 6400 2600
+Connection ~ 6400 2600
+Wire Wire Line
+ 6850 2400 6850 1200
+Connection ~ 6850 1200
+Wire Wire Line
+ 7000 1850 7000 2900
+Wire Wire Line
+ 7000 2900 6850 2900
+Connection ~ 6850 2900
+Wire Wire Line
+ 7400 1550 7400 2250
+Wire Wire Line
+ 7300 1650 7900 1650
+Connection ~ 7400 1650
+Wire Wire Line
+ 7900 1650 7900 1750
+Wire Wire Line
+ 7900 2050 7900 2450
+Wire Wire Line
+ 7700 2450 8150 2450
+Connection ~ 7900 2450
+Wire Wire Line
+ 8450 2450 8700 2450
+Wire Wire Line
+ 8550 2150 8550 2450
+Connection ~ 8550 2450
+Wire Wire Line
+ 9100 2450 9450 2450
+Wire Wire Line
+ 8900 1600 8900 2150
+Wire Wire Line
+ 8550 1850 8550 1750
+Wire Wire Line
+ 8550 1750 8900 1750
+Connection ~ 8900 1750
+Wire Wire Line
+ 8900 1300 8900 1200
+Connection ~ 8900 1200
+Wire Wire Line
+ 9350 1150 9350 1300
+Wire Wire Line
+ 9350 1600 9350 2450
+Connection ~ 9350 2450
+Wire Wire Line
+ 9750 1000 9750 850
+Wire Wire Line
+ 9750 850 10400 850
+Connection ~ 10400 850
+Wire Wire Line
+ 9750 1400 9750 1500
+Wire Wire Line
+ 9750 1500 10100 1500
+Wire Wire Line
+ 10000 1800 10000 1500
+Connection ~ 10000 1500
+Wire Wire Line
+ 10000 2100 10000 2450
+Wire Wire Line
+ 9750 2450 10400 2450
+Wire Wire Line
+ 10400 1700 10400 2800
+Connection ~ 10000 2450
+Connection ~ 10400 2450
+Wire Wire Line
+ 10400 3150 10400 3100
+Connection ~ 10400 3150
+Wire Wire Line
+ 9650 4600 9650 3150
+Connection ~ 9650 3150
+Connection ~ 1000 6300
+Wire Wire Line
+ 7400 1250 7400 1200
+Connection ~ 7400 1200
+$Comp
+L PORT U1
+U 1 1 665D1194
+P 1250 550
+F 0 "U1" H 1300 650 30 0000 C CNN
+F 1 "PORT" H 1250 550 30 0000 C CNN
+F 2 "" H 1250 550 60 0000 C CNN
+F 3 "" H 1250 550 60 0000 C CNN
+ 1 1250 550
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 665D1335
+P 10750 6300
+F 0 "U1" H 10800 6400 30 0000 C CNN
+F 1 "PORT" H 10750 6300 30 0000 C CNN
+F 2 "" H 10750 6300 60 0000 C CNN
+F 3 "" H 10750 6300 60 0000 C CNN
+ 3 10750 6300
+ -1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 665D1462
+P 10900 3150
+F 0 "U1" H 10950 3250 30 0000 C CNN
+F 1 "PORT" H 10900 3150 30 0000 C CNN
+F 2 "" H 10900 3150 60 0000 C CNN
+F 3 "" H 10900 3150 60 0000 C CNN
+ 2 10900 3150
+ -1 0 0 -1
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/lm123_sub/lm123_sub.sub b/library/SubcircuitLibrary/lm123_sub/lm123_sub.sub
new file mode 100644
index 00000000..3c5d491e
--- /dev/null
+++ b/library/SubcircuitLibrary/lm123_sub/lm123_sub.sub
@@ -0,0 +1,71 @@
+* Subcircuit lm123_sub
+.subckt lm123_sub net-_q2-pad3_ net-_q12-pad1_ net-_j1-pad2_
+* c:\fossee\esim\library\subcircuitlibrary\lm123_sub\lm123_sub.cir
+.include PNP.lib
+.include NJF.lib
+.include NPN.lib
+q2 net-_j1-pad1_ net-_j1-pad1_ net-_q2-pad3_ Q2N2907A
+q3 net-_q1-pad2_ net-_j1-pad1_ net-_q2-pad3_ Q2N2907A
+q5 net-_q10-pad1_ net-_j1-pad1_ net-_q2-pad3_ Q2N2907A
+j1 net-_j1-pad1_ net-_j1-pad2_ net-_j1-pad3_ J2N3819
+r1 net-_q4-pad2_ net-_j1-pad3_ 4k
+r2 net-_j1-pad2_ net-_q4-pad2_ 250
+* u2 net-_j1-pad2_ net-_q1-pad2_ zener
+q1 net-_j1-pad1_ net-_q1-pad2_ net-_j1-pad3_ Q2N2222
+q4 net-_q10-pad1_ net-_q4-pad2_ net-_j1-pad2_ Q2N2222
+r3 net-_j1-pad2_ net-_q6-pad3_ 1k
+q6 net-_q6-pad1_ net-_q6-pad2_ net-_q6-pad3_ Q2N2222
+r4 net-_q6-pad1_ net-_q9-pad3_ 2k
+r5 net-_q6-pad2_ net-_q9-pad3_ 1.32k
+r6 net-_q10-pad2_ net-_q6-pad2_ 100
+q7 net-_q10-pad2_ net-_q6-pad3_ net-_q7-pad3_ Q2N2222
+r7 net-_j1-pad2_ net-_q7-pad3_ 100
+q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222
+r8 net-_j1-pad2_ net-_q10-pad3_ 12k
+r10 net-_j1-pad2_ net-_q11-pad3_ 1k
+q11 net-_c1-pad1_ net-_q10-pad3_ net-_q11-pad3_ Q2N2222
+q14 net-_q13-pad3_ net-_q13-pad3_ net-_q14-pad3_ Q2N2222
+r11 net-_j1-pad2_ net-_q14-pad3_ 4k
+q13 net-_c1-pad2_ net-_c1-pad1_ net-_q13-pad3_ Q2N2222
+q16 net-_c1-pad2_ net-_q13-pad3_ net-_j1-pad2_ Q2N2222
+r9 net-_c1-pad1_ net-_q12-pad3_ 20k
+c1 net-_c1-pad1_ net-_c1-pad2_ 30pf
+q12 net-_q12-pad1_ net-_q12-pad2_ net-_q12-pad3_ Q2N2222
+q9 net-_q6-pad1_ net-_q6-pad1_ net-_q9-pad3_ Q2N2222
+q8 net-_j1-pad1_ net-_q12-pad1_ net-_q6-pad1_ Q2N2222
+r14 net-_q12-pad2_ net-_q12-pad1_ 50k
+r15 net-_q20-pad3_ net-_q12-pad2_ 500
+q20 net-_q12-pad1_ net-_q12-pad1_ net-_q20-pad3_ Q2N2222
+r16 net-_j1-pad2_ net-_q20-pad3_ 20k
+r19 net-_j1-pad2_ net-_q12-pad1_ 4k
+* u4 net-_j1-pad2_ net-_q12-pad1_ zener
+q19 net-_c2-pad1_ net-_c2-pad2_ net-_q12-pad1_ Q2N2222
+q17 net-_j1-pad2_ net-_c1-pad2_ net-_q10-pad1_ Q2N2907A
+r12 net-_c1-pad2_ net-_q15-pad3_ 1k
+q15 net-_q10-pad1_ net-_q10-pad1_ net-_q15-pad3_ Q2N2222
+q18 net-_j1-pad2_ net-_c2-pad1_ net-_q10-pad1_ Q2N2907A
+r13 net-_c2-pad1_ net-_q10-pad1_ 2k
+c2 net-_c2-pad1_ net-_c2-pad2_ 10pf
+r17 net-_c2-pad2_ net-_q21-pad1_ 2k
+r18 net-_q21-pad1_ net-_q21-pad2_ 200
+q21 net-_q21-pad1_ net-_q21-pad2_ net-_q21-pad3_ Q2N2222
+r20 net-_q21-pad2_ net-_q10-pad1_ 6k
+r22 net-_q21-pad3_ net-_q23-pad3_ 50
+r21 net-_q21-pad3_ net-_r21-pad2_ 50k
+r24 net-_q12-pad1_ net-_q23-pad3_ 0.03
+r23 net-_q23-pad3_ net-_q22-pad3_ 1k
+q22 net-_q2-pad3_ net-_q10-pad1_ net-_q22-pad3_ Q2N2222
+q23 net-_q2-pad3_ net-_q22-pad3_ net-_q23-pad3_ Q2N2222
+* u3 net-_r21-pad2_ net-_q2-pad3_ zener
+a1 net-_j1-pad2_ net-_q1-pad2_ u2
+a2 net-_j1-pad2_ net-_q12-pad1_ u4
+a3 net-_r21-pad2_ net-_q2-pad3_ u3
+* Schematic Name: zener, NgSpice Name: zener
+.model u2 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+* Schematic Name: zener, NgSpice Name: zener
+.model u4 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+* Schematic Name: zener, NgSpice Name: zener
+.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+* Control Statements
+
+.ends lm123_sub \ No newline at end of file
diff --git a/library/SubcircuitLibrary/lm123_sub/lm123_sub_Previous_Values.xml b/library/SubcircuitLibrary/lm123_sub/lm123_sub_Previous_Values.xml
new file mode 100644
index 00000000..176e25f3
--- /dev/null
+++ b/library/SubcircuitLibrary/lm123_sub/lm123_sub_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u2 name="type">zener<field1 name="Enter Breakdown Voltage (default=5.6)">5.6</field1><field2 name="Enter Breakdown Current (default=2.0e-2)">2.0e-2</field2><field3 name="Enter Saturation Current (default=1.0e-12)">1.0e-12</field3><field4 name="Enter Forward Emission Coefficient (default=1.0)">1.0</field4><field5 name="Enter Switch for Limiting (default=FALSE)">FALSE</field5></u2><u4 name="type">zener<field6 name="Enter Breakdown Voltage (default=5.6)">5.6</field6><field7 name="Enter Breakdown Current (default=2.0e-2)">2.0e-2</field7><field8 name="Enter Saturation Current (default=1.0e-12)">1.0e-12</field8><field9 name="Enter Forward Emission Coefficient (default=1.0)">1.0</field9><field10 name="Enter Switch for Limiting (default=FALSE)">FALSE</field10></u4><u3 name="type">zener<field11 name="Enter Breakdown Voltage (default=5.6)">5.6</field11><field12 name="Enter Breakdown Current (default=2.0e-2)">2.0e-2</field12><field13 name="Enter Saturation Current (default=1.0e-12)">1.0e-12</field13><field14 name="Enter Forward Emission Coefficient (default=1.0)">1.0</field14><field15 name="Enter Switch for Limiting (default=FALSE)">FALSE</field15></u3></model><devicemodel><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q2><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q3><q5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q5><j1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\NJF.lib</field></j1><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q1><q4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q4><q6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q6><q7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q7><q10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q10><q11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q11><q14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q14><q13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q13><q16><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q16><q12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q12><q9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q9><q8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q8><q20><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q20><q19><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q19><q17><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q17><q15><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q15><q18><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q18><q21><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q21><q22><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q22><q23><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q23></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
generated by cgit (git 2.34.1) at 2024-12-19 17:15:18 +0000