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-rw-r--r--library/SubcircuitLibrary/TS391_sub/D.lib2
-rw-r--r--library/SubcircuitLibrary/TS391_sub/NPN.lib4
-rw-r--r--library/SubcircuitLibrary/TS391_sub/PNP.lib4
-rw-r--r--library/SubcircuitLibrary/TS391_sub/TS391_IC-cache.lib147
-rw-r--r--library/SubcircuitLibrary/TS391_sub/TS391_IC.cir29
-rw-r--r--library/SubcircuitLibrary/TS391_sub/TS391_IC.cir.out33
-rw-r--r--library/SubcircuitLibrary/TS391_sub/TS391_IC.pro73
-rw-r--r--library/SubcircuitLibrary/TS391_sub/TS391_IC.sch451
-rw-r--r--library/SubcircuitLibrary/TS391_sub/TS391_IC.sub27
-rw-r--r--library/SubcircuitLibrary/TS391_sub/TS391_IC_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/TS391_sub/analysis1
11 files changed, 772 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/TS391_sub/D.lib b/library/SubcircuitLibrary/TS391_sub/D.lib
new file mode 100644
index 00000000..f53bf3e0
--- /dev/null
+++ b/library/SubcircuitLibrary/TS391_sub/D.lib
@@ -0,0 +1,2 @@
+.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/TS391_sub/NPN.lib b/library/SubcircuitLibrary/TS391_sub/NPN.lib
new file mode 100644
index 00000000..be5f3073
--- /dev/null
+++ b/library/SubcircuitLibrary/TS391_sub/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/TS391_sub/PNP.lib b/library/SubcircuitLibrary/TS391_sub/PNP.lib
new file mode 100644
index 00000000..7edda0ea
--- /dev/null
+++ b/library/SubcircuitLibrary/TS391_sub/PNP.lib
@@ -0,0 +1,4 @@
+.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/TS391_sub/TS391_IC-cache.lib b/library/SubcircuitLibrary/TS391_sub/TS391_IC-cache.lib
new file mode 100644
index 00000000..4e32f85d
--- /dev/null
+++ b/library/SubcircuitLibrary/TS391_sub/TS391_IC-cache.lib
@@ -0,0 +1,147 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# dc
+#
+DEF dc I 0 40 Y Y 1 F N
+F0 "I" -200 100 60 H V C CNN
+F1 "dc" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+C 0 0 150 0 1 0 N
+P 2 0 1 0 0 -100 0 -100 N
+P 2 0 1 0 0 100 -50 50 N
+P 2 0 1 0 0 100 0 -100 N
+P 2 0 1 0 0 100 50 50 N
+X ~ 1 0 450 300 D 50 50 1 1 P
+X ~ 2 0 -450 300 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/TS391_sub/TS391_IC.cir b/library/SubcircuitLibrary/TS391_sub/TS391_IC.cir
new file mode 100644
index 00000000..80ee839f
--- /dev/null
+++ b/library/SubcircuitLibrary/TS391_sub/TS391_IC.cir
@@ -0,0 +1,29 @@
+* D:\FOSSEE\eSim\library\SubcircuitLibrary\TS391_IC\TS391_IC.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 06/22/24 20:07:00
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+I1 Net-_I1-Pad1_ Net-_D2-Pad1_ 3.5u
+I2 Net-_I1-Pad1_ Net-_I2-Pad2_ 100u
+I3 Net-_I1-Pad1_ Net-_D3-Pad1_ 3.5u
+I4 Net-_I1-Pad1_ Net-_I4-Pad2_ 100u
+D2 Net-_D2-Pad1_ Net-_D1-Pad2_ eSim_Diode
+Q4 Net-_Q4-Pad1_ Net-_D3-Pad2_ Net-_I2-Pad2_ eSim_PNP
+Q2 Net-_Q2-Pad1_ Net-_D1-Pad2_ Net-_I2-Pad2_ eSim_PNP
+D1 Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode
+Q1 Net-_Q1-Pad1_ Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_PNP
+Q3 Net-_Q2-Pad1_ Net-_Q2-Pad1_ Net-_Q1-Pad1_ eSim_NPN
+Q5 Net-_Q4-Pad1_ Net-_Q2-Pad1_ Net-_Q1-Pad1_ eSim_NPN
+D3 Net-_D3-Pad1_ Net-_D3-Pad2_ eSim_Diode
+D4 Net-_D4-Pad1_ Net-_D3-Pad2_ eSim_Diode
+Q6 Net-_Q1-Pad1_ Net-_D4-Pad1_ Net-_D3-Pad2_ eSim_PNP
+Q7 Net-_I4-Pad2_ Net-_Q4-Pad1_ Net-_Q1-Pad1_ eSim_NPN
+Q8 Net-_Q8-Pad1_ Net-_I4-Pad2_ Net-_Q1-Pad1_ eSim_NPN
+R2 Net-_I1-Pad1_ Net-_Q8-Pad1_ 3.5k
+R1 Net-_R1-Pad1_ Net-_D4-Pad1_ 1k
+U1 Net-_Q8-Pad1_ Net-_Q1-Pad1_ Net-_R1-Pad1_ Net-_D1-Pad1_ Net-_I1-Pad1_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/TS391_sub/TS391_IC.cir.out b/library/SubcircuitLibrary/TS391_sub/TS391_IC.cir.out
new file mode 100644
index 00000000..f88d796d
--- /dev/null
+++ b/library/SubcircuitLibrary/TS391_sub/TS391_IC.cir.out
@@ -0,0 +1,33 @@
+* d:\fossee\esim\library\subcircuitlibrary\ts391_ic\ts391_ic.cir
+
+.include NPN.lib
+.include PNP.lib
+.include D.lib
+i1 net-_i1-pad1_ net-_d2-pad1_ 3.5u
+i2 net-_i1-pad1_ net-_i2-pad2_ 100u
+i3 net-_i1-pad1_ net-_d3-pad1_ 3.5u
+i4 net-_i1-pad1_ net-_i4-pad2_ 100u
+d2 net-_d2-pad1_ net-_d1-pad2_ 1N4148
+q4 net-_q4-pad1_ net-_d3-pad2_ net-_i2-pad2_ Q2N2907A
+q2 net-_q2-pad1_ net-_d1-pad2_ net-_i2-pad2_ Q2N2907A
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+q1 net-_q1-pad1_ net-_d1-pad1_ net-_d1-pad2_ Q2N2907A
+q3 net-_q2-pad1_ net-_q2-pad1_ net-_q1-pad1_ Q2N2222
+q5 net-_q4-pad1_ net-_q2-pad1_ net-_q1-pad1_ Q2N2222
+d3 net-_d3-pad1_ net-_d3-pad2_ 1N4148
+d4 net-_d4-pad1_ net-_d3-pad2_ 1N4148
+q6 net-_q1-pad1_ net-_d4-pad1_ net-_d3-pad2_ Q2N2907A
+q7 net-_i4-pad2_ net-_q4-pad1_ net-_q1-pad1_ Q2N2222
+q8 net-_q8-pad1_ net-_i4-pad2_ net-_q1-pad1_ Q2N2222
+r2 net-_i1-pad1_ net-_q8-pad1_ 3.5k
+r1 net-_r1-pad1_ net-_d4-pad1_ 1k
+* u1 net-_q8-pad1_ net-_q1-pad1_ net-_r1-pad1_ net-_d1-pad1_ net-_i1-pad1_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/TS391_sub/TS391_IC.pro b/library/SubcircuitLibrary/TS391_sub/TS391_IC.pro
new file mode 100644
index 00000000..e27a398b
--- /dev/null
+++ b/library/SubcircuitLibrary/TS391_sub/TS391_IC.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/TS391_sub/TS391_IC.sch b/library/SubcircuitLibrary/TS391_sub/TS391_IC.sch
new file mode 100644
index 00000000..ff55972c
--- /dev/null
+++ b/library/SubcircuitLibrary/TS391_sub/TS391_IC.sch
@@ -0,0 +1,451 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:TS391-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L dc I1
+U 1 1 6676E0A1
+P 3550 1900
+F 0 "I1" H 3350 2000 60 0000 C CNN
+F 1 "3.5u" H 3350 1850 60 0000 C CNN
+F 2 "R1" H 3250 1900 60 0000 C CNN
+F 3 "" H 3550 1900 60 0000 C CNN
+ 1 3550 1900
+ 1 0 0 -1
+$EndComp
+$Comp
+L dc I2
+U 1 1 6676E0A2
+P 4750 2100
+F 0 "I2" H 4550 2200 60 0000 C CNN
+F 1 "100u" H 4550 2050 60 0000 C CNN
+F 2 "R1" H 4450 2100 60 0000 C CNN
+F 3 "" H 4750 2100 60 0000 C CNN
+ 1 4750 2100
+ 1 0 0 -1
+$EndComp
+$Comp
+L dc I3
+U 1 1 6676E0A3
+P 5750 1900
+F 0 "I3" H 5550 2000 60 0000 C CNN
+F 1 "3.5u" H 5550 1850 60 0000 C CNN
+F 2 "R1" H 5450 1900 60 0000 C CNN
+F 3 "" H 5750 1900 60 0000 C CNN
+ 1 5750 1900
+ 1 0 0 -1
+$EndComp
+$Comp
+L dc I4
+U 1 1 6676E0A4
+P 6850 2100
+F 0 "I4" H 6650 2200 60 0000 C CNN
+F 1 "100u" H 6650 2050 60 0000 C CNN
+F 2 "R1" H 6550 2100 60 0000 C CNN
+F 3 "" H 6850 2100 60 0000 C CNN
+ 1 6850 2100
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_Diode D2
+U 1 1 6676E0A5
+P 3550 2650
+F 0 "D2" H 3550 2750 50 0000 C CNN
+F 1 "eSim_Diode" H 3550 2550 50 0000 C CNN
+F 2 "" H 3550 2650 60 0000 C CNN
+F 3 "" H 3550 2650 60 0000 C CNN
+ 1 3550 2650
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_PNP Q4
+U 1 1 6676E0A6
+P 5200 3000
+F 0 "Q4" H 5100 3050 50 0000 R CNN
+F 1 "eSim_PNP" H 5150 3150 50 0000 R CNN
+F 2 "" H 5400 3100 29 0000 C CNN
+F 3 "" H 5200 3000 60 0000 C CNN
+ 1 5200 3000
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q2
+U 1 1 6676E0A7
+P 4450 3000
+F 0 "Q2" H 4350 3050 50 0000 R CNN
+F 1 "eSim_PNP" H 4400 3150 50 0000 R CNN
+F 2 "" H 4650 3100 29 0000 C CNN
+F 3 "" H 4450 3000 60 0000 C CNN
+ 1 4450 3000
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_Diode D1
+U 1 1 6676E0A8
+P 3150 2900
+F 0 "D1" H 3150 3000 50 0000 C CNN
+F 1 "eSim_Diode" H 3150 2800 50 0000 C CNN
+F 2 "" H 3150 2900 60 0000 C CNN
+F 3 "" H 3150 2900 60 0000 C CNN
+ 1 3150 2900
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q1
+U 1 1 6676E0A9
+P 3350 3350
+F 0 "Q1" H 3250 3400 50 0000 R CNN
+F 1 "eSim_PNP" H 3300 3500 50 0000 R CNN
+F 2 "" H 3550 3450 29 0000 C CNN
+F 3 "" H 3350 3350 60 0000 C CNN
+ 1 3350 3350
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q3
+U 1 1 6676E0AA
+P 4550 4350
+F 0 "Q3" H 4450 4400 50 0000 R CNN
+F 1 "eSim_NPN" H 4500 4500 50 0000 R CNN
+F 2 "" H 4750 4450 29 0000 C CNN
+F 3 "" H 4550 4350 60 0000 C CNN
+ 1 4550 4350
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q5
+U 1 1 6676E0AB
+P 5250 4350
+F 0 "Q5" H 5150 4400 50 0000 R CNN
+F 1 "eSim_NPN" H 5200 4500 50 0000 R CNN
+F 2 "" H 5450 4450 29 0000 C CNN
+F 3 "" H 5250 4350 60 0000 C CNN
+ 1 5250 4350
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_Diode D3
+U 1 1 6676E0AC
+P 5750 2700
+F 0 "D3" H 5750 2800 50 0000 C CNN
+F 1 "eSim_Diode" H 5750 2600 50 0000 C CNN
+F 2 "" H 5750 2700 60 0000 C CNN
+F 3 "" H 5750 2700 60 0000 C CNN
+ 1 5750 2700
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_Diode D4
+U 1 1 6676E0AD
+P 6150 2950
+F 0 "D4" H 6150 3050 50 0000 C CNN
+F 1 "eSim_Diode" H 6150 2850 50 0000 C CNN
+F 2 "" H 6150 2950 60 0000 C CNN
+F 3 "" H 6150 2950 60 0000 C CNN
+ 1 6150 2950
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q6
+U 1 1 6676E0AE
+P 5950 3350
+F 0 "Q6" H 5850 3400 50 0000 R CNN
+F 1 "eSim_PNP" H 5900 3500 50 0000 R CNN
+F 2 "" H 6150 3450 29 0000 C CNN
+F 3 "" H 5950 3350 60 0000 C CNN
+ 1 5950 3350
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q7
+U 1 1 6676E0AF
+P 6750 3750
+F 0 "Q7" H 6650 3800 50 0000 R CNN
+F 1 "eSim_NPN" H 6700 3900 50 0000 R CNN
+F 2 "" H 6950 3850 29 0000 C CNN
+F 3 "" H 6750 3750 60 0000 C CNN
+ 1 6750 3750
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q8
+U 1 1 6676E0B0
+P 7250 2950
+F 0 "Q8" H 7150 3000 50 0000 R CNN
+F 1 "eSim_NPN" H 7200 3100 50 0000 R CNN
+F 2 "" H 7450 3050 29 0000 C CNN
+F 3 "" H 7250 2950 60 0000 C CNN
+ 1 7250 2950
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R2
+U 1 1 6676E0BC
+P 7400 1350
+F 0 "R2" H 7450 1480 50 0000 C CNN
+F 1 "3.5k" H 7450 1300 50 0000 C CNN
+F 2 "" H 7450 1330 30 0000 C CNN
+F 3 "" V 7450 1400 30 0000 C CNN
+ 1 7400 1350
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4550 2800 4550 2750
+Wire Wire Line
+ 4550 2750 5100 2750
+Wire Wire Line
+ 5100 2750 5100 2800
+Wire Wire Line
+ 4750 2550 4750 2750
+Connection ~ 4750 2750
+Wire Wire Line
+ 3450 3000 4250 3000
+Wire Wire Line
+ 3450 3000 3450 3150
+Wire Wire Line
+ 3550 2800 3550 3000
+Connection ~ 3550 3000
+Wire Wire Line
+ 3300 2900 3550 2900
+Connection ~ 3550 2900
+Wire Wire Line
+ 3550 2500 3550 2350
+Wire Wire Line
+ 3150 3350 2850 3350
+Wire Wire Line
+ 2850 3350 2850 2900
+Wire Wire Line
+ 2100 2900 3000 2900
+Wire Wire Line
+ 4750 4350 5050 4350
+Wire Wire Line
+ 4550 3200 4550 4050
+Wire Wire Line
+ 4550 4050 4450 4050
+Wire Wire Line
+ 4450 4050 4450 4150
+Wire Wire Line
+ 5100 3200 5100 4050
+Wire Wire Line
+ 5100 4050 5350 4050
+Wire Wire Line
+ 5350 4050 5350 4150
+Wire Wire Line
+ 4550 3900 4850 3900
+Wire Wire Line
+ 4850 3900 4850 4350
+Connection ~ 4850 4350
+Connection ~ 4550 3900
+Wire Wire Line
+ 5750 2550 5750 2350
+Wire Wire Line
+ 5850 3000 5850 3150
+Wire Wire Line
+ 5400 3000 5850 3000
+Wire Wire Line
+ 5750 2850 5750 3000
+Connection ~ 5750 3000
+Wire Wire Line
+ 6000 2950 5750 2950
+Connection ~ 5750 2950
+Wire Wire Line
+ 3550 1450 3550 1100
+Wire Wire Line
+ 3550 1100 6850 1100
+Wire Wire Line
+ 6850 1100 6850 1650
+Wire Wire Line
+ 5750 1450 5750 1100
+Connection ~ 5750 1100
+Wire Wire Line
+ 4750 1650 4750 1100
+Connection ~ 4750 1100
+Wire Wire Line
+ 6550 3750 5100 3750
+Connection ~ 5100 3750
+Wire Wire Line
+ 6850 2550 6850 3550
+Wire Wire Line
+ 4450 4550 4450 4850
+Wire Wire Line
+ 4450 4850 7250 4850
+Wire Wire Line
+ 6850 4850 6850 3950
+Wire Wire Line
+ 5350 4550 5350 4850
+Connection ~ 5350 4850
+Wire Wire Line
+ 6300 2950 6450 2950
+Wire Wire Line
+ 6450 2950 6450 4100
+Wire Wire Line
+ 6450 3350 6150 3350
+Connection ~ 6850 4850
+Wire Wire Line
+ 5150 750 5150 1100
+Connection ~ 5150 1100
+Wire Wire Line
+ 3450 3550 3450 5000
+Wire Wire Line
+ 3450 5000 6900 5000
+Wire Wire Line
+ 6900 5000 6900 4850
+Connection ~ 6900 4850
+Wire Wire Line
+ 5850 3550 5850 5100
+Wire Wire Line
+ 5850 5100 7000 5100
+Wire Wire Line
+ 7000 5100 7000 4850
+Connection ~ 7000 4850
+Wire Wire Line
+ 7050 2950 6850 2950
+Connection ~ 6850 2950
+Wire Wire Line
+ 7350 3150 7350 4100
+Wire Wire Line
+ 7350 4100 6950 4100
+Wire Wire Line
+ 6950 4100 6950 4850
+Connection ~ 6950 4850
+Wire Wire Line
+ 1750 4100 2300 4100
+Connection ~ 6450 3350
+Connection ~ 2850 2900
+Wire Wire Line
+ 7600 1300 7600 2750
+Connection ~ 7600 2750
+Wire Wire Line
+ 7300 1300 7100 1300
+Wire Wire Line
+ 7100 1300 7100 550
+Wire Wire Line
+ 7100 550 5050 550
+Wire Wire Line
+ 5050 550 5050 900
+Wire Wire Line
+ 5050 900 5150 900
+Connection ~ 5150 900
+Wire Wire Line
+ 6450 4100 2600 4100
+$Comp
+L resistor R1
+U 1 1 6676E0BD
+P 2400 4150
+F 0 "R1" H 2450 4280 50 0000 C CNN
+F 1 "1k" H 2450 4100 50 0000 C CNN
+F 2 "" H 2450 4130 30 0000 C CNN
+F 3 "" V 2450 4200 30 0000 C CNN
+ 1 2400 4150
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 1 1 6676E26F
+P 8150 2750
+F 0 "U1" H 8200 2850 30 0000 C CNN
+F 1 "PORT" H 8150 2750 30 0000 C CNN
+F 2 "" H 8150 2750 60 0000 C CNN
+F 3 "" H 8150 2750 60 0000 C CNN
+ 1 8150 2750
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 7350 2750 7900 2750
+$Comp
+L PORT U1
+U 2 1 6676E663
+P 7500 4850
+F 0 "U1" H 7550 4950 30 0000 C CNN
+F 1 "PORT" H 7500 4850 30 0000 C CNN
+F 2 "" H 7500 4850 60 0000 C CNN
+F 3 "" H 7500 4850 60 0000 C CNN
+ 2 7500 4850
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 6676E958
+P 1500 4100
+F 0 "U1" H 1550 4200 30 0000 C CNN
+F 1 "PORT" H 1500 4100 30 0000 C CNN
+F 2 "" H 1500 4100 60 0000 C CNN
+F 3 "" H 1500 4100 60 0000 C CNN
+ 3 1500 4100
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 5 1 6676ED45
+P 5400 750
+F 0 "U1" H 5450 850 30 0000 C CNN
+F 1 "PORT" H 5400 750 30 0000 C CNN
+F 2 "" H 5400 750 60 0000 C CNN
+F 3 "" H 5400 750 60 0000 C CNN
+ 5 5400 750
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 6676FEAD
+P 1850 2900
+F 0 "U1" H 1900 3000 30 0000 C CNN
+F 1 "PORT" H 1850 2900 30 0000 C CNN
+F 2 "" H 1850 2900 60 0000 C CNN
+F 3 "" H 1850 2900 60 0000 C CNN
+ 4 1850 2900
+ 1 0 0 -1
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/TS391_sub/TS391_IC.sub b/library/SubcircuitLibrary/TS391_sub/TS391_IC.sub
new file mode 100644
index 00000000..fbdbaba2
--- /dev/null
+++ b/library/SubcircuitLibrary/TS391_sub/TS391_IC.sub
@@ -0,0 +1,27 @@
+* Subcircuit TS391_IC
+.subckt TS391_IC net-_q8-pad1_ net-_q1-pad1_ net-_r1-pad1_ net-_d1-pad1_ net-_i1-pad1_
+* d:\fossee\esim\library\subcircuitlibrary\ts391_ic\ts391_ic.cir
+.include NPN.lib
+.include PNP.lib
+.include D.lib
+i1 net-_i1-pad1_ net-_d2-pad1_ 3.5u
+i2 net-_i1-pad1_ net-_i2-pad2_ 100u
+i3 net-_i1-pad1_ net-_d3-pad1_ 3.5u
+i4 net-_i1-pad1_ net-_i4-pad2_ 100u
+d2 net-_d2-pad1_ net-_d1-pad2_ 1N4148
+q4 net-_q4-pad1_ net-_d3-pad2_ net-_i2-pad2_ Q2N2907A
+q2 net-_q2-pad1_ net-_d1-pad2_ net-_i2-pad2_ Q2N2907A
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+q1 net-_q1-pad1_ net-_d1-pad1_ net-_d1-pad2_ Q2N2907A
+q3 net-_q2-pad1_ net-_q2-pad1_ net-_q1-pad1_ Q2N2222
+q5 net-_q4-pad1_ net-_q2-pad1_ net-_q1-pad1_ Q2N2222
+d3 net-_d3-pad1_ net-_d3-pad2_ 1N4148
+d4 net-_d4-pad1_ net-_d3-pad2_ 1N4148
+q6 net-_q1-pad1_ net-_d4-pad1_ net-_d3-pad2_ Q2N2907A
+q7 net-_i4-pad2_ net-_q4-pad1_ net-_q1-pad1_ Q2N2222
+q8 net-_q8-pad1_ net-_i4-pad2_ net-_q1-pad1_ Q2N2222
+r2 net-_i1-pad1_ net-_q8-pad1_ 3.5k
+r1 net-_r1-pad1_ net-_d4-pad1_ 1k
+* Control Statements
+
+.ends TS391_IC \ No newline at end of file
diff --git a/library/SubcircuitLibrary/TS391_sub/TS391_IC_Previous_Values.xml b/library/SubcircuitLibrary/TS391_sub/TS391_IC_Previous_Values.xml
new file mode 100644
index 00000000..8353f882
--- /dev/null
+++ b/library/SubcircuitLibrary/TS391_sub/TS391_IC_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source><i1 name="Source type">3.5u</i1><i2 name="Source type">100u</i2><i3 name="Source type">3.5u</i3><i4 name="Source type">100u</i4></source><model /><devicemodel><d2><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d2><q4><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q4><q2><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q2><d1><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1><q1><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q1><q3><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q3><q5><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q5><d3><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d3><d4><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d4><q6><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q6><q7><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q7><q8><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q8></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/TS391_sub/analysis b/library/SubcircuitLibrary/TS391_sub/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/TS391_sub/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file