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-rw-r--r--library/SubcircuitLibrary/TL071/D.lib2
-rw-r--r--library/SubcircuitLibrary/TL071/NPN.lib4
-rw-r--r--library/SubcircuitLibrary/TL071/PJF.lib5
-rw-r--r--library/SubcircuitLibrary/TL071/PNP.lib4
-rw-r--r--library/SubcircuitLibrary/TL071/TL071-cache.lib144
-rw-r--r--library/SubcircuitLibrary/TL071/TL071.cir40
-rw-r--r--library/SubcircuitLibrary/TL071/TL071.cir.out48
-rw-r--r--library/SubcircuitLibrary/TL071/TL071.dcm7
-rw-r--r--library/SubcircuitLibrary/TL071/TL071.pro73
-rw-r--r--library/SubcircuitLibrary/TL071/TL071.sch582
-rw-r--r--library/SubcircuitLibrary/TL071/TL071.sub42
-rw-r--r--library/SubcircuitLibrary/TL071/TL071_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/TL071/analysis1
13 files changed, 953 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/TL071/D.lib b/library/SubcircuitLibrary/TL071/D.lib
new file mode 100644
index 00000000..f53bf3e0
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/D.lib
@@ -0,0 +1,2 @@
+.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/TL071/NPN.lib b/library/SubcircuitLibrary/TL071/NPN.lib
new file mode 100644
index 00000000..be5f3073
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/TL071/PJF.lib b/library/SubcircuitLibrary/TL071/PJF.lib
new file mode 100644
index 00000000..5589571d
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/PJF.lib
@@ -0,0 +1,5 @@
+.model J2N3820 PJF(Beta=1.304m Betatce=-.5 Rd=1 Rs=1 Lambda=2.25m Vto=-3
++ Vtotc=-2.5m Is=33.57f Isr=322.4f N=1 Nr=2 Xti=3 Alpha=311.7u
++ Vk=243.6 Cgd=1.6p M=.3622 Pb=1 Fc=.5 Cgs=2.414p Kf=9.882E-18
++ Af=1)
+
diff --git a/library/SubcircuitLibrary/TL071/PNP.lib b/library/SubcircuitLibrary/TL071/PNP.lib
new file mode 100644
index 00000000..7edda0ea
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/PNP.lib
@@ -0,0 +1,4 @@
+.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/TL071/TL071-cache.lib b/library/SubcircuitLibrary/TL071/TL071-cache.lib
new file mode 100644
index 00000000..f35727ea
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/TL071-cache.lib
@@ -0,0 +1,144 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# eSim_CP1
+#
+DEF eSim_CP1 C 0 10 N N 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_CP1" 25 -100 50 H V L CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+ALIAS capacitor_polarised
+$FPLIST
+ CP_*
+$ENDFPLIST
+DRAW
+A 0 -150 128 1287 513 0 1 20 N -80 -50 80 -50
+P 2 0 1 20 -80 30 80 30 N
+P 2 0 1 0 -70 90 -30 90 N
+P 2 0 1 0 -50 70 -50 110 N
+X ~ 1 0 150 110 D 50 50 1 1 P
+X ~ 2 0 -150 130 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PJF
+#
+DEF eSim_PJF J 0 0 Y N 1 F N
+F0 "J" -100 50 50 H V R CNN
+F1 "eSim_PJF" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS jfet_p
+DRAW
+C 50 0 111 0 1 10 N
+P 3 0 1 10 10 75 10 -75 10 -75 N
+P 3 0 1 0 100 -100 100 -50 10 -50 N
+P 3 0 1 0 100 100 100 55 10 55 N
+P 4 0 1 0 -45 0 -5 15 -5 -15 -45 0 F
+X D 1 100 200 100 D 50 50 1 1 P
+X G 2 -200 0 210 R 50 50 1 1 P
+X S 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# zener
+#
+DEF zener U 0 40 Y Y 1 F N
+F0 "U" -50 -100 60 H V C CNN
+F1 "zener" 0 100 60 H V C CNN
+F2 "" 50 0 60 H V C CNN
+F3 "" 50 0 60 H V C CNN
+DRAW
+P 2 0 1 0 100 -50 50 -100 N
+P 2 0 1 0 100 50 100 -50 N
+P 2 0 1 0 100 50 150 100 N
+P 4 0 1 0 0 50 0 -50 100 0 0 50 N
+X ~ IN -200 0 200 R 50 43 1 1 I
+X ~ OUT 300 0 200 L 50 43 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/TL071/TL071.cir b/library/SubcircuitLibrary/TL071/TL071.cir
new file mode 100644
index 00000000..30e03151
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/TL071.cir
@@ -0,0 +1,40 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\TL071\TL071.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 3/1/2025 11:13:32 AM
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+J1 Net-_J1-Pad1_ vin1 Net-_J1-Pad3_ jfet_p
+J2 Net-_J1-Pad1_ vin2 Net-_C1-Pad1_ jfet_p
+Q3 Net-_J1-Pad1_ Net-_Q12-Pad2_ Net-_Q3-Pad3_ eSim_PNP
+R3 Vcc Net-_Q3-Pad3_ 30R
+Q1 Net-_J1-Pad3_ Net-_Q1-Pad2_ N1 eSim_NPN
+Q4 Net-_C1-Pad1_ Net-_Q1-Pad2_ N2 eSim_NPN
+Q2 Vcc Net-_J1-Pad3_ Net-_Q1-Pad2_ eSim_NPN
+Q5 Vcc Net-_C1-Pad1_ Net-_Q5-Pad3_ eSim_NPN
+R1 N1 Vee 1kR
+R4 N2 Vee 1kR
+R2 Net-_Q1-Pad2_ Vee 50kR
+R5 Net-_Q5-Pad3_ Vee 50kR
+D1 Net-_C1-Pad1_ Net-_C1-Pad2_ eSim_Diode
+C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 18pF
+Q7 Vcc Net-_Q12-Pad2_ Net-_Q10-Pad2_ eSim_PNP
+Q12 Vcc Net-_Q12-Pad2_ Net-_Q12-Pad2_ eSim_PNP
+Q6 Net-_Q10-Pad2_ Net-_Q10-Pad2_ Net-_Q6-Pad3_ eSim_NPN
+Q10 Vcc Net-_Q10-Pad2_ Net-_Q10-Pad3_ eSim_NPN
+Q9 Net-_Q10-Pad2_ Net-_Q6-Pad3_ Net-_C1-Pad2_ eSim_NPN
+R8 Net-_Q10-Pad3_ Net-_R10-Pad1_ 100R
+R9 Net-_R10-Pad1_ Net-_Q11-Pad1_ 100R
+Q11 Net-_Q11-Pad1_ Net-_C1-Pad2_ Vee eSim_PNP
+Q8 Net-_C1-Pad2_ Net-_Q5-Pad3_ Net-_Q8-Pad3_ eSim_NPN
+R7 Net-_Q8-Pad3_ Vee 100R
+Q13 Net-_Q12-Pad2_ Net-_J3-Pad3_ Net-_Q13-Pad3_ eSim_NPN
+R11 Net-_Q13-Pad3_ Vee 5kR
+U1 Vee Net-_J3-Pad3_ zener
+J3 Vcc Vcc Net-_J3-Pad3_ jfet_p
+R10 Net-_R10-Pad1_ vout 200R
+R6 Net-_Q6-Pad3_ Net-_C1-Pad2_ 100R
+
+.end
diff --git a/library/SubcircuitLibrary/TL071/TL071.cir.out b/library/SubcircuitLibrary/TL071/TL071.cir.out
new file mode 100644
index 00000000..bfa7a49e
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/TL071.cir.out
@@ -0,0 +1,48 @@
+* c:\fossee\esim\library\subcircuitlibrary\tl071\tl071.cir
+
+.include PJF.lib
+.include NPN.lib
+.include D.lib
+.include PNP.lib
+j1 net-_j1-pad1_ vin1 net-_j1-pad3_ J2N3820
+j2 net-_j1-pad1_ vin2 net-_c1-pad1_ J2N3820
+q3 net-_j1-pad1_ net-_q12-pad2_ net-_q3-pad3_ Q2N2907A
+r3 vcc net-_q3-pad3_ 30r
+q1 net-_j1-pad3_ net-_q1-pad2_ n1 Q2N2222
+q4 net-_c1-pad1_ net-_q1-pad2_ n2 Q2N2222
+q2 vcc net-_j1-pad3_ net-_q1-pad2_ Q2N2222
+q5 vcc net-_c1-pad1_ net-_q5-pad3_ Q2N2222
+r1 n1 vee 1kr
+r4 n2 vee 1kr
+r2 net-_q1-pad2_ vee 50kr
+r5 net-_q5-pad3_ vee 50kr
+d1 net-_c1-pad1_ net-_c1-pad2_ 1N4148
+c1 net-_c1-pad1_ net-_c1-pad2_ 0.01ff
+q7 vcc net-_q12-pad2_ net-_q10-pad2_ Q2N2907A
+q12 vcc net-_q12-pad2_ net-_q12-pad2_ Q2N2907A
+q6 net-_q10-pad2_ net-_q10-pad2_ net-_q6-pad3_ Q2N2222
+q10 vcc net-_q10-pad2_ net-_q10-pad3_ Q2N2222
+q9 net-_q10-pad2_ net-_q6-pad3_ net-_c1-pad2_ Q2N2222
+r8 net-_q10-pad3_ net-_r10-pad1_ 100r
+r9 net-_r10-pad1_ net-_q11-pad1_ 100r
+q11 net-_q11-pad1_ net-_c1-pad2_ vee Q2N2907A
+q8 net-_c1-pad2_ net-_q5-pad3_ net-_q8-pad3_ Q2N2222
+r7 net-_q8-pad3_ vee 100r
+q13 net-_q12-pad2_ net-_j3-pad3_ net-_q13-pad3_ Q2N2222
+r11 net-_q13-pad3_ vee 5kr
+* u1 vee net-_j3-pad3_ zener
+j3 vcc vcc net-_j3-pad3_ J2N3820
+r10 net-_r10-pad1_ vout 200r
+r6 net-_q6-pad3_ net-_c1-pad2_ 25kr
+a1 vee net-_j3-pad3_ u1
+* Schematic Name: zener, NgSpice Name: zener
+.model u1 zener(v_breakdown=6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/TL071/TL071.dcm b/library/SubcircuitLibrary/TL071/TL071.dcm
new file mode 100644
index 00000000..1980d0d1
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/TL071.dcm
@@ -0,0 +1,7 @@
+EESchema-DOCLIB Version 2.0
+#
+$CMP SCR
+D Thyristor
+$ENDCMP
+#
+#End Doc Library
diff --git a/library/SubcircuitLibrary/TL071/TL071.pro b/library/SubcircuitLibrary/TL071/TL071.pro
new file mode 100644
index 00000000..4e515305
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/TL071.pro
@@ -0,0 +1,73 @@
+update=3/1/2025 1:38:14 PM
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/TL071/TL071.sch b/library/SubcircuitLibrary/TL071/TL071.sch
new file mode 100644
index 00000000..282921c6
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/TL071.sch
@@ -0,0 +1,582 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:TL071-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L jfet_p J1
+U 1 1 67C29EBB
+P 2100 3250
+F 0 "J1" H 2000 3300 50 0000 R CNN
+F 1 "jfet_p" H 2050 3400 50 0000 R CNN
+F 2 "" H 2300 3350 29 0000 C CNN
+F 3 "" H 2100 3250 60 0000 C CNN
+ 1 2100 3250
+ 1 0 0 -1
+$EndComp
+$Comp
+L jfet_p J2
+U 1 1 67C29EBC
+P 3300 3250
+F 0 "J2" H 3200 3300 50 0000 R CNN
+F 1 "jfet_p" H 3250 3400 50 0000 R CNN
+F 2 "" H 3500 3350 29 0000 C CNN
+F 3 "" H 3300 3250 60 0000 C CNN
+ 1 3300 3250
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q3
+U 1 1 67C29EBD
+P 2850 2400
+F 0 "Q3" H 2750 2450 50 0000 R CNN
+F 1 "eSim_PNP" H 2800 2550 50 0000 R CNN
+F 2 "" H 3050 2500 29 0000 C CNN
+F 3 "" H 2850 2400 60 0000 C CNN
+ 1 2850 2400
+ -1 0 0 1
+$EndComp
+$Comp
+L resistor R3
+U 1 1 67C29EBE
+P 2700 1750
+F 0 "R3" H 2750 1880 50 0000 C CNN
+F 1 "30R" H 2750 1700 50 0000 C CNN
+F 2 "" H 2750 1730 30 0000 C CNN
+F 3 "" V 2750 1800 30 0000 C CNN
+ 1 2700 1750
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_NPN Q1
+U 1 1 67C29EBF
+P 2300 4750
+F 0 "Q1" H 2200 4800 50 0000 R CNN
+F 1 "eSim_NPN" H 2250 4900 50 0000 R CNN
+F 2 "" H 2500 4850 29 0000 C CNN
+F 3 "" H 2300 4750 60 0000 C CNN
+ 1 2300 4750
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q4
+U 1 1 67C29EC0
+P 3100 4750
+F 0 "Q4" H 3000 4800 50 0000 R CNN
+F 1 "eSim_NPN" H 3050 4900 50 0000 R CNN
+F 2 "" H 3300 4850 29 0000 C CNN
+F 3 "" H 3100 4750 60 0000 C CNN
+ 1 3100 4750
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q2
+U 1 1 67C29EC1
+P 2600 4350
+F 0 "Q2" H 2500 4400 50 0000 R CNN
+F 1 "eSim_NPN" H 2550 4500 50 0000 R CNN
+F 2 "" H 2800 4450 29 0000 C CNN
+F 3 "" H 2600 4350 60 0000 C CNN
+ 1 2600 4350
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q5
+U 1 1 67C29EC2
+P 3750 4300
+F 0 "Q5" H 3650 4350 50 0000 R CNN
+F 1 "eSim_NPN" H 3700 4450 50 0000 R CNN
+F 2 "" H 3950 4400 29 0000 C CNN
+F 3 "" H 3750 4300 60 0000 C CNN
+ 1 3750 4300
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R1
+U 1 1 67C29EC3
+P 2150 5300
+F 0 "R1" H 2200 5430 50 0000 C CNN
+F 1 "1kR" H 2200 5250 50 0000 C CNN
+F 2 "" H 2200 5280 30 0000 C CNN
+F 3 "" V 2200 5350 30 0000 C CNN
+ 1 2150 5300
+ 0 1 1 0
+$EndComp
+$Comp
+L resistor R4
+U 1 1 67C29EC4
+P 3150 5300
+F 0 "R4" H 3200 5430 50 0000 C CNN
+F 1 "1kR" H 3200 5250 50 0000 C CNN
+F 2 "" H 3200 5280 30 0000 C CNN
+F 3 "" V 3200 5350 30 0000 C CNN
+ 1 3150 5300
+ 0 1 1 0
+$EndComp
+$Comp
+L resistor R2
+U 1 1 67C29EC5
+P 2650 5000
+F 0 "R2" H 2700 5130 50 0000 C CNN
+F 1 "50kR" H 2700 4950 50 0000 C CNN
+F 2 "" H 2700 4980 30 0000 C CNN
+F 3 "" V 2700 5050 30 0000 C CNN
+ 1 2650 5000
+ 0 1 1 0
+$EndComp
+$Comp
+L resistor R5
+U 1 1 67C29EC6
+P 3800 4950
+F 0 "R5" H 3850 5080 50 0000 C CNN
+F 1 "50kR" H 3850 4900 50 0000 C CNN
+F 2 "" H 3850 4930 30 0000 C CNN
+F 3 "" V 3850 5000 30 0000 C CNN
+ 1 3800 4950
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_Diode D1
+U 1 1 67C29EC7
+P 3750 3550
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+F 2 "" H 6450 2930 30 0000 C CNN
+F 3 "" V 6450 3000 30 0000 C CNN
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+ -1 0 0 -1
+$EndComp
+$Comp
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+$EndComp
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+$EndComp
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diff --git a/library/SubcircuitLibrary/TL071/TL071.sub b/library/SubcircuitLibrary/TL071/TL071.sub
new file mode 100644
index 00000000..c35969d3
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/TL071.sub
@@ -0,0 +1,42 @@
+* Subcircuit TL071
+* c:\fossee\esim\library\subcircuitlibrary\tl071\tl071.sub
+.subckt TL071 n1 vin1 vin2 vee n2 vout vcc gnd
+.include PJF.lib
+.include NPN.lib
+.include D.lib
+.include PNP.lib
+j1 net-_j1-pad1_ vin1 net-_j1-pad3_ J2N3820
+j2 net-_j1-pad1_ vin2 net-_c1-pad1_ J2N3820
+q3 net-_j1-pad1_ net-_q12-pad2_ net-_q3-pad3_ Q2N2907A
+r3 vcc net-_q3-pad3_ 30r
+q1 net-_j1-pad3_ net-_q1-pad2_ n1 Q2N2222
+q4 net-_c1-pad1_ net-_q1-pad2_ n2 Q2N2222
+q2 vcc net-_j1-pad3_ net-_q1-pad2_ Q2N2222
+q5 vcc net-_c1-pad1_ net-_q5-pad3_ Q2N2222
+r1 n1 vee 1kr
+r4 n2 vee 1kr
+r2 net-_q1-pad2_ vee 50kr
+r5 net-_q5-pad3_ vee 50kr
+d1 net-_c1-pad1_ net-_c1-pad2_ 1N4148
+c1 net-_c1-pad1_ net-_c1-pad2_ 0.01ff
+q7 vcc net-_q12-pad2_ net-_q10-pad2_ Q2N2907A
+q12 vcc net-_q12-pad2_ net-_q12-pad2_ Q2N2907A
+q6 net-_q10-pad2_ net-_q10-pad2_ net-_q6-pad3_ Q2N2222
+q10 vcc net-_q10-pad2_ net-_q10-pad3_ Q2N2222
+q9 net-_q10-pad2_ net-_q6-pad3_ net-_c1-pad2_ Q2N2222
+r8 net-_q10-pad3_ net-_r10-pad1_ 100r
+r9 net-_r10-pad1_ net-_q11-pad1_ 100r
+q11 net-_q11-pad1_ net-_c1-pad2_ vee Q2N2907A
+q8 net-_c1-pad2_ net-_q5-pad3_ net-_q8-pad3_ Q2N2222
+r7 net-_q8-pad3_ vee 100r
+q13 net-_q12-pad2_ net-_j3-pad3_ net-_q13-pad3_ Q2N2222
+r11 net-_q13-pad3_ vee 5kr
+* u1 vee net-_j3-pad3_ zener
+j3 vcc vcc net-_j3-pad3_ J2N3820
+r10 net-_r10-pad1_ vout 200r
+r6 net-_q6-pad3_ net-_c1-pad2_ 25kr
+a1 vee net-_j3-pad3_ u1
+* Schematic Name: zener, NgSpice Name: zener
+.model u1 zener(v_breakdown=6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE )
+
+.ends TL071
diff --git a/library/SubcircuitLibrary/TL071/TL071_Previous_Values.xml b/library/SubcircuitLibrary/TL071/TL071_Previous_Values.xml
new file mode 100644
index 00000000..9110e747
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/TL071_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u1 name="type">zener<field1 name="Enter Breakdown Voltage (default=5.6)" /><field2 name="Enter Breakdown Current (default=2.0e-2)" /><field3 name="Enter Saturation Current (default=1.0e-12)" /><field4 name="Enter Forward Emission Coefficient (default=1.0)" /><field5 name="Enter Switch for Limiting (default=FALSE)" /></u1></model><devicemodel><j1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\PJF.lib</field></j1><j2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\PJF.lib</field></j2><q3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q3><q1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q1><q4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q4><q2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q2><q5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q5><d1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1><q7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q7><q12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q12><q6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q6><q10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q10><q9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q9><q11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q11><q8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q8><q13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q13><j3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\JFET\PJF.lib</field></j3></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/TL071/analysis b/library/SubcircuitLibrary/TL071/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/TL071/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file