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diff --git a/library/SubcircuitLibrary/SRAM/SRAM_Cell.cir.out b/library/SubcircuitLibrary/SRAM/SRAM_Cell.cir.out
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+++ b/library/SubcircuitLibrary/SRAM/SRAM_Cell.cir.out
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+* c:\fossee\esim\library\subcircuitlibrary\sram_cell\sram_cell.cir
+
+.include PMOS-180nm.lib
+.include NMOS-180nm.lib
+m3 net-_m1-pad3_ net-_m2-pad2_ net-_m1-pad4_ net-_m1-pad4_ CMOSN W=3.9u L=0.4u M=1
+m4 net-_m2-pad2_ net-_m1-pad3_ net-_m1-pad4_ net-_m1-pad4_ CMOSN W=3.9u L=0.4u M=1
+m6 net-_m6-pad1_ net-_m1-pad2_ net-_m2-pad2_ net-_m1-pad4_ CMOSN W=1u L=0.4u M=1
+m2 net-_m2-pad1_ net-_m2-pad2_ net-_m1-pad3_ net-_m2-pad1_ CMOSP W=0.6u L=0.4u M=1
+m5 net-_m2-pad1_ net-_m1-pad3_ net-_m2-pad2_ net-_m2-pad1_ CMOSP W=0.6u L=0.4u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad4_ CMOSN W=1u L=0.4u M=1
+* u1 net-_m2-pad1_ net-_m1-pad2_ net-_m1-pad1_ net-_m6-pad1_ net-_m1-pad4_ net-_m1-pad3_ net-_m2-pad2_ port
+.tran 0e-03 0e-03 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end