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diff --git a/library/SubcircuitLibrary/Logic_Gates/NAND.sub b/library/SubcircuitLibrary/Logic_Gates/NAND.sub
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+* Subcircuit NAND
+.subckt NAND net-_m1-pad2_ net-_m3-pad2_ net-_m1-pad3_
+* c:\fossee\esim\library\subcircuitlibrary\nand\nand.cir
+.include PMOS-180nm.lib
+.include NMOS-180nm.lib
+m3 net-_m2-pad3_ net-_m3-pad2_ gnd gnd CMOSN W=100u L=100u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m4 net-_m1-pad1_ net-_m3-pad2_ net-_m1-pad3_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m2 net-_m1-pad3_ net-_m1-pad2_ net-_m2-pad3_ net-_m2-pad3_ CMOSN W=100u L=100u M=1
+v1 net-_m1-pad1_ gnd dc 1.8
+* Control Statements
+
+.ends NAND \ No newline at end of file