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-rw-r--r--library/SubcircuitLibrary/LM143_sub/D.lib2
-rw-r--r--library/SubcircuitLibrary/LM143_sub/LM143_IC-cache.lib183
-rw-r--r--library/SubcircuitLibrary/LM143_sub/LM143_IC.cir42
-rw-r--r--library/SubcircuitLibrary/LM143_sub/LM143_IC.cir.out46
-rw-r--r--library/SubcircuitLibrary/LM143_sub/LM143_IC.pro73
-rw-r--r--library/SubcircuitLibrary/LM143_sub/LM143_IC.sch664
-rw-r--r--library/SubcircuitLibrary/LM143_sub/LM143_IC.sub40
-rw-r--r--library/SubcircuitLibrary/LM143_sub/LM143_IC_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/LM143_sub/NPN.lib4
-rw-r--r--library/SubcircuitLibrary/LM143_sub/PNP.lib4
-rw-r--r--library/SubcircuitLibrary/LM143_sub/analysis1
11 files changed, 1060 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/LM143_sub/D.lib b/library/SubcircuitLibrary/LM143_sub/D.lib
new file mode 100644
index 00000000..f53bf3e0
--- /dev/null
+++ b/library/SubcircuitLibrary/LM143_sub/D.lib
@@ -0,0 +1,2 @@
+.model 1N4148 D(is=2.495E-09 rs=4.755E-01 n=1.679E+00 tt=3.030E-09 cjo=1.700E-12 vj=1 m=1.959E-01 bv=1.000E+02 ibv=1.000E-04)
+
diff --git a/library/SubcircuitLibrary/LM143_sub/LM143_IC-cache.lib b/library/SubcircuitLibrary/LM143_sub/LM143_IC-cache.lib
new file mode 100644
index 00000000..5e755436
--- /dev/null
+++ b/library/SubcircuitLibrary/LM143_sub/LM143_IC-cache.lib
@@ -0,0 +1,183 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# DC
+#
+DEF DC v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "DC" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 50 1 1 w
+X - 2 0 -450 300 U 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# dc
+#
+DEF dc I 0 40 Y Y 1 F N
+F0 "I" -200 100 60 H V C CNN
+F1 "dc" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+C 0 0 150 0 1 0 N
+P 2 0 1 0 0 -100 0 -100 N
+P 2 0 1 0 0 100 -50 50 N
+P 2 0 1 0 0 100 0 -100 N
+P 2 0 1 0 0 100 50 50 N
+X ~ 1 0 450 300 D 50 50 1 1 P
+X ~ 2 0 -450 300 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS capacitor
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_Diode
+#
+DEF eSim_Diode D 0 40 N N 1 F N
+F0 "D" 0 100 50 H V C CNN
+F1 "eSim_Diode" 0 -100 50 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ TO-???*
+ *SingleDiode
+ *_Diode_*
+ *SingleDiode*
+ D_*
+$ENDFPLIST
+DRAW
+T 0 -100 50 60 0 0 0 A Normal 0 C C
+T 0 100 50 60 0 0 0 K Normal 0 C C
+P 2 0 1 6 50 50 50 -50 N
+P 3 0 1 0 -50 50 50 0 -50 -50 F
+X A 1 -150 0 100 R 40 40 1 1 P
+X K 2 150 0 100 L 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 50 -70 70 -50 90 -90 50 -70 50 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0 25 25 100 100 N
+P 3 0 1 0 25 -25 100 -100 100 -100 N
+P 3 0 1 20 25 75 25 -75 25 -75 N
+P 5 0 1 0 90 -70 70 -90 50 -50 90 -70 90 -70 F
+X C 1 100 200 100 D 50 50 1 1 P
+X B 2 -200 0 225 R 50 50 1 1 P
+X E 3 100 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/LM143_sub/LM143_IC.cir b/library/SubcircuitLibrary/LM143_sub/LM143_IC.cir
new file mode 100644
index 00000000..a903cdea
--- /dev/null
+++ b/library/SubcircuitLibrary/LM143_sub/LM143_IC.cir
@@ -0,0 +1,42 @@
+* D:\FOSSEE\eSim\library\SubcircuitLibrary\LM143_IC\LM143_IC.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 07/13/24 18:26:26
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+I2 Net-_I2-Pad1_ Net-_I2-Pad2_ 80u
+I3 Net-_I2-Pad1_ Net-_I3-Pad2_ 80u
+I4 Net-_I2-Pad1_ Net-_I4-Pad2_ 80u
+Q1 Net-_I2-Pad2_ Net-_Q1-Pad2_ Net-_I1-Pad1_ eSim_NPN
+Q2 Net-_I1-Pad2_ Net-_I1-Pad1_ Net-_I2-Pad2_ eSim_PNP
+Q6 Net-_I1-Pad2_ Net-_I5-Pad1_ Net-_I4-Pad2_ eSim_PNP
+Q8 Net-_I4-Pad2_ Net-_Q8-Pad2_ Net-_I5-Pad1_ eSim_NPN
+R2 Net-_Q3-Pad3_ Net-_I3-Pad2_ 5.6k
+R3 Net-_I3-Pad2_ Net-_Q7-Pad3_ 5.6k
+Q3 Net-_Q3-Pad1_ Net-_I1-Pad1_ Net-_Q3-Pad3_ eSim_PNP
+Q7 Net-_C1-Pad2_ Net-_I5-Pad1_ Net-_Q7-Pad3_ eSim_PNP
+Q4 Net-_Q3-Pad1_ Net-_Q3-Pad1_ Net-_I1-Pad2_ eSim_NPN
+Q5 Net-_C1-Pad2_ Net-_Q3-Pad1_ Net-_I1-Pad2_ eSim_NPN
+I1 Net-_I1-Pad1_ Net-_I1-Pad2_ 20u
+I5 Net-_I5-Pad1_ Net-_I1-Pad2_ 20u
+I6 Net-_I2-Pad1_ Net-_D1-Pad1_ 400u
+D1 Net-_D1-Pad1_ Net-_D1-Pad2_ eSim_Diode
+D2 Net-_D1-Pad2_ Net-_D2-Pad2_ eSim_Diode
+D3 Net-_D2-Pad2_ Net-_C1-Pad1_ eSim_Diode
+Q11 Net-_C1-Pad1_ Net-_Q11-Pad2_ Net-_Q10-Pad1_ eSim_NPN
+C1 Net-_C1-Pad1_ Net-_C1-Pad2_ 27p
+Q9 Net-_I2-Pad1_ Net-_C1-Pad2_ Net-_Q10-Pad2_ eSim_NPN
+Q10 Net-_Q10-Pad1_ Net-_Q10-Pad2_ Net-_I1-Pad2_ eSim_NPN
+R5 Net-_Q10-Pad2_ Net-_I1-Pad2_ 39k
+v1 Net-_Q11-Pad2_ Net-_I1-Pad2_ 2
+Q15 Net-_I2-Pad1_ Net-_I7-Pad2_ Net-_Q13-Pad1_ eSim_NPN
+Q13 Net-_Q13-Pad1_ Net-_D1-Pad1_ Net-_Q13-Pad3_ eSim_NPN
+Q14 Net-_I1-Pad2_ Net-_Q12-Pad3_ Net-_Q13-Pad3_ eSim_PNP
+Q12 Net-_I1-Pad2_ Net-_C1-Pad1_ Net-_Q12-Pad3_ eSim_PNP
+I7 Net-_I2-Pad1_ Net-_I7-Pad2_ 400u
+v2 Net-_I7-Pad2_ Net-_Q13-Pad3_ 3.5
+U1 Net-_Q1-Pad2_ Net-_Q8-Pad2_ Net-_I1-Pad2_ Net-_Q13-Pad3_ Net-_I2-Pad1_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/LM143_sub/LM143_IC.cir.out b/library/SubcircuitLibrary/LM143_sub/LM143_IC.cir.out
new file mode 100644
index 00000000..4cac6cfc
--- /dev/null
+++ b/library/SubcircuitLibrary/LM143_sub/LM143_IC.cir.out
@@ -0,0 +1,46 @@
+* d:\fossee\esim\library\subcircuitlibrary\lm143_ic\lm143_ic.cir
+
+.include NPN.lib
+.include PNP.lib
+.include D.lib
+i2 net-_i2-pad1_ net-_i2-pad2_ 80u
+i3 net-_i2-pad1_ net-_i3-pad2_ 80u
+i4 net-_i2-pad1_ net-_i4-pad2_ 80u
+q1 net-_i2-pad2_ net-_q1-pad2_ net-_i1-pad1_ Q2N2222
+q2 net-_i1-pad2_ net-_i1-pad1_ net-_i2-pad2_ Q2N2907A
+q6 net-_i1-pad2_ net-_i5-pad1_ net-_i4-pad2_ Q2N2907A
+q8 net-_i4-pad2_ net-_q8-pad2_ net-_i5-pad1_ Q2N2222
+r2 net-_q3-pad3_ net-_i3-pad2_ 5.6k
+r3 net-_i3-pad2_ net-_q7-pad3_ 5.6k
+q3 net-_q3-pad1_ net-_i1-pad1_ net-_q3-pad3_ Q2N2907A
+q7 net-_c1-pad2_ net-_i5-pad1_ net-_q7-pad3_ Q2N2907A
+q4 net-_q3-pad1_ net-_q3-pad1_ net-_i1-pad2_ Q2N2222
+q5 net-_c1-pad2_ net-_q3-pad1_ net-_i1-pad2_ Q2N2222
+i1 net-_i1-pad1_ net-_i1-pad2_ 20u
+i5 net-_i5-pad1_ net-_i1-pad2_ 20u
+i6 net-_i2-pad1_ net-_d1-pad1_ 400u
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+d2 net-_d1-pad2_ net-_d2-pad2_ 1N4148
+d3 net-_d2-pad2_ net-_c1-pad1_ 1N4148
+q11 net-_c1-pad1_ net-_q11-pad2_ net-_q10-pad1_ Q2N2222
+c1 net-_c1-pad1_ net-_c1-pad2_ 27p
+q9 net-_i2-pad1_ net-_c1-pad2_ net-_q10-pad2_ Q2N2222
+q10 net-_q10-pad1_ net-_q10-pad2_ net-_i1-pad2_ Q2N2222
+r5 net-_q10-pad2_ net-_i1-pad2_ 39k
+v1 net-_q11-pad2_ net-_i1-pad2_ 2
+q15 net-_i2-pad1_ net-_i7-pad2_ net-_q13-pad1_ Q2N2222
+q13 net-_q13-pad1_ net-_d1-pad1_ net-_q13-pad3_ Q2N2222
+q14 net-_i1-pad2_ net-_q12-pad3_ net-_q13-pad3_ Q2N2907A
+q12 net-_i1-pad2_ net-_c1-pad1_ net-_q12-pad3_ Q2N2907A
+i7 net-_i2-pad1_ net-_i7-pad2_ 400u
+v2 net-_i7-pad2_ net-_q13-pad3_ 3.5
+* u1 net-_q1-pad2_ net-_q8-pad2_ net-_i1-pad2_ net-_q13-pad3_ net-_i2-pad1_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/LM143_sub/LM143_IC.pro b/library/SubcircuitLibrary/LM143_sub/LM143_IC.pro
new file mode 100644
index 00000000..e27a398b
--- /dev/null
+++ b/library/SubcircuitLibrary/LM143_sub/LM143_IC.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/LM143_sub/LM143_IC.sch b/library/SubcircuitLibrary/LM143_sub/LM143_IC.sch
new file mode 100644
index 00000000..a86aa174
--- /dev/null
+++ b/library/SubcircuitLibrary/LM143_sub/LM143_IC.sch
@@ -0,0 +1,664 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:LM143_IC-cache
+EELAYER 25 0
+EELAYER END
+$Descr User 23622 19685
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L dc I2
+U 1 1 668A62E5
+P 8200 5700
+F 0 "I2" H 8000 5800 60 0000 C CNN
+F 1 "80u" H 8000 5650 60 0000 C CNN
+F 2 "R1" H 7900 5700 60 0000 C CNN
+F 3 "" H 8200 5700 60 0000 C CNN
+ 1 8200 5700
+ -1 0 0 -1
+$EndComp
+$Comp
+L dc I3
+U 1 1 668A62E6
+P 9000 5750
+F 0 "I3" H 8800 5850 60 0000 C CNN
+F 1 "80u" H 8800 5700 60 0000 C CNN
+F 2 "R1" H 8700 5750 60 0000 C CNN
+F 3 "" H 9000 5750 60 0000 C CNN
+ 1 9000 5750
+ -1 0 0 -1
+$EndComp
+$Comp
+L dc I4
+U 1 1 668A62E7
+P 9800 5700
+F 0 "I4" H 9600 5800 60 0000 C CNN
+F 1 "80u" H 9600 5650 60 0000 C CNN
+F 2 "R1" H 9500 5700 60 0000 C CNN
+F 3 "" H 9800 5700 60 0000 C CNN
+ 1 9800 5700
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q1
+U 1 1 668A62E8
+P 7400 6600
+F 0 "Q1" H 7300 6650 50 0000 R CNN
+F 1 "eSim_NPN" H 7350 6750 50 0000 R CNN
+F 2 "" H 7600 6700 29 0000 C CNN
+F 3 "" H 7400 6600 60 0000 C CNN
+ 1 7400 6600
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q2
+U 1 1 668A62E9
+P 8100 6850
+F 0 "Q2" H 8000 6900 50 0000 R CNN
+F 1 "eSim_PNP" H 8050 7000 50 0000 R CNN
+F 2 "" H 8300 6950 29 0000 C CNN
+F 3 "" H 8100 6850 60 0000 C CNN
+ 1 8100 6850
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q6
+U 1 1 668A62EA
+P 9900 6850
+F 0 "Q6" H 9800 6900 50 0000 R CNN
+F 1 "eSim_PNP" H 9850 7000 50 0000 R CNN
+F 2 "" H 10100 6950 29 0000 C CNN
+F 3 "" H 9900 6850 60 0000 C CNN
+ 1 9900 6850
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q8
+U 1 1 668A62EB
+P 10900 6550
+F 0 "Q8" H 10800 6600 50 0000 R CNN
+F 1 "eSim_NPN" H 10850 6700 50 0000 R CNN
+F 2 "" H 11100 6650 29 0000 C CNN
+F 3 "" H 10900 6550 60 0000 C CNN
+ 1 10900 6550
+ -1 0 0 -1
+$EndComp
+$Comp
+L resistor R2
+U 1 1 668A62EC
+P 8600 7500
+F 0 "R2" H 8650 7630 50 0000 C CNN
+F 1 "5.6k" H 8650 7450 50 0000 C CNN
+F 2 "" H 8650 7480 30 0000 C CNN
+F 3 "" V 8650 7550 30 0000 C CNN
+ 1 8600 7500
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R3
+U 1 1 668A62ED
+P 9250 7500
+F 0 "R3" H 9300 7630 50 0000 C CNN
+F 1 "5.6k" H 9300 7450 50 0000 C CNN
+F 2 "" H 9300 7480 30 0000 C CNN
+F 3 "" V 9300 7550 30 0000 C CNN
+ 1 9250 7500
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q3
+U 1 1 668A62EE
+P 8200 7650
+F 0 "Q3" H 8100 7700 50 0000 R CNN
+F 1 "eSim_PNP" H 8150 7800 50 0000 R CNN
+F 2 "" H 8400 7750 29 0000 C CNN
+F 3 "" H 8200 7650 60 0000 C CNN
+ 1 8200 7650
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q7
+U 1 1 668A62EF
+P 9900 7650
+F 0 "Q7" H 9800 7700 50 0000 R CNN
+F 1 "eSim_PNP" H 9850 7800 50 0000 R CNN
+F 2 "" H 10100 7750 29 0000 C CNN
+F 3 "" H 9900 7650 60 0000 C CNN
+ 1 9900 7650
+ -1 0 0 1
+$EndComp
+$Comp
+L eSim_NPN Q4
+U 1 1 668A62F0
+P 8400 8750
+F 0 "Q4" H 8300 8800 50 0000 R CNN
+F 1 "eSim_NPN" H 8350 8900 50 0000 R CNN
+F 2 "" H 8600 8850 29 0000 C CNN
+F 3 "" H 8400 8750 60 0000 C CNN
+ 1 8400 8750
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q5
+U 1 1 668A62F1
+P 9700 8750
+F 0 "Q5" H 9600 8800 50 0000 R CNN
+F 1 "eSim_NPN" H 9650 8900 50 0000 R CNN
+F 2 "" H 9900 8850 29 0000 C CNN
+F 3 "" H 9700 8750 60 0000 C CNN
+ 1 9700 8750
+ 1 0 0 -1
+$EndComp
+$Comp
+L dc I1
+U 1 1 668A62F2
+P 7650 8350
+F 0 "I1" H 7450 8450 60 0000 C CNN
+F 1 "20u" H 7450 8300 60 0000 C CNN
+F 2 "R1" H 7350 8350 60 0000 C CNN
+F 3 "" H 7650 8350 60 0000 C CNN
+ 1 7650 8350
+ -1 0 0 -1
+$EndComp
+$Comp
+L dc I5
+U 1 1 668A62F3
+P 10400 8500
+F 0 "I5" H 10200 8600 60 0000 C CNN
+F 1 "20u" H 10200 8450 60 0000 C CNN
+F 2 "R1" H 10100 8500 60 0000 C CNN
+F 3 "" H 10400 8500 60 0000 C CNN
+ 1 10400 8500
+ -1 0 0 -1
+$EndComp
+$Comp
+L dc I6
+U 1 1 668A62F4
+P 12600 5800
+F 0 "I6" H 12400 5900 60 0000 C CNN
+F 1 "400u" H 12400 5750 60 0000 C CNN
+F 2 "R1" H 12300 5800 60 0000 C CNN
+F 3 "" H 12600 5800 60 0000 C CNN
+ 1 12600 5800
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_Diode D1
+U 1 1 668A62F5
+P 12600 6800
+F 0 "D1" H 12600 6900 50 0000 C CNN
+F 1 "eSim_Diode" H 12600 6700 50 0000 C CNN
+F 2 "" H 12600 6800 60 0000 C CNN
+F 3 "" H 12600 6800 60 0000 C CNN
+ 1 12600 6800
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_Diode D2
+U 1 1 668A62F6
+P 12600 7300
+F 0 "D2" H 12600 7400 50 0000 C CNN
+F 1 "eSim_Diode" H 12600 7200 50 0000 C CNN
+F 2 "" H 12600 7300 60 0000 C CNN
+F 3 "" H 12600 7300 60 0000 C CNN
+ 1 12600 7300
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_Diode D3
+U 1 1 668A62F7
+P 12600 7800
+F 0 "D3" H 12600 7900 50 0000 C CNN
+F 1 "eSim_Diode" H 12600 7700 50 0000 C CNN
+F 2 "" H 12600 7800 60 0000 C CNN
+F 3 "" H 12600 7800 60 0000 C CNN
+ 1 12600 7800
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_NPN Q11
+U 1 1 668A62F8
+P 12700 8550
+F 0 "Q11" H 12600 8600 50 0000 R CNN
+F 1 "eSim_NPN" H 12650 8700 50 0000 R CNN
+F 2 "" H 12900 8650 29 0000 C CNN
+F 3 "" H 12700 8550 60 0000 C CNN
+ 1 12700 8550
+ -1 0 0 -1
+$EndComp
+$Comp
+L capacitor C1
+U 1 1 668A62F9
+P 12050 8250
+F 0 "C1" H 12075 8350 50 0000 L CNN
+F 1 "27p" H 12075 8150 50 0000 L CNN
+F 2 "" H 12088 8100 30 0000 C CNN
+F 3 "" H 12050 8250 60 0000 C CNN
+ 1 12050 8250
+ 0 1 1 0
+$EndComp
+$Comp
+L eSim_NPN Q9
+U 1 1 668A62FA
+P 11600 9000
+F 0 "Q9" H 11500 9050 50 0000 R CNN
+F 1 "eSim_NPN" H 11550 9150 50 0000 R CNN
+F 2 "" H 11800 9100 29 0000 C CNN
+F 3 "" H 11600 9000 60 0000 C CNN
+ 1 11600 9000
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q10
+U 1 1 668A62FB
+P 12500 9000
+F 0 "Q10" H 12400 9050 50 0000 R CNN
+F 1 "eSim_NPN" H 12450 9150 50 0000 R CNN
+F 2 "" H 12700 9100 29 0000 C CNN
+F 3 "" H 12500 9000 60 0000 C CNN
+ 1 12500 9000
+ 1 0 0 -1
+$EndComp
+$Comp
+L resistor R5
+U 1 1 668A62FC
+P 11950 9500
+F 0 "R5" H 12000 9630 50 0000 C CNN
+F 1 "39k" H 12000 9450 50 0000 C CNN
+F 2 "" H 12000 9480 30 0000 C CNN
+F 3 "" V 12000 9550 30 0000 C CNN
+ 1 11950 9500
+ 0 1 1 0
+$EndComp
+$Comp
+L DC v1
+U 1 1 668A62FD
+P 13150 9150
+F 0 "v1" H 12950 9250 60 0000 C CNN
+F 1 "2" H 12950 9100 60 0000 C CNN
+F 2 "R1" H 12850 9150 60 0000 C CNN
+F 3 "" H 13150 9150 60 0000 C CNN
+ 1 13150 9150
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q15
+U 1 1 668A62FE
+P 14100 5550
+F 0 "Q15" H 14000 5600 50 0000 R CNN
+F 1 "eSim_NPN" H 14050 5700 50 0000 R CNN
+F 2 "" H 14300 5650 29 0000 C CNN
+F 3 "" H 14100 5550 60 0000 C CNN
+ 1 14100 5550
+ -1 0 0 -1
+$EndComp
+$Comp
+L eSim_NPN Q13
+U 1 1 668A62FF
+P 13900 6200
+F 0 "Q13" H 13800 6250 50 0000 R CNN
+F 1 "eSim_NPN" H 13850 6350 50 0000 R CNN
+F 2 "" H 14100 6300 29 0000 C CNN
+F 3 "" H 13900 6200 60 0000 C CNN
+ 1 13900 6200
+ 1 0 0 -1
+$EndComp
+$Comp
+L eSim_PNP Q14
+U 1 1 668A6300
+P 13900 6700
+F 0 "Q14" H 13800 6750 50 0000 R CNN
+F 1 "eSim_PNP" H 13850 6850 50 0000 R CNN
+F 2 "" H 14100 6800 29 0000 C CNN
+F 3 "" H 13900 6700 60 0000 C CNN
+ 1 13900 6700
+ 1 0 0 1
+$EndComp
+$Comp
+L eSim_PNP Q12
+U 1 1 668A6301
+P 13450 6950
+F 0 "Q12" H 13350 7000 50 0000 R CNN
+F 1 "eSim_PNP" H 13400 7100 50 0000 R CNN
+F 2 "" H 13650 7050 29 0000 C CNN
+F 3 "" H 13450 6950 60 0000 C CNN
+ 1 13450 6950
+ 1 0 0 1
+$EndComp
+$Comp
+L dc I7
+U 1 1 668A6302
+P 14750 5700
+F 0 "I7" H 14550 5800 60 0000 C CNN
+F 1 "400u" H 14550 5650 60 0000 C CNN
+F 2 "R1" H 14450 5700 60 0000 C CNN
+F 3 "" H 14750 5700 60 0000 C CNN
+ 1 14750 5700
+ -1 0 0 -1
+$EndComp
+$Comp
+L DC v2
+U 1 1 668A6303
+P 14750 6950
+F 0 "v2" H 14550 7050 60 0000 C CNN
+F 1 "3.5" H 14550 6900 60 0000 C CNN
+F 2 "R1" H 14450 6950 60 0000 C CNN
+F 3 "" H 14750 6950 60 0000 C CNN
+ 1 14750 6950
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 8200 6150 8200 6650
+Wire Wire Line
+ 7500 6800 7500 6850
+Wire Wire Line
+ 7500 6850 7900 6850
+Wire Wire Line
+ 7500 6400 7500 6350
+Wire Wire Line
+ 7500 6350 8200 6350
+Connection ~ 8200 6350
+Wire Wire Line
+ 9800 6150 9800 6650
+Connection ~ 9800 6250
+Wire Wire Line
+ 10800 6850 10800 6750
+Wire Wire Line
+ 10100 6850 10800 6850
+Wire Wire Line
+ 10800 6350 9850 6350
+Wire Wire Line
+ 9850 6350 9850 6250
+Wire Wire Line
+ 9850 6250 9800 6250
+Wire Wire Line
+ 8200 5250 14750 5250
+Wire Wire Line
+ 9000 5300 9000 5250
+Connection ~ 9000 5250
+Wire Wire Line
+ 8800 7450 9150 7450
+Wire Wire Line
+ 8300 7450 8500 7450
+Wire Wire Line
+ 9800 7450 9450 7450
+Wire Wire Line
+ 8000 7650 7650 7650
+Connection ~ 7650 6850
+Wire Wire Line
+ 8300 7850 8300 8550
+Wire Wire Line
+ 8600 8750 9500 8750
+Wire Wire Line
+ 9800 8550 9800 7850
+Wire Wire Line
+ 7650 6850 7650 7900
+Connection ~ 7650 7650
+Wire Wire Line
+ 7650 8800 7650 9950
+Wire Wire Line
+ 9800 9950 9800 8950
+Wire Wire Line
+ 8300 8950 8300 9950
+Wire Wire Line
+ 8300 8400 8900 8400
+Wire Wire Line
+ 8900 8400 8900 8750
+Connection ~ 8900 8750
+Connection ~ 8300 8400
+Wire Wire Line
+ 9000 6200 9000 7450
+Connection ~ 9000 7450
+Wire Wire Line
+ 10400 6850 10400 8050
+Connection ~ 10400 6850
+Wire Wire Line
+ 10100 7650 10400 7650
+Connection ~ 10400 7650
+Wire Wire Line
+ 10400 9950 10400 8950
+Wire Wire Line
+ 12600 5250 12600 5350
+Connection ~ 9800 5250
+Wire Wire Line
+ 12600 6250 12600 6650
+Wire Wire Line
+ 12600 7150 12600 6950
+Wire Wire Line
+ 12600 7650 12600 7450
+Wire Wire Line
+ 12600 7950 12600 8350
+Wire Wire Line
+ 12200 8250 12600 8250
+Connection ~ 12600 8250
+Wire Wire Line
+ 11900 8250 11150 8250
+Wire Wire Line
+ 11150 8250 11150 9000
+Wire Wire Line
+ 9950 9000 11400 9000
+Wire Wire Line
+ 12600 8800 12600 8750
+Wire Wire Line
+ 12300 9300 12300 9000
+Wire Wire Line
+ 11700 9300 12300 9300
+Wire Wire Line
+ 11700 9300 11700 9200
+Wire Wire Line
+ 12000 9400 12000 9300
+Connection ~ 12000 9300
+Wire Wire Line
+ 13150 8700 13150 8550
+Wire Wire Line
+ 13150 8550 12900 8550
+Wire Wire Line
+ 7650 9950 14000 9950
+Wire Wire Line
+ 13150 9950 13150 9600
+Wire Wire Line
+ 12000 9700 12000 9950
+Connection ~ 12000 9950
+Connection ~ 10400 9950
+Connection ~ 9800 9950
+Connection ~ 8300 9950
+Wire Wire Line
+ 14000 5250 14000 5350
+Connection ~ 12600 5250
+Wire Wire Line
+ 14000 6000 14000 5750
+Wire Wire Line
+ 13700 6200 12800 6200
+Wire Wire Line
+ 12800 6200 12800 6400
+Wire Wire Line
+ 12800 6400 12600 6400
+Connection ~ 12600 6400
+Wire Wire Line
+ 14000 6400 14000 6500
+Wire Wire Line
+ 13550 6750 13550 6700
+Wire Wire Line
+ 13550 6700 13700 6700
+Wire Wire Line
+ 13250 6950 12900 6950
+Wire Wire Line
+ 12900 6950 12900 8100
+Wire Wire Line
+ 12900 8100 12600 8100
+Connection ~ 12600 8100
+Wire Wire Line
+ 14000 9950 14000 6900
+Connection ~ 13150 9950
+Wire Wire Line
+ 13550 7150 13550 7200
+Wire Wire Line
+ 13550 7200 14000 7200
+Connection ~ 14000 7200
+Connection ~ 14000 5250
+Wire Wire Line
+ 14300 5550 14300 6300
+Wire Wire Line
+ 14300 6300 14750 6300
+Wire Wire Line
+ 14750 6150 14750 6500
+Connection ~ 14750 6300
+Wire Wire Line
+ 14000 6450 14350 6450
+Wire Wire Line
+ 14350 6450 14350 7450
+Connection ~ 14000 6450
+Wire Wire Line
+ 11600 4850 11600 5250
+Connection ~ 11600 5250
+Wire Wire Line
+ 11200 9950 11200 10600
+Connection ~ 11200 9950
+Wire Wire Line
+ 8200 7050 8200 7250
+Wire Wire Line
+ 8200 7250 7950 7250
+Wire Wire Line
+ 7950 7250 7950 10450
+Wire Wire Line
+ 7950 10450 11200 10450
+Connection ~ 11200 10450
+Wire Wire Line
+ 9800 7050 10050 7050
+Wire Wire Line
+ 10050 7050 10050 10350
+Wire Wire Line
+ 10050 10350 11200 10350
+Connection ~ 11200 10350
+Wire Wire Line
+ 11700 8800 11700 7900
+Wire Wire Line
+ 11700 7900 11850 7900
+Wire Wire Line
+ 12600 9200 12600 9950
+Connection ~ 12600 9950
+Wire Wire Line
+ 14750 7700 15150 7700
+Wire Wire Line
+ 9950 9000 9950 8400
+Wire Wire Line
+ 9950 8400 9800 8400
+Connection ~ 9800 8400
+Connection ~ 11150 9000
+Wire Wire Line
+ 14350 7450 14750 7450
+Connection ~ 14750 7450
+Wire Wire Line
+ 11850 7900 11850 5250
+Connection ~ 11850 5250
+Connection ~ 14750 7700
+Wire Wire Line
+ 14750 7700 14750 7400
+Wire Wire Line
+ 6450 6600 7200 6600
+$Comp
+L PORT U1
+U 1 1 668A67B8
+P 6200 6600
+F 0 "U1" H 6250 6700 30 0000 C CNN
+F 1 "PORT" H 6200 6600 30 0000 C CNN
+F 2 "" H 6200 6600 60 0000 C CNN
+F 3 "" H 6200 6600 60 0000 C CNN
+ 1 6200 6600
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 668A6ADF
+P 11550 6550
+F 0 "U1" H 11600 6650 30 0000 C CNN
+F 1 "PORT" H 11550 6550 30 0000 C CNN
+F 2 "" H 11550 6550 60 0000 C CNN
+F 3 "" H 11550 6550 60 0000 C CNN
+ 2 11550 6550
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 11100 6550 11300 6550
+$Comp
+L PORT U1
+U 3 1 668A7018
+P 11200 10850
+F 0 "U1" H 11250 10950 30 0000 C CNN
+F 1 "PORT" H 11200 10850 30 0000 C CNN
+F 2 "" H 11200 10850 60 0000 C CNN
+F 3 "" H 11200 10850 60 0000 C CNN
+ 3 11200 10850
+ 0 -1 -1 0
+$EndComp
+$Comp
+L PORT U1
+U 5 1 668A744A
+P 11850 4850
+F 0 "U1" H 11900 4950 30 0000 C CNN
+F 1 "PORT" H 11850 4850 30 0000 C CNN
+F 2 "" H 11850 4850 60 0000 C CNN
+F 3 "" H 11850 4850 60 0000 C CNN
+ 5 11850 4850
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 668A7705
+P 15400 7700
+F 0 "U1" H 15450 7800 30 0000 C CNN
+F 1 "PORT" H 15400 7700 30 0000 C CNN
+F 2 "" H 15400 7700 60 0000 C CNN
+F 3 "" H 15400 7700 60 0000 C CNN
+ 4 15400 7700
+ -1 0 0 1
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/LM143_sub/LM143_IC.sub b/library/SubcircuitLibrary/LM143_sub/LM143_IC.sub
new file mode 100644
index 00000000..41b29af7
--- /dev/null
+++ b/library/SubcircuitLibrary/LM143_sub/LM143_IC.sub
@@ -0,0 +1,40 @@
+* Subcircuit LM143_IC
+.subckt LM143_IC net-_q1-pad2_ net-_q8-pad2_ net-_i1-pad2_ net-_q13-pad3_ net-_i2-pad1_
+* d:\fossee\esim\library\subcircuitlibrary\lm143_ic\lm143_ic.cir
+.include NPN.lib
+.include PNP.lib
+.include D.lib
+i2 net-_i2-pad1_ net-_i2-pad2_ 80u
+i3 net-_i2-pad1_ net-_i3-pad2_ 80u
+i4 net-_i2-pad1_ net-_i4-pad2_ 80u
+q1 net-_i2-pad2_ net-_q1-pad2_ net-_i1-pad1_ Q2N2222
+q2 net-_i1-pad2_ net-_i1-pad1_ net-_i2-pad2_ Q2N2907A
+q6 net-_i1-pad2_ net-_i5-pad1_ net-_i4-pad2_ Q2N2907A
+q8 net-_i4-pad2_ net-_q8-pad2_ net-_i5-pad1_ Q2N2222
+r2 net-_q3-pad3_ net-_i3-pad2_ 5.6k
+r3 net-_i3-pad2_ net-_q7-pad3_ 5.6k
+q3 net-_q3-pad1_ net-_i1-pad1_ net-_q3-pad3_ Q2N2907A
+q7 net-_c1-pad2_ net-_i5-pad1_ net-_q7-pad3_ Q2N2907A
+q4 net-_q3-pad1_ net-_q3-pad1_ net-_i1-pad2_ Q2N2222
+q5 net-_c1-pad2_ net-_q3-pad1_ net-_i1-pad2_ Q2N2222
+i1 net-_i1-pad1_ net-_i1-pad2_ 20u
+i5 net-_i5-pad1_ net-_i1-pad2_ 20u
+i6 net-_i2-pad1_ net-_d1-pad1_ 400u
+d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148
+d2 net-_d1-pad2_ net-_d2-pad2_ 1N4148
+d3 net-_d2-pad2_ net-_c1-pad1_ 1N4148
+q11 net-_c1-pad1_ net-_q11-pad2_ net-_q10-pad1_ Q2N2222
+c1 net-_c1-pad1_ net-_c1-pad2_ 27p
+q9 net-_i2-pad1_ net-_c1-pad2_ net-_q10-pad2_ Q2N2222
+q10 net-_q10-pad1_ net-_q10-pad2_ net-_i1-pad2_ Q2N2222
+r5 net-_q10-pad2_ net-_i1-pad2_ 39k
+v1 net-_q11-pad2_ net-_i1-pad2_ 2
+q15 net-_i2-pad1_ net-_i7-pad2_ net-_q13-pad1_ Q2N2222
+q13 net-_q13-pad1_ net-_d1-pad1_ net-_q13-pad3_ Q2N2222
+q14 net-_i1-pad2_ net-_q12-pad3_ net-_q13-pad3_ Q2N2907A
+q12 net-_i1-pad2_ net-_c1-pad1_ net-_q12-pad3_ Q2N2907A
+i7 net-_i2-pad1_ net-_i7-pad2_ 400u
+v2 net-_i7-pad2_ net-_q13-pad3_ 3.5
+* Control Statements
+
+.ends LM143_IC \ No newline at end of file
diff --git a/library/SubcircuitLibrary/LM143_sub/LM143_IC_Previous_Values.xml b/library/SubcircuitLibrary/LM143_sub/LM143_IC_Previous_Values.xml
new file mode 100644
index 00000000..241d7b93
--- /dev/null
+++ b/library/SubcircuitLibrary/LM143_sub/LM143_IC_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source><i2 name="Source type">80u</i2><i3 name="Source type">80u</i3><i4 name="Source type">80u</i4><i1 name="Source type">20u</i1><i5 name="Source type">20u</i5><i6 name="Source type">400u</i6><v1 name="Source type">2</v1><i7 name="Source type">400u</i7><v2 name="Source type">3.5</v2></source><model /><devicemodel><q1><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q1><q2><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q2><q6><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q6><q8><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q8><q3><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q3><q7><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q7><q4><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q4><q5><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q5><d1><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d1><d2><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d2><d3><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Diode\D.lib</field></d3><q11><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q11><q9><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q9><q10><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q10><q15><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q15><q13><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\NPN.lib</field></q13><q14><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q14><q12><field>D:\FOSSEE\eSim\library\deviceModelLibrary\Transistor\PNP.lib</field></q12></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/LM143_sub/NPN.lib b/library/SubcircuitLibrary/LM143_sub/NPN.lib
new file mode 100644
index 00000000..be5f3073
--- /dev/null
+++ b/library/SubcircuitLibrary/LM143_sub/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222 NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307
++ Ise=14.34f Ikf=0.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p
++ Mjc=0.3416 Vjc=0.75 Fc=0.5 Cje=22.01p Mje=0.377 Vje=0.75 Tr=46.91n Tf=411.1p
++ Itf=0.6 Vtf=1.7 Xtf=3 Rb=10)
diff --git a/library/SubcircuitLibrary/LM143_sub/PNP.lib b/library/SubcircuitLibrary/LM143_sub/PNP.lib
new file mode 100644
index 00000000..7edda0ea
--- /dev/null
+++ b/library/SubcircuitLibrary/LM143_sub/PNP.lib
@@ -0,0 +1,4 @@
+.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++ Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++ Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++ Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/LM143_sub/analysis b/library/SubcircuitLibrary/LM143_sub/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/LM143_sub/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file
generated by cgit (git 2.34.1) at 2024-12-19 15:26:43 +0000