diff options
Diffstat (limited to 'library/SubcircuitLibrary/DM74LS279')
| -rw-r--r-- | library/SubcircuitLibrary/DM74LS279/74LS279-cache.lib | 61 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/DM74LS279/74LS279.cir | 13 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/DM74LS279/74LS279.cir.out | 20 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/DM74LS279/74LS279.pro | 73 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/DM74LS279/74LS279.sch | 136 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/DM74LS279/74LS279.sub | 14 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/DM74LS279/74LS279_Previous_Values.xml | 1 | ||||
| -rw-r--r-- | library/SubcircuitLibrary/DM74LS279/analysis | 1 |
8 files changed, 319 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/DM74LS279/74LS279-cache.lib b/library/SubcircuitLibrary/DM74LS279/74LS279-cache.lib new file mode 100644 index 00000000..ce6d8814 --- /dev/null +++ b/library/SubcircuitLibrary/DM74LS279/74LS279-cache.lib @@ -0,0 +1,61 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# d_nand +# +DEF d_nand U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_nand" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 +A 150 49 100 6 900 0 1 0 N 250 50 150 150 +P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N +X IN1 1 -450 100 200 R 50 50 1 1 I +X IN2 2 -450 0 200 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/DM74LS279/74LS279.cir b/library/SubcircuitLibrary/DM74LS279/74LS279.cir new file mode 100644 index 00000000..ce628504 --- /dev/null +++ b/library/SubcircuitLibrary/DM74LS279/74LS279.cir @@ -0,0 +1,13 @@ +* C:\Users\senba\Desktop\FOSSEE\eSim\library\SubcircuitLibrary\74LS279\74LS279.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 05/09/25 09:07:00 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U2 Net-_U1-Pad1_ Net-_U1-Pad3_ Net-_U2-Pad3_ d_nand +U3 Net-_U2-Pad3_ Net-_U1-Pad2_ Net-_U1-Pad3_ d_nand +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ PORT + +.end diff --git a/library/SubcircuitLibrary/DM74LS279/74LS279.cir.out b/library/SubcircuitLibrary/DM74LS279/74LS279.cir.out new file mode 100644 index 00000000..929d98e9 --- /dev/null +++ b/library/SubcircuitLibrary/DM74LS279/74LS279.cir.out @@ -0,0 +1,20 @@ +* c:\users\senba\desktop\fossee\esim\library\subcircuitlibrary\74ls279\74ls279.cir + +* u2 net-_u1-pad1_ net-_u1-pad3_ net-_u2-pad3_ d_nand +* u3 net-_u2-pad3_ net-_u1-pad2_ net-_u1-pad3_ d_nand +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ port +a1 [net-_u1-pad1_ net-_u1-pad3_ ] net-_u2-pad3_ u2 +a2 [net-_u2-pad3_ net-_u1-pad2_ ] net-_u1-pad3_ u3 +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u2 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u3 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/DM74LS279/74LS279.pro b/library/SubcircuitLibrary/DM74LS279/74LS279.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/DM74LS279/74LS279.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/DM74LS279/74LS279.sch b/library/SubcircuitLibrary/DM74LS279/74LS279.sch new file mode 100644 index 00000000..97712599 --- /dev/null +++ b/library/SubcircuitLibrary/DM74LS279/74LS279.sch @@ -0,0 +1,136 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L d_nand U2 +U 1 1 681D7759 +P 5250 3300 +F 0 "U2" H 5250 3300 60 0000 C CNN +F 1 "d_nand" H 5300 3400 60 0000 C CNN +F 2 "" H 5250 3300 60 0000 C CNN +F 3 "" H 5250 3300 60 0000 C CNN + 1 5250 3300 + 1 0 0 -1 +$EndComp +$Comp +L d_nand U3 +U 1 1 681D778E +P 5250 4200 +F 0 "U3" H 5250 4200 60 0000 C CNN +F 1 "d_nand" H 5300 4300 60 0000 C CNN +F 2 "" H 5250 4200 60 0000 C CNN +F 3 "" H 5250 4200 60 0000 C CNN + 1 5250 4200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5700 3250 6000 3250 +Wire Wire Line + 6000 3250 6000 3500 +Wire Wire Line + 6000 3500 4500 3500 +Wire Wire Line + 4500 3500 4500 4100 +Wire Wire Line + 4500 4100 4800 4100 +Wire Wire Line + 4800 3300 4650 3300 +Wire Wire Line + 4650 3300 4650 4000 +Wire Wire Line + 4650 4000 5800 4000 +Wire Wire Line + 5800 4000 5800 4150 +Wire Wire Line + 5700 4150 6400 4150 +Connection ~ 5800 4150 +Wire Wire Line + 4800 3200 4250 3200 +Wire Wire Line + 4800 4200 4300 4200 +$Comp +L PORT U1 +U 1 1 681D781F +P 4000 3200 +F 0 "U1" H 4050 3300 30 0000 C CNN +F 1 "PORT" H 4000 3200 30 0000 C CNN +F 2 "" H 4000 3200 60 0000 C CNN +F 3 "" H 4000 3200 60 0000 C CNN + 1 4000 3200 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 681D7855 +P 4050 4200 +F 0 "U1" H 4100 4300 30 0000 C CNN +F 1 "PORT" H 4050 4200 30 0000 C CNN +F 2 "" H 4050 4200 60 0000 C CNN +F 3 "" H 4050 4200 60 0000 C CNN + 2 4050 4200 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 681D788A +P 6650 4150 +F 0 "U1" H 6700 4250 30 0000 C CNN +F 1 "PORT" H 6650 4150 30 0000 C CNN +F 2 "" H 6650 4150 60 0000 C CNN +F 3 "" H 6650 4150 60 0000 C CNN + 3 6650 4150 + -1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/DM74LS279/74LS279.sub b/library/SubcircuitLibrary/DM74LS279/74LS279.sub new file mode 100644 index 00000000..b6000bca --- /dev/null +++ b/library/SubcircuitLibrary/DM74LS279/74LS279.sub @@ -0,0 +1,14 @@ +* Subcircuit 74LS279 +.subckt 74LS279 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ +* c:\users\senba\desktop\fossee\esim\library\subcircuitlibrary\74ls279\74ls279.cir +* u2 net-_u1-pad1_ net-_u1-pad3_ net-_u2-pad3_ d_nand +* u3 net-_u2-pad3_ net-_u1-pad2_ net-_u1-pad3_ d_nand +a1 [net-_u1-pad1_ net-_u1-pad3_ ] net-_u2-pad3_ u2 +a2 [net-_u2-pad3_ net-_u1-pad2_ ] net-_u1-pad3_ u3 +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u2 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nand, NgSpice Name: d_nand +.model u3 d_nand(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Control Statements + +.ends 74LS279
\ No newline at end of file diff --git a/library/SubcircuitLibrary/DM74LS279/74LS279_Previous_Values.xml b/library/SubcircuitLibrary/DM74LS279/74LS279_Previous_Values.xml new file mode 100644 index 00000000..f38c7e55 --- /dev/null +++ b/library/SubcircuitLibrary/DM74LS279/74LS279_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis><source /><model><u2 name="type">d_nand<field1 name="Enter Rise Delay (default=1.0e-9)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Input Load (default=1.0e-12)" /></u2><u3 name="type">d_nand<field4 name="Enter Rise Delay (default=1.0e-9)" /><field5 name="Enter Fall Delay (default=1.0e-9)" /><field6 name="Enter Input Load (default=1.0e-12)" /></u3></model><devicemodel /><subcircuit /></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/DM74LS279/analysis b/library/SubcircuitLibrary/DM74LS279/analysis new file mode 100644 index 00000000..da4416b9 --- /dev/null +++ b/library/SubcircuitLibrary/DM74LS279/analysis @@ -0,0 +1 @@ +.tran 0.001e-00 4e-00 0e-00
\ No newline at end of file |