diff options
Diffstat (limited to 'Examples/d_source_Testcircuit/d_source_Testcircuit.cir.out')
| -rw-r--r-- | Examples/d_source_Testcircuit/d_source_Testcircuit.cir.out | 27 |
1 files changed, 27 insertions, 0 deletions
diff --git a/Examples/d_source_Testcircuit/d_source_Testcircuit.cir.out b/Examples/d_source_Testcircuit/d_source_Testcircuit.cir.out new file mode 100644 index 00000000..f4c0a5c4 --- /dev/null +++ b/Examples/d_source_Testcircuit/d_source_Testcircuit.cir.out @@ -0,0 +1,27 @@ +* /home/mallikarjuna/esim-workspace/d_source_testcircuit/d_source_testcircuit.cir + +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ d_source +* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ out1 out2 out3 out4 dac_bridge_4 +* u3 out1 plot_v1 +* u4 out2 plot_v1 +* u5 out3 plot_v1 +* u6 out4 plot_v1 +a1 [net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ ] u1 +a2 [net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ ] [out1 out2 out3 out4 ] u2 +* Schematic Name: d_source, NgSpice Name: d_source +.model u1 d_source(input_file="m_source.txt" input_load=1.0e-12 ) +* Schematic Name: dac_bridge_4, NgSpice Name: dac_bridge +.model u2 dac_bridge(out_undef=0.5 out_low=0.0 out_high=5.0 t_rise=1.0e-9 t_fall=1.0e-9 input_load=1.0e-12 ) +.tran 100e-06 10e-03 0e-03 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +plot v(out1) +plot v(out2) +plot v(out3) +plot v(out4) +.endc +.end |