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| author | rahulp13 | 2023-06-13 18:10:16 +0530 |
|---|---|---|
| committer | rahulp13 | 2023-06-13 18:10:16 +0530 |
| commit | 172debd60ec1bae09c6b9c9180a388628e819909 (patch) | |
| tree | d37e6da4a8ed3dbaf761751df3d3224662a611bf /src/kicadtoNgspice/DeviceModel.py | |
| parent | 2ed5f8dce60da2dfde8cf36a8f8b29d3c2fb1107 (diff) | |
| download | eSim-172debd60ec1bae09c6b9c9180a388628e819909.tar.gz eSim-172debd60ec1bae09c6b9c9180a388628e819909.tar.bz2 eSim-172debd60ec1bae09c6b9c9180a388628e819909.zip | |
maker module flake8 compliant & added docstrings
Diffstat (limited to 'src/kicadtoNgspice/DeviceModel.py')
| -rwxr-xr-x | src/kicadtoNgspice/DeviceModel.py | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/kicadtoNgspice/DeviceModel.py b/src/kicadtoNgspice/DeviceModel.py index f16b30ab..7fb9776e 100755 --- a/src/kicadtoNgspice/DeviceModel.py +++ b/src/kicadtoNgspice/DeviceModel.py @@ -693,7 +693,7 @@ class DeviceModel(QtWidgets.QWidget): # Sumanto Kar, sumantokar@iitb.ac.in # Nagesh Karmali, nags@cse.iitb.ac.in # Firuza Karmali, firuza@cse.iitb.ac.in - # Rahul Paknikar, rahulp@cse.iitb.ac.in + # Rahul Paknikar, rahulp@iitb.ac.in # GUIDED BY: # Kunal Ghosh, VLSI System Design Corp.Pvt.Ltd # Anagha Ghosh, VLSI System Design Corp.Pvt.Ltd @@ -756,9 +756,9 @@ class DeviceModel(QtWidgets.QWidget): outputlist.append(k) if '_OR_' in str(j): realoutputlist.append(k) - if '_W_' in str(j) and not(k in wirelist): + if '_W_' in str(j) and not (k in wirelist): wirelist.append(k) - if '_WR_' in str(j) and not(k in realwirelist): + if '_WR_' in str(j) and not (k in realwirelist): realwirelist.append(k) netnames[-1] = netnames[-1].replace("IPAD", '') |