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author | Fahim | 2015-12-30 12:31:05 +0530 |
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committer | Fahim | 2015-12-30 12:31:05 +0530 |
commit | 206afcded42d55572509e3439d752c9a81c84785 (patch) | |
tree | 73ef64eda8504c27d6f1a3b1e141ee8d6efbbbe8 /src/SubcircuitLibrary/scr/scr.sub | |
parent | 06036bffa314d41f31cbdcd6883c9b3558930326 (diff) | |
download | eSim-206afcded42d55572509e3439d752c9a81c84785.tar.gz eSim-206afcded42d55572509e3439d752c9a81c84785.tar.bz2 eSim-206afcded42d55572509e3439d752c9a81c84785.zip |
Added :
1. Power Examples
2. eSim_Power.lib
3. DeviceModel for Powerdiode and Zenerdiode
4. Subcicuit for scr, diac, triac
Diffstat (limited to 'src/SubcircuitLibrary/scr/scr.sub')
-rw-r--r-- | src/SubcircuitLibrary/scr/scr.sub | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/src/SubcircuitLibrary/scr/scr.sub b/src/SubcircuitLibrary/scr/scr.sub new file mode 100644 index 00000000..398c8921 --- /dev/null +++ b/src/SubcircuitLibrary/scr/scr.sub @@ -0,0 +1,23 @@ +* Subcircuit scr +.subckt scr 3 7 1 +* /opt/esim/src/subcircuitlibrary/scr/scr.cir +.include PowerDiode.lib +* f2 +d1 5 2 PowerDiode +c1 3 9 10u +* f1 +v1 8 4 dc 0 +v2 6 5 dc 0 +* u1 9 1 6 aswitch +r1 7 8 50 +r2 3 9 1 +Vf2 2 3 0 +f2 3 9 Vf2 100 +Vf1 4 3 0 +f1 3 9 Vf1 10 +a1 9 (1 6) u1 +* Schematic Name: aswitch, NgSpice Name: aswitch +.model u1 aswitch(log=TRUE cntl_off=0.0 cntl_on=1.0 r_on=1.0 r_off=1.0e12 ) +* Control Statements + +.ends scr |