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authorrahulp132020-02-14 15:16:35 +0530
committerrahulp132020-02-14 15:16:35 +0530
commitcb55e59de7ee4383c04edfae7c39ad9ae9552b36 (patch)
treede1b292a10e8196689bf1a208fe6fe32f4618846 /src/SubcircuitLibrary/INVCMOS/INVCMOS.cir
parent08d4a0336550a0e610709970a0c5d366e109fe82 (diff)
downloadeSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.tar.gz
eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.tar.bz2
eSim-cb55e59de7ee4383c04edfae7c39ad9ae9552b36.zip
common code for Win and Linux, merged py2 changes
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+* /home/saurabh/Downloads/eSim-1.1.2/src/SubcircuitLibrary/INVCMOS/INVCMOS.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Sun Aug 25 17:34:16 2019
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U1 Net-_M1-Pad2_ Net-_C1-Pad1_ PORT
+M1 Net-_C1-Pad1_ Net-_M1-Pad2_ GND GND eSim_MOS_N
+M2 Net-_M2-Pad1_ Net-_M1-Pad2_ Net-_C1-Pad1_ Net-_M2-Pad1_ eSim_MOS_P
+v1 Net-_M2-Pad1_ GND 5
+C1 Net-_C1-Pad1_ GND 1u
+
+.end