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authornilshah982019-07-02 16:42:20 +0530
committernilshah982019-07-02 16:46:12 +0530
commitb085a3df519debbc99acf4ded7e118a1690d6665 (patch)
tree0fc3e5389c2a77a97d1a065875fe87ddee2c23f4 /src/SubcircuitLibrary/74157
parente7cd941bc4a48ff8684e4db6b9dff0efeb51fa6e (diff)
downloadeSim-b085a3df519debbc99acf4ded7e118a1690d6665.tar.gz
eSim-b085a3df519debbc99acf4ded7e118a1690d6665.tar.bz2
eSim-b085a3df519debbc99acf4ded7e118a1690d6665.zip
Subcircuit added by ECE fellows 2019
Diffstat (limited to 'src/SubcircuitLibrary/74157')
-rw-r--r--src/SubcircuitLibrary/74157/3_and-cache.lib61
-rw-r--r--src/SubcircuitLibrary/74157/3_and.cir13
-rw-r--r--src/SubcircuitLibrary/74157/3_and.cir.out20
-rw-r--r--src/SubcircuitLibrary/74157/3_and.pro44
-rw-r--r--src/SubcircuitLibrary/74157/3_and.sch130
-rw-r--r--src/SubcircuitLibrary/74157/3_and.sub14
-rw-r--r--src/SubcircuitLibrary/74157/3_and_Previous_Values.xml1
-rw-r--r--src/SubcircuitLibrary/74157/74157-cache.lib95
-rw-r--r--src/SubcircuitLibrary/74157/74157-rescue.lib22
-rw-r--r--src/SubcircuitLibrary/74157/74157.cir25
-rw-r--r--src/SubcircuitLibrary/74157/74157.cir.out45
-rw-r--r--src/SubcircuitLibrary/74157/74157.pro44
-rw-r--r--src/SubcircuitLibrary/74157/74157.sch560
-rw-r--r--src/SubcircuitLibrary/74157/74157.sub39
-rw-r--r--src/SubcircuitLibrary/74157/74157_Previous_Values.xml1
-rw-r--r--src/SubcircuitLibrary/74157/analysis1
16 files changed, 1115 insertions, 0 deletions
diff --git a/src/SubcircuitLibrary/74157/3_and-cache.lib b/src/SubcircuitLibrary/74157/3_and-cache.lib
new file mode 100644
index 00000000..0a3ccf7f
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/3_and-cache.lib
@@ -0,0 +1,61 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_and
+#
+DEF d_and U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_and" 50 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 149 50 100 -894 0 0 1 0 N 150 -50 250 50
+A 150 49 100 6 900 0 1 0 N 250 50 150 150
+P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N
+X IN1 1 -450 100 200 R 50 50 1 1 I
+X IN2 2 -450 0 200 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/src/SubcircuitLibrary/74157/3_and.cir b/src/SubcircuitLibrary/74157/3_and.cir
new file mode 100644
index 00000000..15f8954d
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/3_and.cir
@@ -0,0 +1,13 @@
+* C:\Users\malli\eSim\src\SubcircuitLibrary\3_and\3_and.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 03/26/19 18:42:57
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U2 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U2-Pad3_ d_and
+U3 Net-_U2-Pad3_ Net-_U1-Pad3_ Net-_U1-Pad4_ d_and
+U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT
+
+.end
diff --git a/src/SubcircuitLibrary/74157/3_and.cir.out b/src/SubcircuitLibrary/74157/3_and.cir.out
new file mode 100644
index 00000000..e3c96645
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/3_and.cir.out
@@ -0,0 +1,20 @@
+* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir
+
+* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and
+* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and
+* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port
+a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2
+a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/src/SubcircuitLibrary/74157/3_and.pro b/src/SubcircuitLibrary/74157/3_and.pro
new file mode 100644
index 00000000..0fdf4d25
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/3_and.pro
@@ -0,0 +1,44 @@
+update=05/31/19 15:26:09
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=../../../kicadSchematicLibrary
+[eeschema/libraries]
+LibName1=eSim_Analog
+LibName2=eSim_Devices
+LibName3=eSim_Digital
+LibName4=eSim_Hybrid
+LibName5=eSim_Miscellaneous
+LibName6=eSim_Plot
+LibName7=eSim_Power
+LibName8=eSim_PSpice
+LibName9=eSim_Sources
+LibName10=eSim_Subckt
+LibName11=eSim_User
diff --git a/src/SubcircuitLibrary/74157/3_and.sch b/src/SubcircuitLibrary/74157/3_and.sch
new file mode 100644
index 00000000..c853bf49
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/3_and.sch
@@ -0,0 +1,130 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:valves
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:3_and-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L d_and U2
+U 1 1 5C9A24D8
+P 4250 2700
+F 0 "U2" H 4250 2700 60 0000 C CNN
+F 1 "d_and" H 4300 2800 60 0000 C CNN
+F 2 "" H 4250 2700 60 0000 C CNN
+F 3 "" H 4250 2700 60 0000 C CNN
+ 1 4250 2700
+ 1 0 0 -1
+$EndComp
+$Comp
+L d_and U3
+U 1 1 5C9A2538
+P 5150 2900
+F 0 "U3" H 5150 2900 60 0000 C CNN
+F 1 "d_and" H 5200 3000 60 0000 C CNN
+F 2 "" H 5150 2900 60 0000 C CNN
+F 3 "" H 5150 2900 60 0000 C CNN
+ 1 5150 2900
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 1 1 5C9A259A
+P 3050 2600
+F 0 "U1" H 3100 2700 30 0000 C CNN
+F 1 "PORT" H 3050 2600 30 0000 C CNN
+F 2 "" H 3050 2600 60 0000 C CNN
+F 3 "" H 3050 2600 60 0000 C CNN
+ 1 3050 2600
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 5C9A25D9
+P 3050 2800
+F 0 "U1" H 3100 2900 30 0000 C CNN
+F 1 "PORT" H 3050 2800 30 0000 C CNN
+F 2 "" H 3050 2800 60 0000 C CNN
+F 3 "" H 3050 2800 60 0000 C CNN
+ 2 3050 2800
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 5C9A260A
+P 3050 3100
+F 0 "U1" H 3100 3200 30 0000 C CNN
+F 1 "PORT" H 3050 3100 30 0000 C CNN
+F 2 "" H 3050 3100 60 0000 C CNN
+F 3 "" H 3050 3100 60 0000 C CNN
+ 3 3050 3100
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 5C9A2637
+P 6900 2850
+F 0 "U1" H 6950 2950 30 0000 C CNN
+F 1 "PORT" H 6900 2850 30 0000 C CNN
+F 2 "" H 6900 2850 60 0000 C CNN
+F 3 "" H 6900 2850 60 0000 C CNN
+ 4 6900 2850
+ -1 0 0 1
+$EndComp
+Wire Wire Line
+ 4700 2650 4700 2800
+Wire Wire Line
+ 5600 2850 6650 2850
+Wire Wire Line
+ 3800 2600 3300 2600
+Wire Wire Line
+ 3800 2700 3300 2700
+Wire Wire Line
+ 3300 2700 3300 2800
+Wire Wire Line
+ 3300 3100 4700 3100
+Wire Wire Line
+ 4700 3100 4700 2900
+Text Notes 3500 2600 0 60 ~ 12
+in1
+Text Notes 3450 2800 0 60 ~ 12
+in2\n
+Text Notes 3500 3100 0 60 ~ 12
+in3
+Text Notes 6100 2850 0 60 ~ 12
+out
+$EndSCHEMATC
diff --git a/src/SubcircuitLibrary/74157/3_and.sub b/src/SubcircuitLibrary/74157/3_and.sub
new file mode 100644
index 00000000..b949ae4f
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/3_and.sub
@@ -0,0 +1,14 @@
+* Subcircuit 3_and
+.subckt 3_and net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_
+* c:\users\malli\esim\src\subcircuitlibrary\3_and\3_and.cir
+* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_and
+* u3 net-_u2-pad3_ net-_u1-pad3_ net-_u1-pad4_ d_and
+a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2
+a2 [net-_u2-pad3_ net-_u1-pad3_ ] net-_u1-pad4_ u3
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u2 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_and, NgSpice Name: d_and
+.model u3 d_and(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Control Statements
+
+.ends 3_and \ No newline at end of file
diff --git a/src/SubcircuitLibrary/74157/3_and_Previous_Values.xml b/src/SubcircuitLibrary/74157/3_and_Previous_Values.xml
new file mode 100644
index 00000000..abc5faaa
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/3_and_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u2 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u2><u3 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u3></model><devicemodel /><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/src/SubcircuitLibrary/74157/74157-cache.lib b/src/SubcircuitLibrary/74157/74157-cache.lib
new file mode 100644
index 00000000..d72d1628
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/74157-cache.lib
@@ -0,0 +1,95 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 3_and-RESCUE-74157
+#
+DEF 3_and-RESCUE-74157 X 0 40 Y Y 1 F N
+F0 "X" 900 300 60 H V C CNN
+F1 "3_and-RESCUE-74157" 950 500 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250
+P 2 0 1 0 650 550 1000 550 N
+P 3 0 1 0 650 550 650 250 1000 250 N
+X in1 1 450 500 200 R 50 50 1 1 I
+X in2 2 450 400 200 R 50 50 1 1 I
+X in3 3 450 300 200 R 50 50 1 1 I
+X out 4 1300 400 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# d_inverter
+#
+DEF d_inverter U 0 40 Y Y 1 F N
+F0 "U" 0 -100 60 H V C CNN
+F1 "d_inverter" 0 150 60 H V C CNN
+F2 "" 50 -50 60 H V C CNN
+F3 "" 50 -50 60 H V C CNN
+DRAW
+P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N
+X ~ 1 -300 0 200 R 50 50 1 1 I
+X ~ 2 300 0 200 L 50 50 1 1 O I
+ENDDRAW
+ENDDEF
+#
+# d_or
+#
+DEF d_or U 0 40 Y Y 1 F N
+F0 "U" 0 0 60 H V C CNN
+F1 "d_or" 0 100 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50
+A -25 -124 325 574 323 0 1 0 N 150 150 250 50
+A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50
+P 2 0 1 0 -250 -50 150 -50 N
+P 2 0 1 0 -250 150 150 150 N
+X IN1 1 -450 100 215 R 50 50 1 1 I
+X IN2 2 -450 0 215 R 50 50 1 1 I
+X OUT 3 450 50 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/src/SubcircuitLibrary/74157/74157-rescue.lib b/src/SubcircuitLibrary/74157/74157-rescue.lib
new file mode 100644
index 00000000..cac27fc1
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/74157-rescue.lib
@@ -0,0 +1,22 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# 3_and-RESCUE-74157
+#
+DEF 3_and-RESCUE-74157 X 0 40 Y Y 1 F N
+F0 "X" 900 300 60 H V C CNN
+F1 "3_and-RESCUE-74157" 950 500 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 950 400 158 716 -716 0 1 0 N 1000 550 1000 250
+P 2 0 1 0 650 550 1000 550 N
+P 3 0 1 0 650 550 650 250 1000 250 N
+X in1 1 450 500 200 R 50 50 1 1 I
+X in2 2 450 400 200 R 50 50 1 1 I
+X in3 3 450 300 200 R 50 50 1 1 I
+X out 4 1300 400 200 L 50 50 1 1 O
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/src/SubcircuitLibrary/74157/74157.cir b/src/SubcircuitLibrary/74157/74157.cir
new file mode 100644
index 00000000..cfd1c0e9
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/74157.cir
@@ -0,0 +1,25 @@
+* /home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/74157/74157.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: Tue Jun 25 20:50:36 2019
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+U20 Net-_U20-Pad1_ Net-_U20-Pad2_ Net-_U1-Pad4_ d_or
+U21 Net-_U21-Pad1_ Net-_U21-Pad2_ Net-_U1-Pad7_ d_or
+U22 Net-_U22-Pad1_ Net-_U22-Pad2_ Net-_U1-Pad9_ d_or
+U23 Net-_U23-Pad1_ Net-_U23-Pad2_ Net-_U1-Pad12_ d_or
+U3 Net-_U1-Pad1_ Net-_U3-Pad2_ d_inverter
+U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ ? Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ Net-_U1-Pad15_ ? PORT
+U2 Net-_U1-Pad15_ Net-_U2-Pad2_ d_inverter
+X2 Net-_U3-Pad2_ Net-_U2-Pad2_ Net-_U1-Pad2_ Net-_U20-Pad1_ 3_and
+X3 Net-_U3-Pad2_ Net-_U2-Pad2_ Net-_U1-Pad5_ Net-_U21-Pad1_ 3_and
+X4 Net-_U3-Pad2_ Net-_U2-Pad2_ Net-_U1-Pad11_ Net-_U22-Pad1_ 3_and
+X5 Net-_U3-Pad2_ Net-_U2-Pad2_ Net-_U1-Pad14_ Net-_U23-Pad1_ 3_and
+X6 Net-_U1-Pad1_ Net-_U2-Pad2_ Net-_U1-Pad3_ Net-_U20-Pad2_ 3_and
+X7 Net-_U1-Pad1_ Net-_U2-Pad2_ Net-_U1-Pad6_ Net-_U21-Pad2_ 3_and
+X1 Net-_U1-Pad1_ Net-_U2-Pad2_ Net-_U1-Pad10_ Net-_U22-Pad2_ 3_and
+X8 Net-_U1-Pad1_ Net-_U2-Pad2_ Net-_U1-Pad13_ Net-_U23-Pad2_ 3_and
+
+.end
diff --git a/src/SubcircuitLibrary/74157/74157.cir.out b/src/SubcircuitLibrary/74157/74157.cir.out
new file mode 100644
index 00000000..b9a19223
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/74157.cir.out
@@ -0,0 +1,45 @@
+* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/74157/74157.cir
+
+.include 3_and.sub
+* u20 net-_u20-pad1_ net-_u20-pad2_ net-_u1-pad4_ d_or
+* u21 net-_u21-pad1_ net-_u21-pad2_ net-_u1-pad7_ d_or
+* u22 net-_u22-pad1_ net-_u22-pad2_ net-_u1-pad9_ d_or
+* u23 net-_u23-pad1_ net-_u23-pad2_ net-_u1-pad12_ d_or
+* u3 net-_u1-pad1_ net-_u3-pad2_ d_inverter
+* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ ? net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ ? port
+* u2 net-_u1-pad15_ net-_u2-pad2_ d_inverter
+x2 net-_u3-pad2_ net-_u2-pad2_ net-_u1-pad2_ net-_u20-pad1_ 3_and
+x3 net-_u3-pad2_ net-_u2-pad2_ net-_u1-pad5_ net-_u21-pad1_ 3_and
+x4 net-_u3-pad2_ net-_u2-pad2_ net-_u1-pad11_ net-_u22-pad1_ 3_and
+x5 net-_u3-pad2_ net-_u2-pad2_ net-_u1-pad14_ net-_u23-pad1_ 3_and
+x6 net-_u1-pad1_ net-_u2-pad2_ net-_u1-pad3_ net-_u20-pad2_ 3_and
+x7 net-_u1-pad1_ net-_u2-pad2_ net-_u1-pad6_ net-_u21-pad2_ 3_and
+x1 net-_u1-pad1_ net-_u2-pad2_ net-_u1-pad10_ net-_u22-pad2_ 3_and
+x8 net-_u1-pad1_ net-_u2-pad2_ net-_u1-pad13_ net-_u23-pad2_ 3_and
+a1 [net-_u20-pad1_ net-_u20-pad2_ ] net-_u1-pad4_ u20
+a2 [net-_u21-pad1_ net-_u21-pad2_ ] net-_u1-pad7_ u21
+a3 [net-_u22-pad1_ net-_u22-pad2_ ] net-_u1-pad9_ u22
+a4 [net-_u23-pad1_ net-_u23-pad2_ ] net-_u1-pad12_ u23
+a5 net-_u1-pad1_ net-_u3-pad2_ u3
+a6 net-_u1-pad15_ net-_u2-pad2_ u2
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u20 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u21 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u22 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u23 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u3 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/src/SubcircuitLibrary/74157/74157.pro b/src/SubcircuitLibrary/74157/74157.pro
new file mode 100644
index 00000000..4042e1e9
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/74157.pro
@@ -0,0 +1,44 @@
+update=Tue Jun 25 20:59:09 2019
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=../../../kicadSchematicLibrary
+[eeschema/libraries]
+LibName1=74157-rescue
+LibName2=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Analog
+LibName3=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Devices
+LibName4=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Digital
+LibName5=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Hybrid
+LibName6=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Miscellaneous
+LibName7=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Plot
+LibName8=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Power
+LibName9=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Sources
+LibName10=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_Subckt
+LibName11=/home/mallikarjuna/Downloads/eSim-1.1.2/kicadSchematicLibrary/eSim_User
diff --git a/src/SubcircuitLibrary/74157/74157.sch b/src/SubcircuitLibrary/74157/74157.sch
new file mode 100644
index 00000000..c7c64ece
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/74157.sch
@@ -0,0 +1,560 @@
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+LIBS:74157-rescue
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:74157-cache
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+EELAYER END
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+encoding utf-8
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diff --git a/src/SubcircuitLibrary/74157/74157.sub b/src/SubcircuitLibrary/74157/74157.sub
new file mode 100644
index 00000000..54897c26
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/74157.sub
@@ -0,0 +1,39 @@
+* Subcircuit 74157
+.subckt 74157 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ ? net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ ?
+* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/74157/74157.cir
+.include 3_and.sub
+* u20 net-_u20-pad1_ net-_u20-pad2_ net-_u1-pad4_ d_or
+* u21 net-_u21-pad1_ net-_u21-pad2_ net-_u1-pad7_ d_or
+* u22 net-_u22-pad1_ net-_u22-pad2_ net-_u1-pad9_ d_or
+* u23 net-_u23-pad1_ net-_u23-pad2_ net-_u1-pad12_ d_or
+* u3 net-_u1-pad1_ net-_u3-pad2_ d_inverter
+* u2 net-_u1-pad15_ net-_u2-pad2_ d_inverter
+x2 net-_u3-pad2_ net-_u2-pad2_ net-_u1-pad2_ net-_u20-pad1_ 3_and
+x3 net-_u3-pad2_ net-_u2-pad2_ net-_u1-pad5_ net-_u21-pad1_ 3_and
+x4 net-_u3-pad2_ net-_u2-pad2_ net-_u1-pad11_ net-_u22-pad1_ 3_and
+x5 net-_u3-pad2_ net-_u2-pad2_ net-_u1-pad14_ net-_u23-pad1_ 3_and
+x6 net-_u1-pad1_ net-_u2-pad2_ net-_u1-pad3_ net-_u20-pad2_ 3_and
+x7 net-_u1-pad1_ net-_u2-pad2_ net-_u1-pad6_ net-_u21-pad2_ 3_and
+x1 net-_u1-pad1_ net-_u2-pad2_ net-_u1-pad10_ net-_u22-pad2_ 3_and
+x8 net-_u1-pad1_ net-_u2-pad2_ net-_u1-pad13_ net-_u23-pad2_ 3_and
+a1 [net-_u20-pad1_ net-_u20-pad2_ ] net-_u1-pad4_ u20
+a2 [net-_u21-pad1_ net-_u21-pad2_ ] net-_u1-pad7_ u21
+a3 [net-_u22-pad1_ net-_u22-pad2_ ] net-_u1-pad9_ u22
+a4 [net-_u23-pad1_ net-_u23-pad2_ ] net-_u1-pad12_ u23
+a5 net-_u1-pad1_ net-_u3-pad2_ u3
+a6 net-_u1-pad15_ net-_u2-pad2_ u2
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u20 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u21 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u22 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_or, NgSpice Name: d_or
+.model u23 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u3 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Schematic Name: d_inverter, NgSpice Name: d_inverter
+.model u2 d_inverter(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 )
+* Control Statements
+
+.ends 74157 \ No newline at end of file
diff --git a/src/SubcircuitLibrary/74157/74157_Previous_Values.xml b/src/SubcircuitLibrary/74157/74157_Previous_Values.xml
new file mode 100644
index 00000000..6fa26ea2
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/74157_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model><u4 name="type">d_and<field1 name="Enter Fall Delay (default=1.0e-9)" /><field2 name="Enter Input Load (default=1.0e-12)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /></u4><u12 name="type">d_and<field4 name="Enter Fall Delay (default=1.0e-9)" /><field5 name="Enter Input Load (default=1.0e-12)" /><field6 name="Enter Rise Delay (default=1.0e-9)" /></u12><u5 name="type">d_and<field7 name="Enter Fall Delay (default=1.0e-9)" /><field8 name="Enter Input Load (default=1.0e-12)" /><field9 name="Enter Rise Delay (default=1.0e-9)" /></u5><u13 name="type">d_and<field10 name="Enter Fall Delay (default=1.0e-9)" /><field11 name="Enter Input Load (default=1.0e-12)" /><field12 name="Enter Rise Delay (default=1.0e-9)" /></u13><u8 name="type">d_and<field13 name="Enter Fall Delay (default=1.0e-9)" /><field14 name="Enter Input Load (default=1.0e-12)" /><field15 name="Enter Rise Delay (default=1.0e-9)" /></u8><u16 name="type">d_and<field16 name="Enter Fall Delay (default=1.0e-9)" /><field17 name="Enter Input Load (default=1.0e-12)" /><field18 name="Enter Rise Delay (default=1.0e-9)" /></u16><u9 name="type">d_and<field19 name="Enter Fall Delay (default=1.0e-9)" /><field20 name="Enter Input Load (default=1.0e-12)" /><field21 name="Enter Rise Delay (default=1.0e-9)" /></u9><u17 name="type">d_and<field22 name="Enter Fall Delay (default=1.0e-9)" /><field23 name="Enter Input Load (default=1.0e-12)" /><field24 name="Enter Rise Delay (default=1.0e-9)" /></u17><u6 name="type">d_and<field25 name="Enter Fall Delay (default=1.0e-9)" /><field26 name="Enter Input Load (default=1.0e-12)" /><field27 name="Enter Rise Delay (default=1.0e-9)" /></u6><u14 name="type">d_and<field28 name="Enter Fall Delay (default=1.0e-9)" /><field29 name="Enter Input Load (default=1.0e-12)" /><field30 name="Enter Rise Delay (default=1.0e-9)" /></u14><u7 name="type">d_and<field31 name="Enter Fall Delay (default=1.0e-9)" /><field32 name="Enter Input Load (default=1.0e-12)" /><field33 name="Enter Rise Delay (default=1.0e-9)" /></u7><u15 name="type">d_and<field34 name="Enter Fall Delay (default=1.0e-9)" /><field35 name="Enter Input Load (default=1.0e-12)" /><field36 name="Enter Rise Delay (default=1.0e-9)" /></u15><u10 name="type">d_and<field37 name="Enter Fall Delay (default=1.0e-9)" /><field38 name="Enter Input Load (default=1.0e-12)" /><field39 name="Enter Rise Delay (default=1.0e-9)" /></u10><u18 name="type">d_and<field40 name="Enter Fall Delay (default=1.0e-9)" /><field41 name="Enter Input Load (default=1.0e-12)" /><field42 name="Enter Rise Delay (default=1.0e-9)" /></u18><u11 name="type">d_and<field43 name="Enter Fall Delay (default=1.0e-9)" /><field44 name="Enter Input Load (default=1.0e-12)" /><field45 name="Enter Rise Delay (default=1.0e-9)" /></u11><u19 name="type">d_and<field46 name="Enter Fall Delay (default=1.0e-9)" /><field47 name="Enter Input Load (default=1.0e-12)" /><field48 name="Enter Rise Delay (default=1.0e-9)" /></u19><u20 name="type">d_or<field49 name="Enter Fall Delay (default=1.0e-9)" /><field50 name="Enter Input Load (default=1.0e-12)" /><field51 name="Enter Rise Delay (default=1.0e-9)" /></u20><u21 name="type">d_or<field52 name="Enter Fall Delay (default=1.0e-9)" /><field53 name="Enter Input Load (default=1.0e-12)" /><field54 name="Enter Rise Delay (default=1.0e-9)" /></u21><u22 name="type">d_or<field55 name="Enter Fall Delay (default=1.0e-9)" /><field56 name="Enter Input Load (default=1.0e-12)" /><field57 name="Enter Rise Delay (default=1.0e-9)" /></u22><u23 name="type">d_or<field58 name="Enter Fall Delay (default=1.0e-9)" /><field59 name="Enter Input Load (default=1.0e-12)" /><field60 name="Enter Rise Delay (default=1.0e-9)" /></u23><u3 name="type">d_inverter<field61 name="Enter Fall Delay (default=1.0e-9)" /><field62 name="Enter Input Load (default=1.0e-12)" /><field63 name="Enter Rise Delay (default=1.0e-9)" /></u3><u2 name="type">d_inverter<field64 name="Enter Fall Delay (default=1.0e-9)" /><field65 name="Enter Input Load (default=1.0e-12)" /><field66 name="Enter Rise Delay (default=1.0e-9)" /></u2></model><devicemodel /><subcircuit><x8><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/3_and</field></x8><x2><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/3_and</field></x2><x3><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/3_and</field></x3><x1><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/3_and</field></x1><x6><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/3_and</field></x6><x7><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/3_and</field></x7><x4><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/3_and</field></x4><x5><field>/home/mallikarjuna/Downloads/eSim-1.1.2/src/SubcircuitLibrary/3_and</field></x5></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/src/SubcircuitLibrary/74157/analysis b/src/SubcircuitLibrary/74157/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/src/SubcircuitLibrary/74157/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file