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authorsaurabhb172019-07-02 17:08:16 +0530
committerGitHub2019-07-02 17:08:16 +0530
commit83d93769478a1805083666479d4ff83b875ba955 (patch)
treed97a2f3543ab4e5164490495ee19f20352ecb71f /src/SubcircuitLibrary/2bitmul/half_adder.pro
parent29dc2de214a60216e62d80dfa3e5cbd998c2d6ee (diff)
parent8c44f97b533607d057a28e029e42f001270f4fd4 (diff)
downloadeSim-83d93769478a1805083666479d4ff83b875ba955.tar.gz
eSim-83d93769478a1805083666479d4ff83b875ba955.tar.bz2
eSim-83d93769478a1805083666479d4ff83b875ba955.zip
Merge pull request #115 from nilshah98/ese
Adding the work done by FSF 2019 eSim ECE Fellows
Diffstat (limited to 'src/SubcircuitLibrary/2bitmul/half_adder.pro')
-rw-r--r--src/SubcircuitLibrary/2bitmul/half_adder.pro69
1 files changed, 69 insertions, 0 deletions
diff --git a/src/SubcircuitLibrary/2bitmul/half_adder.pro b/src/SubcircuitLibrary/2bitmul/half_adder.pro
new file mode 100644
index 00000000..695ae0f6
--- /dev/null
+++ b/src/SubcircuitLibrary/2bitmul/half_adder.pro
@@ -0,0 +1,69 @@
+update=Wed Jun 24 11:27:22 2015
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+last_client=eeschema
+[general]
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+BoardNm=
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+ModuleTextSizeV=1.000000000000
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+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
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+LibName35=/home/gaurav/Desktop/eSim Library/eSim_Sources
+LibName36=/home/gaurav/Desktop/eSim Library/eSim_Subckt