summaryrefslogtreecommitdiff
path: root/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub
diff options
context:
space:
mode:
authornilshah982019-07-02 16:42:20 +0530
committernilshah982019-07-02 16:46:12 +0530
commitb085a3df519debbc99acf4ded7e118a1690d6665 (patch)
tree0fc3e5389c2a77a97d1a065875fe87ddee2c23f4 /src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub
parente7cd941bc4a48ff8684e4db6b9dff0efeb51fa6e (diff)
downloadeSim-b085a3df519debbc99acf4ded7e118a1690d6665.tar.gz
eSim-b085a3df519debbc99acf4ded7e118a1690d6665.tar.bz2
eSim-b085a3df519debbc99acf4ded7e118a1690d6665.zip
Subcircuit added by ECE fellows 2019
Diffstat (limited to 'src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub')
-rw-r--r--src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub14
1 files changed, 14 insertions, 0 deletions
diff --git a/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub
new file mode 100644
index 00000000..f888aa71
--- /dev/null
+++ b/src/SubcircuitLibrary/2bit_upcounter/2bit_upcounter.sub
@@ -0,0 +1,14 @@
+* Subcircuit 2bit_upcounter
+.subckt 2bit_upcounter net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_
+* /home/mallikarjuna/downloads/esim-1.1.2/src/subcircuitlibrary/2bit_upcounter/2bit_upcounter.cir
+* u2 net-_u2-pad1_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ d_dff
+* u3 net-_u3-pad1_ net-_u2-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad4_ net-_u3-pad1_ d_dff
+a1 net-_u2-pad1_ net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad3_ net-_u2-pad1_ u2
+a2 net-_u3-pad1_ net-_u2-pad1_ net-_u1-pad2_ net-_u1-pad2_ net-_u1-pad4_ net-_u3-pad1_ u3
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u2 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )
+* Schematic Name: d_dff, NgSpice Name: d_dff
+.model u3 d_dff(ic=0 set_delay=1.0e-9 set_load=1.0e-12 reset_load=1.0e-12 clk_delay=1.0e-9 clk_load=1.0e-12 reset_delay=1.0 data_load=1.0e-12 fall_delay=1.0e-9 rise_delay=1.0e-9 )
+* Control Statements
+
+.ends 2bit_upcounter \ No newline at end of file