CD4011 is NAND gate IC.

11 files changed, 973 insertions, 0 deletions

diff --git a/library/SubcircuitLibrary/CD_4011/CD_4011-cache.lib b/library/SubcircuitLibrary/CD_4011/CD_4011-cache.lib
new file mode 100644
index 00000000..6c512720
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4011/CD_4011-cache.lib
@@ -0,0 +1,100 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_N
+#
+DEF eSim_MOS_N M 0 0 Y N 1 F N
+F0 "M" 0 -150 50 H V R CNN
+F1 "eSim_MOS_N" 100 -50 50 H V R CNN
+F2 "" 300 -300 29 H V C CNN
+F3 "" 100 -200 60 H V C CNN
+ALIAS mosfet_n
+DRAW
+C 150 -200 111 0 1 10 N
+P 2 0 1 10 130 -290 130 -250 N
+P 2 0 1 0 130 -270 200 -270 N
+P 2 0 1 10 130 -220 130 -180 N
+P 2 0 1 0 130 -200 200 -200 N
+P 2 0 1 10 130 -150 130 -110 N
+P 2 0 1 0 130 -130 200 -130 N
+P 2 0 1 0 200 -300 200 -270 N
+P 2 0 1 0 200 -130 200 -100 N
+P 3 0 1 10 110 -275 110 -125 110 -125 N
+P 3 0 1 0 200 -200 300 -200 300 -250 N
+P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F
+X D 1 200 0 100 D 50 50 1 1 P
+X G 2 -100 -200 210 R 50 50 1 1 P
+X S 3 200 -400 100 U 50 50 1 1 P
+X B 4 300 -350 98 U 47 47 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_P
+#
+DEF eSim_MOS_P M 0 0 Y N 1 F N
+F0 "M" -50 50 50 H V R CNN
+F1 "eSim_MOS_P" 50 150 50 H V R CNN
+F2 "" 250 100 29 H V C CNN
+F3 "" 50 0 60 H V C CNN
+ALIAS mosfet_p
+DRAW
+C 100 0 111 0 1 10 N
+P 2 0 1 0 80 -70 150 -70 N
+P 2 0 1 10 80 -50 80 -90 N
+P 2 0 1 0 80 0 150 0 N
+P 2 0 1 10 80 20 80 -20 N
+P 2 0 1 0 80 70 150 70 N
+P 2 0 1 10 80 90 80 50 N
+P 2 0 1 0 150 -70 150 -100 N
+P 2 0 1 0 150 100 150 70 N
+P 3 0 1 10 60 75 60 -75 60 -75 N
+P 3 0 1 0 150 0 250 0 250 -50 N
+P 4 0 1 0 140 0 100 -15 100 15 140 0 F
+X D 1 150 200 100 D 50 50 1 1 P
+X G 2 -150 0 210 R 50 50 1 1 P
+X S 3 150 -200 100 U 50 50 1 1 P
+X B 4 250 -150 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/CD_4011/CD_4011.cir b/library/SubcircuitLibrary/CD_4011/CD_4011.cir
new file mode 100644
index 00000000..ec450aea
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4011/CD_4011.cir
@@ -0,0 +1,27 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD_4011\CD_4011.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/26/22 10:04:49
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+M2  Net-_M2-Pad1_ Net-_M2-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P		
+M5  Net-_M2-Pad1_ Net-_M2-Pad2_ Net-_M5-Pad3_ Net-_M5-Pad3_ eSim_MOS_N		
+M8  Net-_M2-Pad1_ Net-_M6-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P		
+M6  Net-_M5-Pad3_ Net-_M6-Pad2_ Net-_M12-Pad3_ Net-_M12-Pad3_ eSim_MOS_N		
+M10  Net-_M10-Pad1_ Net-_M10-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P		
+M13  Net-_M10-Pad1_ Net-_M10-Pad2_ Net-_M13-Pad3_ Net-_M13-Pad3_ eSim_MOS_N		
+M16  Net-_M10-Pad1_ Net-_M14-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P		
+M14  Net-_M13-Pad3_ Net-_M14-Pad2_ Net-_M12-Pad3_ Net-_M12-Pad3_ eSim_MOS_N		
+M1  Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P		
+M3  Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M3-Pad3_ Net-_M3-Pad3_ eSim_MOS_N		
+M7  Net-_M1-Pad1_ Net-_M4-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P		
+M4  Net-_M3-Pad3_ Net-_M4-Pad2_ Net-_M12-Pad3_ Net-_M12-Pad3_ eSim_MOS_N		
+M9  Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P		
+M11  Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_M11-Pad3_ Net-_M11-Pad3_ eSim_MOS_N		
+M15  Net-_M11-Pad1_ Net-_M12-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P		
+M12  Net-_M11-Pad3_ Net-_M12-Pad2_ Net-_M12-Pad3_ Net-_M12-Pad3_ eSim_MOS_N		
+U1  Net-_M1-Pad2_ Net-_M4-Pad2_ Net-_M1-Pad1_ Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_M12-Pad2_ Net-_M12-Pad3_ Net-_M10-Pad2_ Net-_M14-Pad2_ Net-_M10-Pad1_ Net-_M2-Pad1_ Net-_M2-Pad2_ Net-_M6-Pad2_ Net-_M1-Pad3_ PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/CD_4011/CD_4011.cir.out b/library/SubcircuitLibrary/CD_4011/CD_4011.cir.out
new file mode 100644
index 00000000..b2c1ec12
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4011/CD_4011.cir.out
@@ -0,0 +1,30 @@
+* c:\fossee\esim\library\subcircuitlibrary\cd_4011\cd_4011.cir
+
+.include PMOS-180nm.lib
+.include NMOS-180nm.lib
+m2 net-_m2-pad1_ net-_m2-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m5 net-_m2-pad1_ net-_m2-pad2_ net-_m5-pad3_ net-_m5-pad3_ CMOSN W=100u L=100u M=1
+m8 net-_m2-pad1_ net-_m6-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m6 net-_m5-pad3_ net-_m6-pad2_ net-_m12-pad3_ net-_m12-pad3_ CMOSN W=100u L=100u M=1
+m10 net-_m10-pad1_ net-_m10-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m13 net-_m10-pad1_ net-_m10-pad2_ net-_m13-pad3_ net-_m13-pad3_ CMOSN W=100u L=100u M=1
+m16 net-_m10-pad1_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m14 net-_m13-pad3_ net-_m14-pad2_ net-_m12-pad3_ net-_m12-pad3_ CMOSN W=100u L=100u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m3 net-_m1-pad1_ net-_m1-pad2_ net-_m3-pad3_ net-_m3-pad3_ CMOSN W=100u L=100u M=1
+m7 net-_m1-pad1_ net-_m4-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m4 net-_m3-pad3_ net-_m4-pad2_ net-_m12-pad3_ net-_m12-pad3_ CMOSN W=100u L=100u M=1
+m9 net-_m11-pad1_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m11 net-_m11-pad1_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSN W=100u L=100u M=1
+m15 net-_m11-pad1_ net-_m12-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m12 net-_m11-pad3_ net-_m12-pad2_ net-_m12-pad3_ net-_m12-pad3_ CMOSN W=100u L=100u M=1
+* u1  net-_m1-pad2_ net-_m4-pad2_ net-_m1-pad1_ net-_m11-pad1_ net-_m11-pad2_ net-_m12-pad2_ net-_m12-pad3_ net-_m10-pad2_ net-_m14-pad2_ net-_m10-pad1_ net-_m2-pad1_ net-_m2-pad2_ net-_m6-pad2_ net-_m1-pad3_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/CD_4011/CD_4011.pro b/library/SubcircuitLibrary/CD_4011/CD_4011.pro
new file mode 100644
index 00000000..d7f78c3b
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4011/CD_4011.pro
@@ -0,0 +1,71 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/CD_4011/CD_4011.sch b/library/SubcircuitLibrary/CD_4011/CD_4011.sch
new file mode 100644
index 00000000..a274458b
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4011/CD_4011.sch
@@ -0,0 +1,663 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:CD_4011-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_MOS_P M2
+U 1 1 628F017A
+P 3750 4150
+F 0 "M2" H 3700 4200 50  0000 R CNN
+F 1 "eSim_MOS_P" H 3800 4300 50  0000 R CNN
+F 2 "" H 4000 4250 29  0000 C CNN
+F 3 "" H 3800 4150 60  0000 C CNN
+	1    3750 4150
+	1    0    0    1   
+$EndComp
+$Comp
+L eSim_MOS_N M5
+U 1 1 628F017B
+P 3950 4650
+F 0 "M5" H 3950 4500 50  0000 R CNN
+F 1 "eSim_MOS_N" H 4050 4600 50  0000 R CNN
+F 2 "" H 4250 4350 29  0000 C CNN
+F 3 "" H 4050 4450 60  0000 C CNN
+	1    3950 4650
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_MOS_P M8
+U 1 1 628F017C
+P 4550 4150
+F 0 "M8" H 4500 4200 50  0000 R CNN
+F 1 "eSim_MOS_P" H 4600 4300 50  0000 R CNN
+F 2 "" H 4800 4250 29  0000 C CNN
+F 3 "" H 4600 4150 60  0000 C CNN
+	1    4550 4150
+	-1   0    0    1   
+$EndComp
+$Comp
+L eSim_MOS_N M6
+U 1 1 628F017D
+P 3950 5250
+F 0 "M6" H 3950 5100 50  0000 R CNN
+F 1 "eSim_MOS_N" H 4050 5200 50  0000 R CNN
+F 2 "" H 4250 4950 29  0000 C CNN
+F 3 "" H 4050 5050 60  0000 C CNN
+	1    3950 5250
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_MOS_P M10
+U 1 1 628F017E
+P 6100 4150
+F 0 "M10" H 6050 4200 50  0000 R CNN
+F 1 "eSim_MOS_P" H 6150 4300 50  0000 R CNN
+F 2 "" H 6350 4250 29  0000 C CNN
+F 3 "" H 6150 4150 60  0000 C CNN
+	1    6100 4150
+	1    0    0    1   
+$EndComp
+$Comp
+L eSim_MOS_N M13
+U 1 1 628F017F
+P 6300 4650
+F 0 "M13" H 6300 4500 50  0000 R CNN
+F 1 "eSim_MOS_N" H 6400 4600 50  0000 R CNN
+F 2 "" H 6600 4350 29  0000 C CNN
+F 3 "" H 6400 4450 60  0000 C CNN
+	1    6300 4650
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_MOS_P M16
+U 1 1 628F0180
+P 6900 4150
+F 0 "M16" H 6850 4200 50  0000 R CNN
+F 1 "eSim_MOS_P" H 6950 4300 50  0000 R CNN
+F 2 "" H 7150 4250 29  0000 C CNN
+F 3 "" H 6950 4150 60  0000 C CNN
+	1    6900 4150
+	-1   0    0    1   
+$EndComp
+$Comp
+L eSim_MOS_N M14
+U 1 1 628F0181
+P 6300 5250
+F 0 "M14" H 6300 5100 50  0000 R CNN
+F 1 "eSim_MOS_N" H 6400 5200 50  0000 R CNN
+F 2 "" H 6600 4950 29  0000 C CNN
+F 3 "" H 6400 5050 60  0000 C CNN
+	1    6300 5250
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_MOS_P M1
+U 1 1 628F0182
+P 3750 2050
+F 0 "M1" H 3700 2100 50  0000 R CNN
+F 1 "eSim_MOS_P" H 3800 2200 50  0000 R CNN
+F 2 "" H 4000 2150 29  0000 C CNN
+F 3 "" H 3800 2050 60  0000 C CNN
+	1    3750 2050
+	1    0    0    1   
+$EndComp
+$Comp
+L eSim_MOS_N M3
+U 1 1 628F0183
+P 3950 2550
+F 0 "M3" H 3950 2400 50  0000 R CNN
+F 1 "eSim_MOS_N" H 4050 2500 50  0000 R CNN
+F 2 "" H 4250 2250 29  0000 C CNN
+F 3 "" H 4050 2350 60  0000 C CNN
+	1    3950 2550
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_MOS_P M7
+U 1 1 628F0184
+P 4550 2050
+F 0 "M7" H 4500 2100 50  0000 R CNN
+F 1 "eSim_MOS_P" H 4600 2200 50  0000 R CNN
+F 2 "" H 4800 2150 29  0000 C CNN
+F 3 "" H 4600 2050 60  0000 C CNN
+	1    4550 2050
+	-1   0    0    1   
+$EndComp
+$Comp
+L eSim_MOS_N M4
+U 1 1 628F0185
+P 3950 3150
+F 0 "M4" H 3950 3000 50  0000 R CNN
+F 1 "eSim_MOS_N" H 4050 3100 50  0000 R CNN
+F 2 "" H 4250 2850 29  0000 C CNN
+F 3 "" H 4050 2950 60  0000 C CNN
+	1    3950 3150
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_MOS_P M9
+U 1 1 628F0186
+P 6100 2050
+F 0 "M9" H 6050 2100 50  0000 R CNN
+F 1 "eSim_MOS_P" H 6150 2200 50  0000 R CNN
+F 2 "" H 6350 2150 29  0000 C CNN
+F 3 "" H 6150 2050 60  0000 C CNN
+	1    6100 2050
+	1    0    0    1   
+$EndComp
+$Comp
+L eSim_MOS_N M11
+U 1 1 628F0187
+P 6300 2550
+F 0 "M11" H 6300 2400 50  0000 R CNN
+F 1 "eSim_MOS_N" H 6400 2500 50  0000 R CNN
+F 2 "" H 6600 2250 29  0000 C CNN
+F 3 "" H 6400 2350 60  0000 C CNN
+	1    6300 2550
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_MOS_P M15
+U 1 1 628F0188
+P 6900 2050
+F 0 "M15" H 6850 2100 50  0000 R CNN
+F 1 "eSim_MOS_P" H 6950 2200 50  0000 R CNN
+F 2 "" H 7150 2150 29  0000 C CNN
+F 3 "" H 6950 2050 60  0000 C CNN
+	1    6900 2050
+	-1   0    0    1   
+$EndComp
+$Comp
+L eSim_MOS_N M12
+U 1 1 628F0189
+P 6300 3150
+F 0 "M12" H 6300 3000 50  0000 R CNN
+F 1 "eSim_MOS_N" H 6400 3100 50  0000 R CNN
+F 2 "" H 6600 2850 29  0000 C CNN
+F 3 "" H 6400 2950 60  0000 C CNN
+	1    6300 3150
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	3900 3950 3900 3850
+Wire Wire Line
+	3900 3850 4400 3850
+Wire Wire Line
+	4400 3850 4400 3950
+Wire Wire Line
+	3900 4350 3900 4400
+Wire Wire Line
+	3900 4400 4400 4400
+Wire Wire Line
+	4400 4400 4400 4350
+Wire Wire Line
+	4000 4000 4000 3850
+Connection ~ 4000 3850
+Wire Wire Line
+	4300 4000 4300 3850
+Connection ~ 4300 3850
+Wire Wire Line
+	4150 4400 4150 4650
+Connection ~ 4150 4400
+Wire Wire Line
+	4150 5050 4150 5250
+Wire Wire Line
+	4250 5000 4250 5150
+Wire Wire Line
+	4250 5150 4150 5150
+Connection ~ 4150 5150
+Wire Wire Line
+	4150 5650 4150 5700
+Wire Wire Line
+	4150 5700 4250 5700
+Wire Wire Line
+	4250 5700 4250 5600
+Wire Wire Line
+	4150 4550 4700 4550
+Connection ~ 4150 4550
+Wire Wire Line
+	3600 4150 3500 4150
+Wire Wire Line
+	3500 4150 3500 4850
+Wire Wire Line
+	3500 4850 3850 4850
+Wire Wire Line
+	3850 5450 3800 5450
+Wire Wire Line
+	3800 5450 3800 4450
+Wire Wire Line
+	3800 4450 4700 4450
+Wire Wire Line
+	4700 4450 4700 4150
+Wire Wire Line
+	3500 4450 3150 4450
+Connection ~ 3500 4450
+Wire Wire Line
+	3800 5050 3150 5050
+Connection ~ 3800 5050
+Wire Wire Line
+	6250 3950 6250 3850
+Wire Wire Line
+	6250 3850 6750 3850
+Wire Wire Line
+	6750 3850 6750 3950
+Wire Wire Line
+	6250 4350 6250 4400
+Wire Wire Line
+	6250 4400 6750 4400
+Wire Wire Line
+	6750 4400 6750 4350
+Wire Wire Line
+	6350 4000 6350 3850
+Connection ~ 6350 3850
+Wire Wire Line
+	6650 4000 6650 3850
+Connection ~ 6650 3850
+Wire Wire Line
+	6500 4400 6500 4650
+Connection ~ 6500 4400
+Wire Wire Line
+	6500 5050 6500 5250
+Wire Wire Line
+	6600 5000 6600 5150
+Wire Wire Line
+	6600 5150 6500 5150
+Connection ~ 6500 5150
+Wire Wire Line
+	6500 5650 6500 5700
+Wire Wire Line
+	6500 5700 6600 5700
+Wire Wire Line
+	6600 5700 6600 5600
+Wire Wire Line
+	6500 4550 7050 4550
+Connection ~ 6500 4550
+Wire Wire Line
+	5950 4150 5850 4150
+Wire Wire Line
+	5850 4150 5850 4850
+Wire Wire Line
+	5850 4850 6200 4850
+Wire Wire Line
+	6200 5450 6150 5450
+Wire Wire Line
+	6150 5450 6150 4450
+Wire Wire Line
+	6150 4450 7050 4450
+Wire Wire Line
+	7050 4450 7050 4150
+Wire Wire Line
+	5850 4450 5500 4450
+Connection ~ 5850 4450
+Wire Wire Line
+	6150 5050 5500 5050
+Connection ~ 6150 5050
+Wire Wire Line
+	3900 1850 3900 1750
+Wire Wire Line
+	3900 1750 4400 1750
+Wire Wire Line
+	4400 1750 4400 1850
+Wire Wire Line
+	3900 2250 3900 2300
+Wire Wire Line
+	3900 2300 4400 2300
+Wire Wire Line
+	4400 2300 4400 2250
+Wire Wire Line
+	4000 1900 4000 1750
+Connection ~ 4000 1750
+Wire Wire Line
+	4300 1900 4300 1750
+Connection ~ 4300 1750
+Wire Wire Line
+	4150 2300 4150 2550
+Connection ~ 4150 2300
+Wire Wire Line
+	4150 2950 4150 3150
+Wire Wire Line
+	4250 2900 4250 3050
+Wire Wire Line
+	4250 3050 4150 3050
+Connection ~ 4150 3050
+Wire Wire Line
+	4150 3550 4150 3600
+Wire Wire Line
+	4150 3600 4250 3600
+Wire Wire Line
+	4250 3600 4250 3500
+Wire Wire Line
+	4150 2450 4700 2450
+Connection ~ 4150 2450
+Wire Wire Line
+	3600 2050 3500 2050
+Wire Wire Line
+	3500 2050 3500 2750
+Wire Wire Line
+	3500 2750 3850 2750
+Wire Wire Line
+	3850 3350 3800 3350
+Wire Wire Line
+	3800 3350 3800 2350
+Wire Wire Line
+	3800 2350 4700 2350
+Wire Wire Line
+	4700 2350 4700 2050
+Wire Wire Line
+	3500 2350 3150 2350
+Connection ~ 3500 2350
+Wire Wire Line
+	3800 2950 3150 2950
+Connection ~ 3800 2950
+Wire Wire Line
+	6250 1850 6250 1750
+Wire Wire Line
+	6250 1750 6750 1750
+Wire Wire Line
+	6750 1750 6750 1850
+Wire Wire Line
+	6250 2250 6250 2300
+Wire Wire Line
+	6250 2300 6750 2300
+Wire Wire Line
+	6750 2300 6750 2250
+Wire Wire Line
+	6350 1900 6350 1750
+Connection ~ 6350 1750
+Wire Wire Line
+	6650 1900 6650 1750
+Connection ~ 6650 1750
+Wire Wire Line
+	6500 2300 6500 2550
+Connection ~ 6500 2300
+Wire Wire Line
+	6500 2950 6500 3150
+Wire Wire Line
+	6600 2900 6600 3050
+Wire Wire Line
+	6600 3050 6500 3050
+Connection ~ 6500 3050
+Wire Wire Line
+	6500 3550 6500 3600
+Wire Wire Line
+	6500 3600 6600 3600
+Wire Wire Line
+	6600 3600 6600 3500
+Wire Wire Line
+	6500 2450 7050 2450
+Connection ~ 6500 2450
+Wire Wire Line
+	5950 2050 5850 2050
+Wire Wire Line
+	5850 2050 5850 2750
+Wire Wire Line
+	5850 2750 6200 2750
+Wire Wire Line
+	6200 3350 6150 3350
+Wire Wire Line
+	6150 3350 6150 2350
+Wire Wire Line
+	6150 2350 7050 2350
+Wire Wire Line
+	7050 2350 7050 2050
+Wire Wire Line
+	5850 2350 5500 2350
+Connection ~ 5850 2350
+Wire Wire Line
+	6150 2950 5500 2950
+Connection ~ 6150 2950
+Wire Wire Line
+	4200 3600 4200 3650
+Wire Wire Line
+	4200 3650 6550 3650
+Wire Wire Line
+	6550 3650 6550 3600
+Connection ~ 6550 3600
+Connection ~ 4200 3600
+Wire Wire Line
+	4200 3850 4200 3800
+Wire Wire Line
+	4200 3800 6550 3800
+Wire Wire Line
+	6550 3800 6550 3850
+Connection ~ 6550 3850
+Connection ~ 4200 3850
+Wire Wire Line
+	4200 5700 4200 5750
+Wire Wire Line
+	4200 5750 6550 5750
+Wire Wire Line
+	6550 5750 6550 5700
+Connection ~ 6550 5700
+Connection ~ 4200 5700
+Wire Wire Line
+	4200 1750 4200 1700
+Wire Wire Line
+	4200 1700 6500 1700
+Wire Wire Line
+	6500 1700 6500 1750
+Connection ~ 6500 1750
+Connection ~ 4200 1750
+Wire Wire Line
+	5100 1700 5100 3800
+Connection ~ 5100 3800
+Connection ~ 5100 1700
+Wire Wire Line
+	5200 3650 5200 5750
+Connection ~ 5200 5750
+Connection ~ 5200 3650
+Wire Wire Line
+	5550 1700 5550 1500
+Wire Wire Line
+	5550 1500 4950 1500
+Connection ~ 5550 1700
+Wire Wire Line
+	5500 5750 5500 6050
+Wire Wire Line
+	5500 6050 4950 6050
+Connection ~ 5500 5750
+$Comp
+L PORT U1
+U 1 1 628F08C6
+P 2900 2350
+F 0 "U1" H 2950 2450 30  0000 C CNN
+F 1 "PORT" H 2900 2350 30  0000 C CNN
+F 2 "" H 2900 2350 60  0000 C CNN
+F 3 "" H 2900 2350 60  0000 C CNN
+	1    2900 2350
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 628F094D
+P 2900 2950
+F 0 "U1" H 2950 3050 30  0000 C CNN
+F 1 "PORT" H 2900 2950 30  0000 C CNN
+F 2 "" H 2900 2950 60  0000 C CNN
+F 3 "" H 2900 2950 60  0000 C CNN
+	2    2900 2950
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 3 1 628F09C0
+P 4950 2450
+F 0 "U1" H 5000 2550 30  0000 C CNN
+F 1 "PORT" H 4950 2450 30  0000 C CNN
+F 2 "" H 4950 2450 60  0000 C CNN
+F 3 "" H 4950 2450 60  0000 C CNN
+	3    4950 2450
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 4 1 628F0A6B
+P 7300 2450
+F 0 "U1" H 7350 2550 30  0000 C CNN
+F 1 "PORT" H 7300 2450 30  0000 C CNN
+F 2 "" H 7300 2450 60  0000 C CNN
+F 3 "" H 7300 2450 60  0000 C CNN
+	4    7300 2450
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 5 1 628F0C06
+P 5250 2350
+F 0 "U1" H 5300 2450 30  0000 C CNN
+F 1 "PORT" H 5250 2350 30  0000 C CNN
+F 2 "" H 5250 2350 60  0000 C CNN
+F 3 "" H 5250 2350 60  0000 C CNN
+	5    5250 2350
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 6 1 628F0C9B
+P 5250 2950
+F 0 "U1" H 5300 3050 30  0000 C CNN
+F 1 "PORT" H 5250 2950 30  0000 C CNN
+F 2 "" H 5250 2950 60  0000 C CNN
+F 3 "" H 5250 2950 60  0000 C CNN
+	6    5250 2950
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 7 1 628F0D16
+P 4700 6050
+F 0 "U1" H 4750 6150 30  0000 C CNN
+F 1 "PORT" H 4700 6050 30  0000 C CNN
+F 2 "" H 4700 6050 60  0000 C CNN
+F 3 "" H 4700 6050 60  0000 C CNN
+	7    4700 6050
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 8 1 628F0DF3
+P 5250 4450
+F 0 "U1" H 5300 4550 30  0000 C CNN
+F 1 "PORT" H 5250 4450 30  0000 C CNN
+F 2 "" H 5250 4450 60  0000 C CNN
+F 3 "" H 5250 4450 60  0000 C CNN
+	8    5250 4450
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 9 1 628F0E8C
+P 5250 5050
+F 0 "U1" H 5300 5150 30  0000 C CNN
+F 1 "PORT" H 5250 5050 30  0000 C CNN
+F 2 "" H 5250 5050 60  0000 C CNN
+F 3 "" H 5250 5050 60  0000 C CNN
+	9    5250 5050
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 10 1 628F0F4D
+P 7300 4550
+F 0 "U1" H 7350 4650 30  0000 C CNN
+F 1 "PORT" H 7300 4550 30  0000 C CNN
+F 2 "" H 7300 4550 60  0000 C CNN
+F 3 "" H 7300 4550 60  0000 C CNN
+	10   7300 4550
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 11 1 628F0FE8
+P 4950 4550
+F 0 "U1" H 5000 4650 30  0000 C CNN
+F 1 "PORT" H 4950 4550 30  0000 C CNN
+F 2 "" H 4950 4550 60  0000 C CNN
+F 3 "" H 4950 4550 60  0000 C CNN
+	11   4950 4550
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 12 1 628F10E8
+P 2900 4450
+F 0 "U1" H 2950 4550 30  0000 C CNN
+F 1 "PORT" H 2900 4450 30  0000 C CNN
+F 2 "" H 2900 4450 60  0000 C CNN
+F 3 "" H 2900 4450 60  0000 C CNN
+	12   2900 4450
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 13 1 628F114F
+P 2900 5050
+F 0 "U1" H 2950 5150 30  0000 C CNN
+F 1 "PORT" H 2900 5050 30  0000 C CNN
+F 2 "" H 2900 5050 60  0000 C CNN
+F 3 "" H 2900 5050 60  0000 C CNN
+	13   2900 5050
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 14 1 628F11AC
+P 4700 1500
+F 0 "U1" H 4750 1600 30  0000 C CNN
+F 1 "PORT" H 4700 1500 30  0000 C CNN
+F 2 "" H 4700 1500 60  0000 C CNN
+F 3 "" H 4700 1500 60  0000 C CNN
+	14   4700 1500
+	1    0    0    -1  
+$EndComp
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/CD_4011/CD_4011.sub b/library/SubcircuitLibrary/CD_4011/CD_4011.sub
new file mode 100644
index 00000000..b2753141
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4011/CD_4011.sub
@@ -0,0 +1,24 @@
+* Subcircuit CD_4011
+.subckt CD_4011 net-_m1-pad2_ net-_m4-pad2_ net-_m1-pad1_ net-_m11-pad1_ net-_m11-pad2_ net-_m12-pad2_ net-_m12-pad3_ net-_m10-pad2_ net-_m14-pad2_ net-_m10-pad1_ net-_m2-pad1_ net-_m2-pad2_ net-_m6-pad2_ net-_m1-pad3_ 
+* c:\fossee\esim\library\subcircuitlibrary\cd_4011\cd_4011.cir
+.include PMOS-180nm.lib
+.include NMOS-180nm.lib
+m2 net-_m2-pad1_ net-_m2-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m5 net-_m2-pad1_ net-_m2-pad2_ net-_m5-pad3_ net-_m5-pad3_ CMOSN W=100u L=100u M=1
+m8 net-_m2-pad1_ net-_m6-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m6 net-_m5-pad3_ net-_m6-pad2_ net-_m12-pad3_ net-_m12-pad3_ CMOSN W=100u L=100u M=1
+m10 net-_m10-pad1_ net-_m10-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m13 net-_m10-pad1_ net-_m10-pad2_ net-_m13-pad3_ net-_m13-pad3_ CMOSN W=100u L=100u M=1
+m16 net-_m10-pad1_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m14 net-_m13-pad3_ net-_m14-pad2_ net-_m12-pad3_ net-_m12-pad3_ CMOSN W=100u L=100u M=1
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m3 net-_m1-pad1_ net-_m1-pad2_ net-_m3-pad3_ net-_m3-pad3_ CMOSN W=100u L=100u M=1
+m7 net-_m1-pad1_ net-_m4-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m4 net-_m3-pad3_ net-_m4-pad2_ net-_m12-pad3_ net-_m12-pad3_ CMOSN W=100u L=100u M=1
+m9 net-_m11-pad1_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m11 net-_m11-pad1_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSN W=100u L=100u M=1
+m15 net-_m11-pad1_ net-_m12-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1
+m12 net-_m11-pad3_ net-_m12-pad2_ net-_m12-pad3_ net-_m12-pad3_ CMOSN W=100u L=100u M=1
+* Control Statements
+
+.ends CD_4011
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD_4011/CD_4011_Previous_Values.xml b/library/SubcircuitLibrary/CD_4011/CD_4011_Previous_Values.xml
new file mode 100644
index 00000000..e953367c
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4011/CD_4011_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model /><devicemodel><m2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m2><m5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m5><m8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m8><m6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m6><m10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m10><m13><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m13><m16><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m16><m14><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m14><m1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m1><m3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m3><m7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m7><m4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m4><m9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m9><m11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m11><m15><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m15><m12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m12></devicemodel><subcircuit /></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD_4011/NMOS-180nm.lib b/library/SubcircuitLibrary/CD_4011/NMOS-180nm.lib
new file mode 100644
index 00000000..51e9b119
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4011/NMOS-180nm.lib
@@ -0,0 +1,13 @@
+.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 
++            K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 
++            DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18
++            UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4
++            A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0
++            XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0
++            CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3    
++            PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1
++            PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1
++            WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12
++            CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 
++            MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 
++            PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3)
diff --git a/library/SubcircuitLibrary/CD_4011/PMOS-180nm.lib b/library/SubcircuitLibrary/CD_4011/PMOS-180nm.lib
new file mode 100644
index 00000000..032b5b95
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4011/PMOS-180nm.lib
@@ -0,0 +1,11 @@
+.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015
++            K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363
++            DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478
++            AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677
++            PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 
++            VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148
++            DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10
++            PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9
++            UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5
++            CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8            +            MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3    
++            WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3)
diff --git a/library/SubcircuitLibrary/CD_4011/README.md b/library/SubcircuitLibrary/CD_4011/README.md
new file mode 100644
index 00000000..7e8f7317
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4011/README.md
@@ -0,0 +1,32 @@
+
+# CD4011 IC
+
+It is 2-input NAND Gate IC. CD4011 IC is designed with 180nm CMOS technology in eSim consisting four NAND Gates. When both the inputs are HIGH then only output is LOW, otherwise HIGH. It is also called inverted AND Gate, a type of Universal Gate.
+
+
+## Usage/Examples
+
+Employed in portable Audio Docks
+
+Used in AV Receivers
+
+Used in MP3 Players or Recorders
+
+Applied in Home Theater
+
+Incorporated in Blu-Ray Players
+
+## Documentation
+
+To know the details of CD4011 IC please go through with the documentation : [CD4011_datasheet](https://www.ti.com/lit/gpn/cd4011b)
+
+## Comments/Notes
+
+Please note this is a complete digital IC. It works fine at the time of simulation.
+
+## Contributer
+
+Name: Ankush Mondal
+Email: mondalankush369@gmail.com
+Year: 2022
+Position: FOSSEE Summer Fellow 2022
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD_4011/analysis b/library/SubcircuitLibrary/CD_4011/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/CD_4011/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file