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authorSumanto Kar2024-11-21 21:32:03 +0530
committerSumanto Kar2024-11-21 21:32:03 +0530
commit14439741b8a6c981aff7a405189d81137ccc7ed5 (patch)
tree454b93cf490f2ed0ab8981a3500d301a849db0e3 /library
parentaf9d45808f946536aeed78f96ab45dbdf01893ef (diff)
downloadeSim-14439741b8a6c981aff7a405189d81137ccc7ed5.tar.gz
eSim-14439741b8a6c981aff7a405189d81137ccc7ed5.tar.bz2
eSim-14439741b8a6c981aff7a405189d81137ccc7ed5.zip
CD4050 is a CMOS hex buffer
Diffstat (limited to 'library')
-rw-r--r--library/SubcircuitLibrary/CD4050/CD4050-cache.lib132
-rw-r--r--library/SubcircuitLibrary/CD4050/CD4050.cir29
-rw-r--r--library/SubcircuitLibrary/CD4050/CD4050.cir.out32
-rw-r--r--library/SubcircuitLibrary/CD4050/CD4050.pro73
-rw-r--r--library/SubcircuitLibrary/CD4050/CD4050.sch647
-rw-r--r--library/SubcircuitLibrary/CD4050/CD4050.sub26
-rw-r--r--library/SubcircuitLibrary/CD4050/CD4050_Previous_Values.xml1
-rw-r--r--library/SubcircuitLibrary/CD4050/NMOS-0.5um.lib6
-rw-r--r--library/SubcircuitLibrary/CD4050/PMOS-0.5um.lib6
-rw-r--r--library/SubcircuitLibrary/CD4050/analysis1
10 files changed, 953 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD4050/CD4050-cache.lib b/library/SubcircuitLibrary/CD4050/CD4050-cache.lib
new file mode 100644
index 00000000..d8775da4
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4050/CD4050-cache.lib
@@ -0,0 +1,132 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS capacitor
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20 -80 -30 80 -30 N
+P 2 0 1 20 -80 30 80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_N
+#
+DEF eSim_MOS_N M 0 0 Y N 1 F N
+F0 "M" 0 -150 50 H V R CNN
+F1 "eSim_MOS_N" 100 -50 50 H V R CNN
+F2 "" 300 -300 29 H V C CNN
+F3 "" 100 -200 60 H V C CNN
+ALIAS mosfet_n
+DRAW
+C 150 -200 111 0 1 10 N
+P 2 0 1 10 130 -290 130 -250 N
+P 2 0 1 0 130 -270 200 -270 N
+P 2 0 1 10 130 -220 130 -180 N
+P 2 0 1 0 130 -200 200 -200 N
+P 2 0 1 10 130 -150 130 -110 N
+P 2 0 1 0 130 -130 200 -130 N
+P 2 0 1 0 200 -300 200 -270 N
+P 2 0 1 0 200 -130 200 -100 N
+P 3 0 1 10 110 -275 110 -125 110 -125 N
+P 3 0 1 0 200 -200 300 -200 300 -250 N
+P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F
+X D 1 200 0 100 D 50 50 1 1 P
+X G 2 -100 -200 210 R 50 50 1 1 P
+X S 3 200 -400 100 U 50 50 1 1 P
+X B 4 300 -350 98 U 47 47 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_MOS_P
+#
+DEF eSim_MOS_P M 0 0 Y N 1 F N
+F0 "M" -50 50 50 H V R CNN
+F1 "eSim_MOS_P" 50 150 50 H V R CNN
+F2 "" 250 100 29 H V C CNN
+F3 "" 50 0 60 H V C CNN
+ALIAS mosfet_p
+DRAW
+C 100 0 111 0 1 10 N
+P 2 0 1 0 80 -70 150 -70 N
+P 2 0 1 10 80 -50 80 -90 N
+P 2 0 1 0 80 0 150 0 N
+P 2 0 1 10 80 20 80 -20 N
+P 2 0 1 0 80 70 150 70 N
+P 2 0 1 10 80 90 80 50 N
+P 2 0 1 0 150 -70 150 -100 N
+P 2 0 1 0 150 100 150 70 N
+P 3 0 1 10 60 75 60 -75 60 -75 N
+P 3 0 1 0 150 0 250 0 250 -50 N
+P 4 0 1 0 140 0 100 -15 100 15 140 0 F
+X D 1 150 200 100 D 50 50 1 1 P
+X G 2 -150 0 210 R 50 50 1 1 P
+X S 3 150 -200 100 U 50 50 1 1 P
+X B 4 250 -150 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/CD4050/CD4050.cir b/library/SubcircuitLibrary/CD4050/CD4050.cir
new file mode 100644
index 00000000..ff1009b3
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4050/CD4050.cir
@@ -0,0 +1,29 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD4050\CD4050.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 06/06/24 14:47:03
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+M2 Net-_M2-Pad1_ Net-_M1-Pad2_ Net-_C1-Pad1_ Net-_M2-Pad1_ mosfet_p
+M1 Net-_C1-Pad1_ Net-_M1-Pad2_ GND GND mosfet_n
+C1 Net-_C1-Pad1_ GND 1u
+M5 Net-_M2-Pad1_ Net-_M3-Pad2_ Net-_C2-Pad1_ Net-_M2-Pad1_ mosfet_p
+M3 Net-_C2-Pad1_ Net-_M3-Pad2_ GND GND mosfet_n
+C2 Net-_C2-Pad1_ GND 1u
+M6 Net-_M2-Pad1_ Net-_M4-Pad2_ Net-_C3-Pad1_ Net-_M2-Pad1_ mosfet_p
+M4 Net-_C3-Pad1_ Net-_M4-Pad2_ GND GND mosfet_n
+C3 Net-_C3-Pad1_ GND 1u
+M9 Net-_M2-Pad1_ Net-_M12-Pad2_ Net-_C6-Pad1_ Net-_M2-Pad1_ mosfet_p
+M12 Net-_C6-Pad1_ Net-_M12-Pad2_ GND GND mosfet_n
+C6 Net-_C6-Pad1_ GND 1u
+M7 Net-_M2-Pad1_ Net-_M10-Pad2_ Net-_C4-Pad1_ Net-_M2-Pad1_ mosfet_p
+M10 Net-_C4-Pad1_ Net-_M10-Pad2_ GND GND mosfet_n
+C4 Net-_C4-Pad1_ GND 1u
+M8 Net-_M2-Pad1_ Net-_M11-Pad2_ Net-_C5-Pad1_ Net-_M2-Pad1_ mosfet_p
+M11 Net-_C5-Pad1_ Net-_M11-Pad2_ GND GND mosfet_n
+C5 Net-_C5-Pad1_ GND 1u
+U1 Net-_M1-Pad2_ Net-_C1-Pad1_ Net-_M3-Pad2_ Net-_C2-Pad1_ Net-_M4-Pad2_ Net-_C3-Pad1_ GND Net-_M2-Pad1_ Net-_M10-Pad2_ Net-_C4-Pad1_ Net-_M11-Pad2_ Net-_C5-Pad1_ Net-_M12-Pad2_ Net-_C6-Pad1_ PORT
+
+.end
diff --git a/library/SubcircuitLibrary/CD4050/CD4050.cir.out b/library/SubcircuitLibrary/CD4050/CD4050.cir.out
new file mode 100644
index 00000000..9fe40b96
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4050/CD4050.cir.out
@@ -0,0 +1,32 @@
+* c:\fossee\esim\library\subcircuitlibrary\cd4050\cd4050.cir
+
+.include NMOS-0.5um.lib
+.include PMOS-0.5um.lib
+m2 net-_m2-pad1_ net-_m1-pad2_ net-_c1-pad1_ net-_m2-pad1_ mos_p W=100u L=100u M=1
+m1 net-_c1-pad1_ net-_m1-pad2_ gnd gnd mos_n W=100u L=100u M=1
+c1 net-_c1-pad1_ gnd 1u
+m5 net-_m2-pad1_ net-_m3-pad2_ net-_c2-pad1_ net-_m2-pad1_ mos_p W=100u L=100u M=1
+m3 net-_c2-pad1_ net-_m3-pad2_ gnd gnd mos_n W=100u L=100u M=1
+c2 net-_c2-pad1_ gnd 1u
+m6 net-_m2-pad1_ net-_m4-pad2_ net-_c3-pad1_ net-_m2-pad1_ mos_p W=100u L=100u M=1
+m4 net-_c3-pad1_ net-_m4-pad2_ gnd gnd mos_n W=100u L=100u M=1
+c3 net-_c3-pad1_ gnd 1u
+m9 net-_m2-pad1_ net-_m12-pad2_ net-_c6-pad1_ net-_m2-pad1_ mos_p W=100u L=100u M=1
+m12 net-_c6-pad1_ net-_m12-pad2_ gnd gnd mos_n W=100u L=100u M=1
+c6 net-_c6-pad1_ gnd 1u
+m7 net-_m2-pad1_ net-_m10-pad2_ net-_c4-pad1_ net-_m2-pad1_ mos_p W=100u L=100u M=1
+m10 net-_c4-pad1_ net-_m10-pad2_ gnd gnd mos_n W=100u L=100u M=1
+c4 net-_c4-pad1_ gnd 1u
+m8 net-_m2-pad1_ net-_m11-pad2_ net-_c5-pad1_ net-_m2-pad1_ mos_p W=100u L=100u M=1
+m11 net-_c5-pad1_ net-_m11-pad2_ gnd gnd mos_n W=100u L=100u M=1
+c5 net-_c5-pad1_ gnd 1u
+* u1 net-_m1-pad2_ net-_c1-pad1_ net-_m3-pad2_ net-_c2-pad1_ net-_m4-pad2_ net-_c3-pad1_ gnd net-_m2-pad1_ net-_m10-pad2_ net-_c4-pad1_ net-_m11-pad2_ net-_c5-pad1_ net-_m12-pad2_ net-_c6-pad1_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/CD4050/CD4050.pro b/library/SubcircuitLibrary/CD4050/CD4050.pro
new file mode 100644
index 00000000..e27a398b
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4050/CD4050.pro
@@ -0,0 +1,73 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
+LibName39=eSim_SKY130
+LibName40=eSim_SKY130_Subckts
diff --git a/library/SubcircuitLibrary/CD4050/CD4050.sch b/library/SubcircuitLibrary/CD4050/CD4050.sch
new file mode 100644
index 00000000..dd289095
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4050/CD4050.sch
@@ -0,0 +1,647 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:eSim_SKY130
+LIBS:eSim_SKY130_Subckts
+LIBS:CD4050-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L mosfet_p M2
+U 1 1 66617828
+P 2500 2600
+F 0 "M2" H 2450 2650 50 0000 R CNN
+F 1 "mosfet_p" H 2550 2750 50 0000 R CNN
+F 2 "" H 2750 2700 29 0000 C CNN
+F 3 "" H 2550 2600 60 0000 C CNN
+ 1 2500 2600
+ 1 0 0 -1
+$EndComp
+$Comp
+L mosfet_n M1
+U 1 1 66617865
+P 2450 2900
+F 0 "M1" H 2450 2750 50 0000 R CNN
+F 1 "mosfet_n" H 2550 2850 50 0000 R CNN
+F 2 "" H 2750 2600 29 0000 C CNN
+F 3 "" H 2550 2700 60 0000 C CNN
+ 1 2450 2900
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 2650 2900 2650 2800
+$Comp
+L capacitor C1
+U 1 1 6661789E
+P 2900 3150
+F 0 "C1" H 2925 3250 50 0000 L CNN
+F 1 "1u" H 2925 3050 50 0000 L CNN
+F 2 "" H 2938 3000 30 0000 C CNN
+F 3 "" H 2900 3150 60 0000 C CNN
+ 1 2900 3150
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 2900 3000 2900 2850
+Wire Wire Line
+ 2650 2850 3300 2850
+Connection ~ 2650 2850
+Wire Wire Line
+ 2750 3250 2750 3400
+Wire Wire Line
+ 2650 3400 4350 3400
+Wire Wire Line
+ 2900 3400 2900 3300
+Wire Wire Line
+ 2650 3400 2650 3300
+Connection ~ 2750 3400
+Wire Wire Line
+ 2350 3100 2350 2600
+Wire Wire Line
+ 2750 2750 2800 2750
+Wire Wire Line
+ 2800 2750 2800 2400
+Wire Wire Line
+ 2650 2400 4350 2400
+Wire Wire Line
+ 2350 2850 2300 2850
+Wire Wire Line
+ 2300 2850 2300 3400
+Wire Wire Line
+ 2300 3400 2050 3400
+Connection ~ 2350 2850
+Wire Wire Line
+ 2050 3500 3300 3500
+Wire Wire Line
+ 3300 3500 3300 2850
+Connection ~ 2900 2850
+$Comp
+L mosfet_p M5
+U 1 1 666179DF
+P 2550 4000
+F 0 "M5" H 2500 4050 50 0000 R CNN
+F 1 "mosfet_p" H 2600 4150 50 0000 R CNN
+F 2 "" H 2800 4100 29 0000 C CNN
+F 3 "" H 2600 4000 60 0000 C CNN
+ 1 2550 4000
+ 1 0 0 -1
+$EndComp
+$Comp
+L mosfet_n M3
+U 1 1 666179E5
+P 2500 4300
+F 0 "M3" H 2500 4150 50 0000 R CNN
+F 1 "mosfet_n" H 2600 4250 50 0000 R CNN
+F 2 "" H 2800 4000 29 0000 C CNN
+F 3 "" H 2600 4100 60 0000 C CNN
+ 1 2500 4300
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 2700 4300 2700 4200
+$Comp
+L capacitor C2
+U 1 1 666179EC
+P 2950 4550
+F 0 "C2" H 2975 4650 50 0000 L CNN
+F 1 "1u" H 2975 4450 50 0000 L CNN
+F 2 "" H 2988 4400 30 0000 C CNN
+F 3 "" H 2950 4550 60 0000 C CNN
+ 1 2950 4550
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 2950 4400 2950 4250
+Wire Wire Line
+ 2700 4250 3350 4250
+Connection ~ 2700 4250
+Wire Wire Line
+ 2800 4650 2800 4800
+Wire Wire Line
+ 2700 4800 4300 4800
+Wire Wire Line
+ 2950 4800 2950 4700
+Wire Wire Line
+ 2700 4800 2700 4700
+Connection ~ 2800 4800
+Wire Wire Line
+ 2400 4500 2400 4000
+Wire Wire Line
+ 2800 4150 2850 4150
+Wire Wire Line
+ 2850 4150 2850 3800
+Wire Wire Line
+ 2700 3800 4300 3800
+Wire Wire Line
+ 2400 4250 2350 4250
+Wire Wire Line
+ 2350 4250 2350 4800
+Wire Wire Line
+ 2350 4800 2100 4800
+Connection ~ 2400 4250
+Wire Wire Line
+ 2100 4900 3350 4900
+Wire Wire Line
+ 3350 4900 3350 4250
+Connection ~ 2950 4250
+$Comp
+L mosfet_p M6
+U 1 1 66617BA0
+P 2550 5400
+F 0 "M6" H 2500 5450 50 0000 R CNN
+F 1 "mosfet_p" H 2600 5550 50 0000 R CNN
+F 2 "" H 2800 5500 29 0000 C CNN
+F 3 "" H 2600 5400 60 0000 C CNN
+ 1 2550 5400
+ 1 0 0 -1
+$EndComp
+$Comp
+L mosfet_n M4
+U 1 1 66617BA6
+P 2500 5700
+F 0 "M4" H 2500 5550 50 0000 R CNN
+F 1 "mosfet_n" H 2600 5650 50 0000 R CNN
+F 2 "" H 2800 5400 29 0000 C CNN
+F 3 "" H 2600 5500 60 0000 C CNN
+ 1 2500 5700
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 2700 5700 2700 5600
+$Comp
+L capacitor C3
+U 1 1 66617BAD
+P 2950 5950
+F 0 "C3" H 2975 6050 50 0000 L CNN
+F 1 "1u" H 2975 5850 50 0000 L CNN
+F 2 "" H 2988 5800 30 0000 C CNN
+F 3 "" H 2950 5950 60 0000 C CNN
+ 1 2950 5950
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 2950 5800 2950 5650
+Wire Wire Line
+ 2700 5650 3350 5650
+Connection ~ 2700 5650
+Wire Wire Line
+ 2800 6050 2800 6200
+Wire Wire Line
+ 2700 6200 4300 6200
+Wire Wire Line
+ 2950 6200 2950 6100
+Wire Wire Line
+ 2700 6200 2700 6100
+Connection ~ 2800 6200
+Wire Wire Line
+ 2400 5900 2400 5400
+Wire Wire Line
+ 2800 5550 2850 5550
+Wire Wire Line
+ 2850 5550 2850 5200
+Wire Wire Line
+ 2700 5200 4300 5200
+Wire Wire Line
+ 2400 5650 2350 5650
+Wire Wire Line
+ 2350 5650 2350 6200
+Wire Wire Line
+ 2350 6200 2100 6200
+Connection ~ 2400 5650
+Wire Wire Line
+ 2100 6300 3350 6300
+Wire Wire Line
+ 3350 6300 3350 5650
+Connection ~ 2950 5650
+$Comp
+L mosfet_p M9
+U 1 1 66618007
+P 4500 2600
+F 0 "M9" H 4450 2650 50 0000 R CNN
+F 1 "mosfet_p" H 4550 2750 50 0000 R CNN
+F 2 "" H 4750 2700 29 0000 C CNN
+F 3 "" H 4550 2600 60 0000 C CNN
+ 1 4500 2600
+ -1 0 0 -1
+$EndComp
+$Comp
+L mosfet_n M12
+U 1 1 6661800D
+P 4550 2900
+F 0 "M12" H 4550 2750 50 0000 R CNN
+F 1 "mosfet_n" H 4650 2850 50 0000 R CNN
+F 2 "" H 4850 2600 29 0000 C CNN
+F 3 "" H 4650 2700 60 0000 C CNN
+ 1 4550 2900
+ -1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4350 2900 4350 2800
+$Comp
+L capacitor C6
+U 1 1 66618014
+P 4100 3150
+F 0 "C6" H 4125 3250 50 0000 L CNN
+F 1 "1u" H 4125 3050 50 0000 L CNN
+F 2 "" H 4138 3000 30 0000 C CNN
+F 3 "" H 4100 3150 60 0000 C CNN
+ 1 4100 3150
+ -1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4100 3000 4100 2850
+Wire Wire Line
+ 4350 2850 3700 2850
+Connection ~ 4350 2850
+Wire Wire Line
+ 4250 3250 4250 3400
+Wire Wire Line
+ 4100 3400 4100 3300
+Wire Wire Line
+ 4350 3400 4350 3300
+Connection ~ 4250 3400
+Wire Wire Line
+ 4650 3100 4650 2600
+Wire Wire Line
+ 4250 2750 4200 2750
+Wire Wire Line
+ 4200 2750 4200 2400
+Wire Wire Line
+ 4650 2850 4700 2850
+Wire Wire Line
+ 4700 2850 4700 3400
+Wire Wire Line
+ 4700 3400 4950 3400
+Connection ~ 4650 2850
+Wire Wire Line
+ 4950 3500 3700 3500
+Wire Wire Line
+ 3700 3500 3700 2850
+Connection ~ 4100 2850
+$Comp
+L mosfet_p M7
+U 1 1 6661802D
+P 4450 4000
+F 0 "M7" H 4400 4050 50 0000 R CNN
+F 1 "mosfet_p" H 4500 4150 50 0000 R CNN
+F 2 "" H 4700 4100 29 0000 C CNN
+F 3 "" H 4500 4000 60 0000 C CNN
+ 1 4450 4000
+ -1 0 0 -1
+$EndComp
+$Comp
+L mosfet_n M10
+U 1 1 66618033
+P 4500 4300
+F 0 "M10" H 4500 4150 50 0000 R CNN
+F 1 "mosfet_n" H 4600 4250 50 0000 R CNN
+F 2 "" H 4800 4000 29 0000 C CNN
+F 3 "" H 4600 4100 60 0000 C CNN
+ 1 4500 4300
+ -1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4300 4300 4300 4200
+$Comp
+L capacitor C4
+U 1 1 6661803A
+P 4050 4550
+F 0 "C4" H 4075 4650 50 0000 L CNN
+F 1 "1u" H 4075 4450 50 0000 L CNN
+F 2 "" H 4088 4400 30 0000 C CNN
+F 3 "" H 4050 4550 60 0000 C CNN
+ 1 4050 4550
+ -1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4050 4400 4050 4250
+Wire Wire Line
+ 4300 4250 3650 4250
+Connection ~ 4300 4250
+Wire Wire Line
+ 4200 4650 4200 4800
+Wire Wire Line
+ 4050 4800 4050 4700
+Wire Wire Line
+ 4300 4800 4300 4700
+Connection ~ 4200 4800
+Wire Wire Line
+ 4600 4500 4600 4000
+Wire Wire Line
+ 4200 4150 4150 4150
+Wire Wire Line
+ 4150 4150 4150 3800
+Wire Wire Line
+ 4600 4250 4650 4250
+Wire Wire Line
+ 4650 4250 4650 4800
+Wire Wire Line
+ 4650 4800 4900 4800
+Connection ~ 4600 4250
+Wire Wire Line
+ 4900 4900 3650 4900
+Wire Wire Line
+ 3650 4900 3650 4250
+Connection ~ 4050 4250
+$Comp
+L mosfet_p M8
+U 1 1 66618053
+P 4450 5400
+F 0 "M8" H 4400 5450 50 0000 R CNN
+F 1 "mosfet_p" H 4500 5550 50 0000 R CNN
+F 2 "" H 4700 5500 29 0000 C CNN
+F 3 "" H 4500 5400 60 0000 C CNN
+ 1 4450 5400
+ -1 0 0 -1
+$EndComp
+$Comp
+L mosfet_n M11
+U 1 1 66618059
+P 4500 5700
+F 0 "M11" H 4500 5550 50 0000 R CNN
+F 1 "mosfet_n" H 4600 5650 50 0000 R CNN
+F 2 "" H 4800 5400 29 0000 C CNN
+F 3 "" H 4600 5500 60 0000 C CNN
+ 1 4500 5700
+ -1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4300 5700 4300 5600
+$Comp
+L capacitor C5
+U 1 1 66618060
+P 4050 5950
+F 0 "C5" H 4075 6050 50 0000 L CNN
+F 1 "1u" H 4075 5850 50 0000 L CNN
+F 2 "" H 4088 5800 30 0000 C CNN
+F 3 "" H 4050 5950 60 0000 C CNN
+ 1 4050 5950
+ -1 0 0 -1
+$EndComp
+Wire Wire Line
+ 4050 5800 4050 5650
+Wire Wire Line
+ 4300 5650 3650 5650
+Connection ~ 4300 5650
+Wire Wire Line
+ 4200 6050 4200 6200
+Wire Wire Line
+ 4050 6200 4050 6100
+Wire Wire Line
+ 4300 6200 4300 6100
+Connection ~ 4200 6200
+Wire Wire Line
+ 4600 5900 4600 5400
+Wire Wire Line
+ 4200 5550 4150 5550
+Wire Wire Line
+ 4150 5550 4150 5200
+Wire Wire Line
+ 4600 5650 4650 5650
+Wire Wire Line
+ 4650 5650 4650 6200
+Wire Wire Line
+ 4650 6200 4900 6200
+Connection ~ 4600 5650
+Wire Wire Line
+ 4900 6300 3650 6300
+Wire Wire Line
+ 3650 6300 3650 5650
+Connection ~ 4050 5650
+Connection ~ 4100 3400
+Connection ~ 2900 3400
+Connection ~ 4050 4800
+Connection ~ 2950 4800
+Connection ~ 2950 6200
+Connection ~ 4050 6200
+Wire Wire Line
+ 3400 3400 3400 6200
+Connection ~ 3400 4800
+Connection ~ 3400 6200
+Connection ~ 3400 3400
+Connection ~ 4150 5200
+Connection ~ 2850 5200
+Wire Wire Line
+ 3600 2400 3600 5200
+Connection ~ 4150 3800
+Connection ~ 3600 5200
+Connection ~ 2850 3800
+Connection ~ 3600 3800
+Connection ~ 4200 2400
+Connection ~ 3600 2400
+Connection ~ 2800 2400
+$Comp
+L PORT U1
+U 8 1 66618EC8
+P 3600 2150
+F 0 "U1" H 3650 2250 30 0000 C CNN
+F 1 "PORT" H 3600 2150 30 0000 C CNN
+F 2 "" H 3600 2150 60 0000 C CNN
+F 3 "" H 3600 2150 60 0000 C CNN
+ 8 3600 2150
+ 0 1 1 0
+$EndComp
+$Comp
+L PORT U1
+U 7 1 66618F0F
+P 3400 3150
+F 0 "U1" H 3450 3250 30 0000 C CNN
+F 1 "PORT" H 3400 3150 30 0000 C CNN
+F 2 "" H 3400 3150 60 0000 C CNN
+F 3 "" H 3400 3150 60 0000 C CNN
+ 7 3400 3150
+ 0 1 1 0
+$EndComp
+$Comp
+L PORT U1
+U 1 1 66618F54
+P 1800 3400
+F 0 "U1" H 1850 3500 30 0000 C CNN
+F 1 "PORT" H 1800 3400 30 0000 C CNN
+F 2 "" H 1800 3400 60 0000 C CNN
+F 3 "" H 1800 3400 60 0000 C CNN
+ 1 1800 3400
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 2 1 66618F9B
+P 1800 3500
+F 0 "U1" H 1850 3600 30 0000 C CNN
+F 1 "PORT" H 1800 3500 30 0000 C CNN
+F 2 "" H 1800 3500 60 0000 C CNN
+F 3 "" H 1800 3500 60 0000 C CNN
+ 2 1800 3500
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 13 1 66618FE0
+P 5200 3400
+F 0 "U1" H 5250 3500 30 0000 C CNN
+F 1 "PORT" H 5200 3400 30 0000 C CNN
+F 2 "" H 5200 3400 60 0000 C CNN
+F 3 "" H 5200 3400 60 0000 C CNN
+ 13 5200 3400
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 14 1 66619039
+P 5200 3500
+F 0 "U1" H 5250 3600 30 0000 C CNN
+F 1 "PORT" H 5200 3500 30 0000 C CNN
+F 2 "" H 5200 3500 60 0000 C CNN
+F 3 "" H 5200 3500 60 0000 C CNN
+ 14 5200 3500
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 3 1 66619832
+P 1850 4800
+F 0 "U1" H 1900 4900 30 0000 C CNN
+F 1 "PORT" H 1850 4800 30 0000 C CNN
+F 2 "" H 1850 4800 60 0000 C CNN
+F 3 "" H 1850 4800 60 0000 C CNN
+ 3 1850 4800
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 4 1 66619879
+P 1850 4900
+F 0 "U1" H 1900 5000 30 0000 C CNN
+F 1 "PORT" H 1850 4900 30 0000 C CNN
+F 2 "" H 1850 4900 60 0000 C CNN
+F 3 "" H 1850 4900 60 0000 C CNN
+ 4 1850 4900
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 9 1 666198C2
+P 5150 4800
+F 0 "U1" H 5200 4900 30 0000 C CNN
+F 1 "PORT" H 5150 4800 30 0000 C CNN
+F 2 "" H 5150 4800 60 0000 C CNN
+F 3 "" H 5150 4800 60 0000 C CNN
+ 9 5150 4800
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 10 1 66619915
+P 5150 4900
+F 0 "U1" H 5200 5000 30 0000 C CNN
+F 1 "PORT" H 5150 4900 30 0000 C CNN
+F 2 "" H 5150 4900 60 0000 C CNN
+F 3 "" H 5150 4900 60 0000 C CNN
+ 10 5150 4900
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 5 1 66619966
+P 1850 6200
+F 0 "U1" H 1900 6300 30 0000 C CNN
+F 1 "PORT" H 1850 6200 30 0000 C CNN
+F 2 "" H 1850 6200 60 0000 C CNN
+F 3 "" H 1850 6200 60 0000 C CNN
+ 5 1850 6200
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 6 1 666199B7
+P 1850 6300
+F 0 "U1" H 1900 6400 30 0000 C CNN
+F 1 "PORT" H 1850 6300 30 0000 C CNN
+F 2 "" H 1850 6300 60 0000 C CNN
+F 3 "" H 1850 6300 60 0000 C CNN
+ 6 1850 6300
+ 1 0 0 -1
+$EndComp
+$Comp
+L PORT U1
+U 11 1 66619A08
+P 5150 6200
+F 0 "U1" H 5200 6300 30 0000 C CNN
+F 1 "PORT" H 5150 6200 30 0000 C CNN
+F 2 "" H 5150 6200 60 0000 C CNN
+F 3 "" H 5150 6200 60 0000 C CNN
+ 11 5150 6200
+ -1 0 0 1
+$EndComp
+$Comp
+L PORT U1
+U 12 1 66619A61
+P 5150 6300
+F 0 "U1" H 5200 6400 30 0000 C CNN
+F 1 "PORT" H 5150 6300 30 0000 C CNN
+F 2 "" H 5150 6300 60 0000 C CNN
+F 3 "" H 5150 6300 60 0000 C CNN
+ 12 5150 6300
+ -1 0 0 1
+$EndComp
+$Comp
+L GND #PWR01
+U 1 1 66617FD5
+P 3850 3400
+F 0 "#PWR01" H 3850 3150 50 0001 C CNN
+F 1 "GND" H 3850 3250 50 0000 C CNN
+F 2 "" H 3850 3400 50 0001 C CNN
+F 3 "" H 3850 3400 50 0001 C CNN
+ 1 3850 3400
+ 1 0 0 -1
+$EndComp
+Connection ~ 3850 3400
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/CD4050/CD4050.sub b/library/SubcircuitLibrary/CD4050/CD4050.sub
new file mode 100644
index 00000000..efdcf8be
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4050/CD4050.sub
@@ -0,0 +1,26 @@
+* Subcircuit CD4050
+.subckt CD4050 net-_m1-pad2_ net-_c1-pad1_ net-_m3-pad2_ net-_c2-pad1_ net-_m4-pad2_ net-_c3-pad1_ gnd net-_m2-pad1_ net-_m10-pad2_ net-_c4-pad1_ net-_m11-pad2_ net-_c5-pad1_ net-_m12-pad2_ net-_c6-pad1_
+* c:\fossee\esim\library\subcircuitlibrary\cd4050\cd4050.cir
+.include NMOS-0.5um.lib
+.include PMOS-0.5um.lib
+m2 net-_m2-pad1_ net-_m1-pad2_ net-_c1-pad1_ net-_m2-pad1_ mos_p W=100u L=100u M=1
+m1 net-_c1-pad1_ net-_m1-pad2_ gnd gnd mos_n W=100u L=100u M=1
+c1 net-_c1-pad1_ gnd 1u
+m5 net-_m2-pad1_ net-_m3-pad2_ net-_c2-pad1_ net-_m2-pad1_ mos_p W=100u L=100u M=1
+m3 net-_c2-pad1_ net-_m3-pad2_ gnd gnd mos_n W=100u L=100u M=1
+c2 net-_c2-pad1_ gnd 1u
+m6 net-_m2-pad1_ net-_m4-pad2_ net-_c3-pad1_ net-_m2-pad1_ mos_p W=100u L=100u M=1
+m4 net-_c3-pad1_ net-_m4-pad2_ gnd gnd mos_n W=100u L=100u M=1
+c3 net-_c3-pad1_ gnd 1u
+m9 net-_m2-pad1_ net-_m12-pad2_ net-_c6-pad1_ net-_m2-pad1_ mos_p W=100u L=100u M=1
+m12 net-_c6-pad1_ net-_m12-pad2_ gnd gnd mos_n W=100u L=100u M=1
+c6 net-_c6-pad1_ gnd 1u
+m7 net-_m2-pad1_ net-_m10-pad2_ net-_c4-pad1_ net-_m2-pad1_ mos_p W=100u L=100u M=1
+m10 net-_c4-pad1_ net-_m10-pad2_ gnd gnd mos_n W=100u L=100u M=1
+c4 net-_c4-pad1_ gnd 1u
+m8 net-_m2-pad1_ net-_m11-pad2_ net-_c5-pad1_ net-_m2-pad1_ mos_p W=100u L=100u M=1
+m11 net-_c5-pad1_ net-_m11-pad2_ gnd gnd mos_n W=100u L=100u M=1
+c5 net-_c5-pad1_ gnd 1u
+* Control Statements
+
+.ends CD4050 \ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD4050/CD4050_Previous_Values.xml b/library/SubcircuitLibrary/CD4050/CD4050_Previous_Values.xml
new file mode 100644
index 00000000..572745f5
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4050/CD4050_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel><m2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-0.5um.lib</field><field /><field /><field /></m2><m1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-0.5um.lib</field><field /><field /><field /></m1><m5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-0.5um.lib</field><field /><field /><field /></m5><m3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-0.5um.lib</field><field /><field /><field /></m3><m6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-0.5um.lib</field><field /><field /><field /></m6><m4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-0.5um.lib</field><field /><field /><field /></m4><m9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-0.5um.lib</field><field /><field /><field /></m9><m12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-0.5um.lib</field><field /><field /><field /></m12><m7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-0.5um.lib</field><field /><field /><field /></m7><m10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-0.5um.lib</field><field /><field /><field /></m10><m8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-0.5um.lib</field><field /><field /><field /></m8><m11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-0.5um.lib</field><field /><field /><field /></m11></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice> \ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD4050/NMOS-0.5um.lib b/library/SubcircuitLibrary/CD4050/NMOS-0.5um.lib
new file mode 100644
index 00000000..2e6f4635
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4050/NMOS-0.5um.lib
@@ -0,0 +1,6 @@
+.model mos_n NMOS( TPG=1 TOX=9.5n CJ=550u ETA=0.02125 VMAX=1.8E05
++ GAMMA=0.62 CGSO=0.3n LD=50n MJSW=0.35 PB=1.1
++ CGBO=0.45n XJ=0.2U CGDO=0.3n KAPPA=0.1 LEVEL=3
++ VTO=0.6 NFS=7.20E11 THETA=0.23 CJSW=0.3n PHI=0.7
++ RSH=2.0 MJ=0.6 UO=420 KP=156u DELTA=0.88
++ NSUB=1.40E17 ) \ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD4050/PMOS-0.5um.lib b/library/SubcircuitLibrary/CD4050/PMOS-0.5um.lib
new file mode 100644
index 00000000..848e8b05
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4050/PMOS-0.5um.lib
@@ -0,0 +1,6 @@
+.model mos_p PMOS( TPG=-1 TOX=9.5n CJ=950u ETA=0.025 VMAX=0.3u
++ GAMMA=0.52 CGSO=0.35n LD=70n MJSW=0.25 PB=1
++ CGBO=0.45n XJ=0.2U CGDO=0.35n KAPPA=8.0 LEVEL=3
++ VTO=-0.6 NFS=6.50E11 THETA=0.2 CJSW=0.2n PHI=0.7
++ RSH=2.5 MJ=0.5 UO=130 KP=48u DELTA=0.25
++ NSUB=1.0E17 ) \ No newline at end of file
diff --git a/library/SubcircuitLibrary/CD4050/analysis b/library/SubcircuitLibrary/CD4050/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/CD4050/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00 \ No newline at end of file