Merge pull request #194 from rahulp13/master

Verilator support and fixes crash issues

1 files changed, 46 insertions, 0 deletions

diff --git a/library/tlv/pseudo_rand_gen.sv b/library/tlv/pseudo_rand_gen.sv
new file mode 100755
index 00000000..ec008179
--- /dev/null
+++ b/library/tlv/pseudo_rand_gen.sv
@@ -0,0 +1,46 @@
+// Generated by SandPiper(TM) 1.11-2021/01/28-beta from Redwood EDA.
+// Redwood EDA does not claim intellectual property rights to this file and provides no warranty regarding its correctness or quality.
+
+
+`include "sandpiper_gen.vh"
+
+
+
+
+
+//
+// Signals declared top-level.
+//
+
+// For |default$lfsr.
+logic [LFSR_WIDTH-1:0] DEFAULT_lfsr_a1,
+                       DEFAULT_lfsr_a2;
+
+// For |default$reset.
+logic DEFAULT_reset_a0,
+      DEFAULT_reset_a1;
+
+
+
+generate
+
+
+   //
+   // Scope: |default
+   //
+
+      // For $lfsr.
+      always_ff @(posedge clk) DEFAULT_lfsr_a2[LFSR_WIDTH-1:0] <= DEFAULT_lfsr_a1[LFSR_WIDTH-1:0];
+
+      // For $reset.
+      always_ff @(posedge clk) DEFAULT_reset_a1 <= DEFAULT_reset_a0;
+
+
+
+
+endgenerate
+
+
+
+
+generate   // This is awkward, but we need to go into 'generate' context in the line that `includes the declarations file.