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author | AnkushECE | 2022-08-24 23:05:20 +0530 |
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committer | AnkushECE | 2022-08-24 23:05:20 +0530 |
commit | fc59d1f54d2f569106ee2007684f331612b3e21a (patch) | |
tree | 91fe1bf59ee2703d930e3ed5fe93f775d5b46500 /library/SubcircuitLibrary | |
parent | b4bbdccebce86b996ef66ac98e7e321e4df44152 (diff) | |
download | eSim-fc59d1f54d2f569106ee2007684f331612b3e21a.tar.gz eSim-fc59d1f54d2f569106ee2007684f331612b3e21a.tar.bz2 eSim-fc59d1f54d2f569106ee2007684f331612b3e21a.zip |
CD4069 is NOT gate IC.
Diffstat (limited to 'library/SubcircuitLibrary')
-rw-r--r-- | library/SubcircuitLibrary/CD4069/CD4069-cache.lib | 100 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD4069/CD4069.cir | 23 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD4069/CD4069.cir.out | 26 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD4069/CD4069.pro | 71 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD4069/CD4069.sch | 463 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD4069/CD4069.sub | 20 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD4069/CD4069_Previous_Values.xml | 1 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD4069/NMOS-180nm.lib | 13 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD4069/PMOS-180nm.lib | 11 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD4069/README.md | 27 | ||||
-rw-r--r-- | library/SubcircuitLibrary/CD4069/analysis | 1 |
11 files changed, 756 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD4069/CD4069-cache.lib b/library/SubcircuitLibrary/CD4069/CD4069-cache.lib new file mode 100644 index 00000000..6c512720 --- /dev/null +++ b/library/SubcircuitLibrary/CD4069/CD4069-cache.lib @@ -0,0 +1,100 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# eSim_MOS_N +# +DEF eSim_MOS_N M 0 0 Y N 1 F N +F0 "M" 0 -150 50 H V R CNN +F1 "eSim_MOS_N" 100 -50 50 H V R CNN +F2 "" 300 -300 29 H V C CNN +F3 "" 100 -200 60 H V C CNN +ALIAS mosfet_n +DRAW +C 150 -200 111 0 1 10 N +P 2 0 1 10 130 -290 130 -250 N +P 2 0 1 0 130 -270 200 -270 N +P 2 0 1 10 130 -220 130 -180 N +P 2 0 1 0 130 -200 200 -200 N +P 2 0 1 10 130 -150 130 -110 N +P 2 0 1 0 130 -130 200 -130 N +P 2 0 1 0 200 -300 200 -270 N +P 2 0 1 0 200 -130 200 -100 N +P 3 0 1 10 110 -275 110 -125 110 -125 N +P 3 0 1 0 200 -200 300 -200 300 -250 N +P 4 0 1 0 140 -200 180 -215 180 -185 140 -200 F +X D 1 200 0 100 D 50 50 1 1 P +X G 2 -100 -200 210 R 50 50 1 1 P +X S 3 200 -400 100 U 50 50 1 1 P +X B 4 300 -350 98 U 47 47 1 1 P +ENDDRAW +ENDDEF +# +# eSim_MOS_P +# +DEF eSim_MOS_P M 0 0 Y N 1 F N +F0 "M" -50 50 50 H V R CNN +F1 "eSim_MOS_P" 50 150 50 H V R CNN +F2 "" 250 100 29 H V C CNN +F3 "" 50 0 60 H V C CNN +ALIAS mosfet_p +DRAW +C 100 0 111 0 1 10 N +P 2 0 1 0 80 -70 150 -70 N +P 2 0 1 10 80 -50 80 -90 N +P 2 0 1 0 80 0 150 0 N +P 2 0 1 10 80 20 80 -20 N +P 2 0 1 0 80 70 150 70 N +P 2 0 1 10 80 90 80 50 N +P 2 0 1 0 150 -70 150 -100 N +P 2 0 1 0 150 100 150 70 N +P 3 0 1 10 60 75 60 -75 60 -75 N +P 3 0 1 0 150 0 250 0 250 -50 N +P 4 0 1 0 140 0 100 -15 100 15 140 0 F +X D 1 150 200 100 D 50 50 1 1 P +X G 2 -150 0 210 R 50 50 1 1 P +X S 3 150 -200 100 U 50 50 1 1 P +X B 4 250 -150 100 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/CD4069/CD4069.cir b/library/SubcircuitLibrary/CD4069/CD4069.cir new file mode 100644 index 00000000..d7fb6c17 --- /dev/null +++ b/library/SubcircuitLibrary/CD4069/CD4069.cir @@ -0,0 +1,23 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\CD4069\CD4069.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 06/04/22 15:25:23 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +M9 Net-_M10-Pad1_ Net-_M10-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P +M10 Net-_M10-Pad1_ Net-_M10-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M11 Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P +M12 Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M5 Net-_M5-Pad1_ Net-_M5-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P +M6 Net-_M5-Pad1_ Net-_M5-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M7 Net-_M7-Pad1_ Net-_M7-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P +M8 Net-_M7-Pad1_ Net-_M7-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M1 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P +M2 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +M3 Net-_M3-Pad1_ Net-_M3-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad3_ eSim_MOS_P +M4 Net-_M3-Pad1_ Net-_M3-Pad2_ Net-_M10-Pad3_ Net-_M10-Pad3_ eSim_MOS_N +U1 Net-_M1-Pad2_ Net-_M1-Pad1_ Net-_M5-Pad2_ Net-_M5-Pad1_ Net-_M10-Pad2_ Net-_M10-Pad1_ Net-_M10-Pad3_ Net-_M11-Pad1_ Net-_M11-Pad2_ Net-_M7-Pad1_ Net-_M7-Pad2_ Net-_M3-Pad1_ Net-_M3-Pad2_ Net-_M1-Pad3_ PORT + +.end diff --git a/library/SubcircuitLibrary/CD4069/CD4069.cir.out b/library/SubcircuitLibrary/CD4069/CD4069.cir.out new file mode 100644 index 00000000..30d857e9 --- /dev/null +++ b/library/SubcircuitLibrary/CD4069/CD4069.cir.out @@ -0,0 +1,26 @@ +* c:\fossee\esim\library\subcircuitlibrary\cd4069\cd4069.cir + +.include NMOS-180nm.lib +.include PMOS-180nm.lib +m9 net-_m10-pad1_ net-_m10-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m10 net-_m10-pad1_ net-_m10-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m11 net-_m11-pad1_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m12 net-_m11-pad1_ net-_m11-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m5 net-_m5-pad1_ net-_m5-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m6 net-_m5-pad1_ net-_m5-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m7 net-_m7-pad1_ net-_m7-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m8 net-_m7-pad1_ net-_m7-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m2 net-_m1-pad1_ net-_m1-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m3 net-_m3-pad1_ net-_m3-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m4 net-_m3-pad1_ net-_m3-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +* u1 net-_m1-pad2_ net-_m1-pad1_ net-_m5-pad2_ net-_m5-pad1_ net-_m10-pad2_ net-_m10-pad1_ net-_m10-pad3_ net-_m11-pad1_ net-_m11-pad2_ net-_m7-pad1_ net-_m7-pad2_ net-_m3-pad1_ net-_m3-pad2_ net-_m1-pad3_ port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/CD4069/CD4069.pro b/library/SubcircuitLibrary/CD4069/CD4069.pro new file mode 100644 index 00000000..d7f78c3b --- /dev/null +++ b/library/SubcircuitLibrary/CD4069/CD4069.pro @@ -0,0 +1,71 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri diff --git a/library/SubcircuitLibrary/CD4069/CD4069.sch b/library/SubcircuitLibrary/CD4069/CD4069.sch new file mode 100644 index 00000000..3f09dcf2 --- /dev/null +++ b/library/SubcircuitLibrary/CD4069/CD4069.sch @@ -0,0 +1,463 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:CD_4069-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L eSim_MOS_P M9 +U 1 1 629B270D +P 5250 3900 +F 0 "M9" H 5200 3950 50 0000 R CNN +F 1 "eSim_MOS_P" H 5300 4050 50 0000 R CNN +F 2 "" H 5500 4000 29 0000 C CNN +F 3 "" H 5300 3900 60 0000 C CNN + 1 5250 3900 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M10 +U 1 1 629B270E +P 5200 4150 +F 0 "M10" H 5200 4000 50 0000 R CNN +F 1 "eSim_MOS_N" H 5300 4100 50 0000 R CNN +F 2 "" H 5500 3850 29 0000 C CNN +F 3 "" H 5300 3950 60 0000 C CNN + 1 5200 4150 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5400 4100 5400 4150 +Wire Wire Line + 5100 3900 5100 4350 +Wire Wire Line + 5400 3700 7450 3700 +Wire Wire Line + 5500 3700 5500 3750 +Wire Wire Line + 5400 4550 7450 4550 +Wire Wire Line + 5500 4550 5500 4500 +$Comp +L eSim_MOS_P M11 +U 1 1 629B270F +P 7600 3900 +F 0 "M11" H 7550 3950 50 0000 R CNN +F 1 "eSim_MOS_P" H 7650 4050 50 0000 R CNN +F 2 "" H 7850 4000 29 0000 C CNN +F 3 "" H 7650 3900 60 0000 C CNN + 1 7600 3900 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M12 +U 1 1 629B2710 +P 7650 4150 +F 0 "M12" H 7650 4000 50 0000 R CNN +F 1 "eSim_MOS_N" H 7750 4100 50 0000 R CNN +F 2 "" H 7950 3850 29 0000 C CNN +F 3 "" H 7750 3950 60 0000 C CNN + 1 7650 4150 + -1 0 0 -1 +$EndComp +Wire Wire Line + 7450 4100 7450 4150 +Wire Wire Line + 7750 3900 7750 4350 +Wire Wire Line + 7350 3700 7350 3750 +Wire Wire Line + 7350 4550 7350 4500 +$Comp +L eSim_MOS_P M5 +U 1 1 629B2711 +P 5250 2800 +F 0 "M5" H 5200 2850 50 0000 R CNN +F 1 "eSim_MOS_P" H 5300 2950 50 0000 R CNN +F 2 "" H 5500 2900 29 0000 C CNN +F 3 "" H 5300 2800 60 0000 C CNN + 1 5250 2800 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M6 +U 1 1 629B2712 +P 5200 3050 +F 0 "M6" H 5200 2900 50 0000 R CNN +F 1 "eSim_MOS_N" H 5300 3000 50 0000 R CNN +F 2 "" H 5500 2750 29 0000 C CNN +F 3 "" H 5300 2850 60 0000 C CNN + 1 5200 3050 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5400 3000 5400 3050 +Wire Wire Line + 5100 2800 5100 3250 +Wire Wire Line + 5400 2600 7450 2600 +Wire Wire Line + 5500 2600 5500 2650 +Wire Wire Line + 5400 3450 7450 3450 +Wire Wire Line + 5500 3450 5500 3400 +$Comp +L eSim_MOS_P M7 +U 1 1 629B2713 +P 7600 2800 +F 0 "M7" H 7550 2850 50 0000 R CNN +F 1 "eSim_MOS_P" H 7650 2950 50 0000 R CNN +F 2 "" H 7850 2900 29 0000 C CNN +F 3 "" H 7650 2800 60 0000 C CNN + 1 7600 2800 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M8 +U 1 1 629B2714 +P 7650 3050 +F 0 "M8" H 7650 2900 50 0000 R CNN +F 1 "eSim_MOS_N" H 7750 3000 50 0000 R CNN +F 2 "" H 7950 2750 29 0000 C CNN +F 3 "" H 7750 2850 60 0000 C CNN + 1 7650 3050 + -1 0 0 -1 +$EndComp +Wire Wire Line + 7450 3000 7450 3050 +Wire Wire Line + 7750 2800 7750 3250 +Wire Wire Line + 7350 2600 7350 2650 +Wire Wire Line + 7350 3450 7350 3400 +$Comp +L eSim_MOS_P M1 +U 1 1 629B2715 +P 5250 1650 +F 0 "M1" H 5200 1700 50 0000 R CNN +F 1 "eSim_MOS_P" H 5300 1800 50 0000 R CNN +F 2 "" H 5500 1750 29 0000 C CNN +F 3 "" H 5300 1650 60 0000 C CNN + 1 5250 1650 + 1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M2 +U 1 1 629B2716 +P 5200 1900 +F 0 "M2" H 5200 1750 50 0000 R CNN +F 1 "eSim_MOS_N" H 5300 1850 50 0000 R CNN +F 2 "" H 5500 1600 29 0000 C CNN +F 3 "" H 5300 1700 60 0000 C CNN + 1 5200 1900 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5400 1850 5400 1900 +Wire Wire Line + 5100 1650 5100 2100 +Wire Wire Line + 5400 1450 7450 1450 +Wire Wire Line + 5500 1450 5500 1500 +Wire Wire Line + 5400 2300 7450 2300 +Wire Wire Line + 5500 2300 5500 2250 +$Comp +L eSim_MOS_P M3 +U 1 1 629B2717 +P 7600 1650 +F 0 "M3" H 7550 1700 50 0000 R CNN +F 1 "eSim_MOS_P" H 7650 1800 50 0000 R CNN +F 2 "" H 7850 1750 29 0000 C CNN +F 3 "" H 7650 1650 60 0000 C CNN + 1 7600 1650 + -1 0 0 1 +$EndComp +$Comp +L eSim_MOS_N M4 +U 1 1 629B2718 +P 7650 1900 +F 0 "M4" H 7650 1750 50 0000 R CNN +F 1 "eSim_MOS_N" H 7750 1850 50 0000 R CNN +F 2 "" H 7950 1600 29 0000 C CNN +F 3 "" H 7750 1700 60 0000 C CNN + 1 7650 1900 + -1 0 0 -1 +$EndComp +Wire Wire Line + 7450 1850 7450 1900 +Wire Wire Line + 7750 1650 7750 2100 +Wire Wire Line + 7350 1450 7350 1500 +Wire Wire Line + 7350 2300 7350 2250 +Wire Wire Line + 5100 1850 4450 1850 +Connection ~ 5100 1850 +Wire Wire Line + 5100 4150 4450 4150 +Connection ~ 5100 4150 +Connection ~ 7350 4550 +Connection ~ 5500 4550 +Connection ~ 7350 1450 +Connection ~ 5500 1450 +Connection ~ 7350 2300 +Connection ~ 5500 2300 +Connection ~ 7350 2600 +Connection ~ 5500 2600 +Connection ~ 7350 3700 +Connection ~ 5500 3700 +Wire Wire Line + 5850 1450 5850 3700 +Connection ~ 5850 2600 +Connection ~ 5850 1450 +Connection ~ 5850 3700 +Connection ~ 7350 3450 +Connection ~ 5500 3450 +Wire Wire Line + 7750 1850 8350 1850 +Connection ~ 7750 1850 +Wire Wire Line + 7750 3050 8350 3050 +Connection ~ 7750 3050 +Wire Wire Line + 7750 4100 8350 4100 +Connection ~ 7750 4100 +Wire Wire Line + 6450 2300 6450 4550 +Connection ~ 6450 3450 +Connection ~ 6450 2300 +Connection ~ 6450 4550 +Wire Wire Line + 5400 1850 6150 1850 +Wire Wire Line + 7450 1850 6950 1850 +Wire Wire Line + 5400 3000 6050 3000 +Wire Wire Line + 7450 3000 7050 3000 +Wire Wire Line + 7450 4150 7050 4150 +Wire Wire Line + 6500 1450 6500 1250 +Wire Wire Line + 6500 1250 6750 1250 +Connection ~ 6500 1450 +Wire Wire Line + 6600 4550 6600 4850 +Wire Wire Line + 6600 4850 6100 4850 +Connection ~ 6600 4550 +$Comp +L PORT U1 +U 1 1 629B29FC +P 4200 1850 +F 0 "U1" H 4250 1950 30 0000 C CNN +F 1 "PORT" H 4200 1850 30 0000 C CNN +F 2 "" H 4200 1850 60 0000 C CNN +F 3 "" H 4200 1850 60 0000 C CNN + 1 4200 1850 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 629B2A53 +P 6400 1850 +F 0 "U1" H 6450 1950 30 0000 C CNN +F 1 "PORT" H 6400 1850 30 0000 C CNN +F 2 "" H 6400 1850 60 0000 C CNN +F 3 "" H 6400 1850 60 0000 C CNN + 2 6400 1850 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 3 1 629B2ABC +P 4200 3050 +F 0 "U1" H 4250 3150 30 0000 C CNN +F 1 "PORT" H 4200 3050 30 0000 C CNN +F 2 "" H 4200 3050 60 0000 C CNN +F 3 "" H 4200 3050 60 0000 C CNN + 3 4200 3050 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 4 1 629B2BB9 +P 6300 3000 +F 0 "U1" H 6350 3100 30 0000 C CNN +F 1 "PORT" H 6300 3000 30 0000 C CNN +F 2 "" H 6300 3000 60 0000 C CNN +F 3 "" H 6300 3000 60 0000 C CNN + 4 6300 3000 + -1 0 0 1 +$EndComp +Wire Wire Line + 4450 3050 5100 3050 +Connection ~ 5100 3050 +$Comp +L PORT U1 +U 5 1 629B2E02 +P 4200 4150 +F 0 "U1" H 4250 4250 30 0000 C CNN +F 1 "PORT" H 4200 4150 30 0000 C CNN +F 2 "" H 4200 4150 60 0000 C CNN +F 3 "" H 4200 4150 60 0000 C CNN + 5 4200 4150 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 6 1 629B2EE5 +P 6200 4150 +F 0 "U1" H 6250 4250 30 0000 C CNN +F 1 "PORT" H 6200 4150 30 0000 C CNN +F 2 "" H 6200 4150 60 0000 C CNN +F 3 "" H 6200 4150 60 0000 C CNN + 6 6200 4150 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 7 1 629B2F78 +P 5850 4850 +F 0 "U1" H 5900 4950 30 0000 C CNN +F 1 "PORT" H 5850 4850 30 0000 C CNN +F 2 "" H 5850 4850 60 0000 C CNN +F 3 "" H 5850 4850 60 0000 C CNN + 7 5850 4850 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 8 1 629B3086 +P 6800 4150 +F 0 "U1" H 6850 4250 30 0000 C CNN +F 1 "PORT" H 6800 4150 30 0000 C CNN +F 2 "" H 6800 4150 60 0000 C CNN +F 3 "" H 6800 4150 60 0000 C CNN + 8 6800 4150 + 1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 9 1 629B319B +P 8600 4100 +F 0 "U1" H 8650 4200 30 0000 C CNN +F 1 "PORT" H 8600 4100 30 0000 C CNN +F 2 "" H 8600 4100 60 0000 C CNN +F 3 "" H 8600 4100 60 0000 C CNN + 9 8600 4100 + -1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 10 1 629B3200 +P 6800 3000 +F 0 "U1" H 6850 3100 30 0000 C CNN +F 1 "PORT" H 6800 3000 30 0000 C CNN +F 2 "" H 6800 3000 60 0000 C CNN +F 3 "" H 6800 3000 60 0000 C CNN + 10 6800 3000 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 11 1 629B328D +P 8600 3050 +F 0 "U1" H 8650 3150 30 0000 C CNN +F 1 "PORT" H 8600 3050 30 0000 C CNN +F 2 "" H 8600 3050 60 0000 C CNN +F 3 "" H 8600 3050 60 0000 C CNN + 11 8600 3050 + -1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 12 1 629B32F8 +P 6700 1850 +F 0 "U1" H 6750 1950 30 0000 C CNN +F 1 "PORT" H 6700 1850 30 0000 C CNN +F 2 "" H 6700 1850 60 0000 C CNN +F 3 "" H 6700 1850 60 0000 C CNN + 12 6700 1850 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 13 1 629B3367 +P 8600 1850 +F 0 "U1" H 8650 1950 30 0000 C CNN +F 1 "PORT" H 8600 1850 30 0000 C CNN +F 2 "" H 8600 1850 60 0000 C CNN +F 3 "" H 8600 1850 60 0000 C CNN + 13 8600 1850 + -1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 14 1 629B33CE +P 7000 1250 +F 0 "U1" H 7050 1350 30 0000 C CNN +F 1 "PORT" H 7000 1250 30 0000 C CNN +F 2 "" H 7000 1250 60 0000 C CNN +F 3 "" H 7000 1250 60 0000 C CNN + 14 7000 1250 + -1 0 0 -1 +$EndComp +Wire Wire Line + 5400 4150 5950 4150 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/CD4069/CD4069.sub b/library/SubcircuitLibrary/CD4069/CD4069.sub new file mode 100644 index 00000000..da6e5ff7 --- /dev/null +++ b/library/SubcircuitLibrary/CD4069/CD4069.sub @@ -0,0 +1,20 @@ +* Subcircuit CD4069 +.subckt CD4069 net-_m1-pad2_ net-_m1-pad1_ net-_m5-pad2_ net-_m5-pad1_ net-_m10-pad2_ net-_m10-pad1_ net-_m10-pad3_ net-_m11-pad1_ net-_m11-pad2_ net-_m7-pad1_ net-_m7-pad2_ net-_m3-pad1_ net-_m3-pad2_ net-_m1-pad3_ +* c:\fossee\esim\library\subcircuitlibrary\cd4069\cd4069.cir +.include NMOS-180nm.lib +.include PMOS-180nm.lib +m9 net-_m10-pad1_ net-_m10-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m10 net-_m10-pad1_ net-_m10-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m11 net-_m11-pad1_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m12 net-_m11-pad1_ net-_m11-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m5 net-_m5-pad1_ net-_m5-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m6 net-_m5-pad1_ net-_m5-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m7 net-_m7-pad1_ net-_m7-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m8 net-_m7-pad1_ net-_m7-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m2 net-_m1-pad1_ net-_m1-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m3 net-_m3-pad1_ net-_m3-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m4 net-_m3-pad1_ net-_m3-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +* Control Statements + +.ends CD4069
\ No newline at end of file diff --git a/library/SubcircuitLibrary/CD4069/CD4069_Previous_Values.xml b/library/SubcircuitLibrary/CD4069/CD4069_Previous_Values.xml new file mode 100644 index 00000000..31124b00 --- /dev/null +++ b/library/SubcircuitLibrary/CD4069/CD4069_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis><source /><model /><devicemodel><m9><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m9><m10><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m10><m11><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m11><m12><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m12><m5><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m5><m6><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m6><m7><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m7><m8><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m8><m1><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m1><m2><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m2><m3><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\PMOS-180nm.lib</field><field /><field /><field /></m3><m4><field>C:\FOSSEE\eSim\library\deviceModelLibrary\MOS\NMOS-180nm.lib</field><field /><field /><field /></m4></devicemodel><subcircuit /></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/CD4069/NMOS-180nm.lib b/library/SubcircuitLibrary/CD4069/NMOS-180nm.lib new file mode 100644 index 00000000..51e9b119 --- /dev/null +++ b/library/SubcircuitLibrary/CD4069/NMOS-180nm.lib @@ -0,0 +1,13 @@ +.model CMOSN NMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=2.3549E17 VTH0=0.3823463 K1=0.5810697 ++ K2=4.774618E-3 K3=0.0431669 K3B=1.1498346 W0=1E-7 NLX=1.910552E-7 DVT0W=0 DVT1W=0 DVT2W=0 ++ DVT0=1.2894824 DVT1=0.3622063 DVT2=0.0713729 U0=280.633249 UA=-1.208537E-9 UB=2.158625E-18 ++ UC=5.342807E-11 VSAT=9.366802E4 A0=1.7593146 AGS=0.3939741 B0=-6.413949E-9 B1=-1E-7 KETA=-5.180424E-4 ++ A1=0 A2=1 RDSW=105.5517558 PRWG=0.5 PRWB=-0.1998871 WR=1 WINT=7.904732E-10 LINT=1.571424E-8 XL=0 ++ XW=-1E-8 DWG=1.297221E-9 DWB=1.479041E-9 VOFF=-0.0955434 NFACTOR=2.4358891 CIT=0 CDSC=2.4E-4 CDSCD=0 ++ CDSCB=0 ETA0=3.104851E-3 ETAB=-2.512384E-5 DSUB=0.0167075 PCLM=0.8073191 PDIBLC1=0.1666161 PDIBLC2=3.112892E-3 ++ PDIBLCB=-0.1 DROUT=0.7875618 PSCBE1=8E10 PSCBE2=9.213635E-10 PVAG=3.85243E-3 DELTA=0.01 RSH=6.7 MOBMOD=1 ++ PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 ++ WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 CGDO=7.08E-10 CGSO=7.08E-10 CGBO=1E-12 ++ CJ=9.68858E-4 PB=0.8 MJ=0.3864502 CJSW=2.512138E-10 PBSW=0.809286 MJSW=0.1060414 CJSWG=3.3E-10 PBSWG=0.809286 ++ MJSWG=0.1060414 CF=0 PVTH0=-1.192722E-3 PRDSW=-5 PK2=6.450505E-5 WKETA=-4.27294E-4 LKETA=-0.0104078 ++ PU0=6.3268729 PUA=2.226552E-11 PUB=0 PVSAT=969.1480157 PETA0=1E-4 PKETA=-1.049509E-3) diff --git a/library/SubcircuitLibrary/CD4069/PMOS-180nm.lib b/library/SubcircuitLibrary/CD4069/PMOS-180nm.lib new file mode 100644 index 00000000..032b5b95 --- /dev/null +++ b/library/SubcircuitLibrary/CD4069/PMOS-180nm.lib @@ -0,0 +1,11 @@ +.model CMOSP PMOS (LEVEL=8 VERSION=3.2 TNOM=27 TOX=4.1E-9 XJ=1E-7 NCH=4.1589E17 VTH0=-0.3938813 K1=0.5479015 ++ K2=0.0360586 K3=0.0993095 K3B=5.7086622 W0=1E-6 NLX=1.313191E-7 DVT0W=0 DVT1W=0 DVT2W=0 DVT0=0.4911363 ++ DVT1=0.2227356 DVT2=0.1 U0=115.6852975 UA=1.505832E-9 UB=1E-21 UC=-1E-10 VSAT=1.329694E5 A0=1.7590478 ++ AGS=0.3641621 B0=3.427126E-7 B1=1.062928E-6 KETA=0.0134667 A1=0.6859506 A2=0.3506788 RDSW=168.5705677 ++ PRWG=0.5 PRWB=-0.4987371 WR=1 WINT=0 LINT=3.028832E-8 XL=0 XW=-1E-8 DWG=-2.349633E-8 DWB=-7.152486E-9 ++ VOFF=-0.0994037 NFACTOR=1.9424315 CIT=0 CDSC=2.4E-4 CDSCD=0 CDSCB=0 ETA0=0.0608072 ETAB=-0.0426148 ++ DSUB=0.7343015 PCLM=3.2579974 PDIBLC1=7.229527E-6 PDIBLC2=0.025389 PDIBLCB=-1E-3 DROUT=0 PSCBE1=1.454878E10 ++ PSCBE2=4.202027E-9 PVAG=15 DELTA=0.01 RSH=7.8 MOBMOD=1 PRT=0 UTE=-1.5 KT1=-0.11 KT1L=0 KT2=0.022 UA1=4.31E-9 ++ UB1=-7.61E-18 UC1=-5.6E-11 AT=3.3E4 WL=0 WLN=1 WW=0 WWN=1 WWL=0 LL=0 LLN=1 LW=0 LWN=1 LWL=0 CAPMOD=2 XPART=0.5 ++ CGDO=6.32E-10 CGSO=6.32E-10 CGBO=1E-12 CJ=1.172138E-3 PB=0.8421173 MJ=0.4109788 CJSW=2.242609E-10 PBSW=0.8 + MJSW=0.3752089 CJSWG=4.22E-10 PBSWG=0.8 MJSWG=0.3752089 CF=0 PVTH0=1.888482E-3 PRDSW=11.5315407 PK2=1.559399E-3 ++ WKETA=0.0319301 LKETA=2.955547E-3 PU0=-1.1105313 PUA=-4.62102E-11 PUB=1E-21 PVSAT=50 PETA0=1E-4 PKETA=-4.346368E-3) diff --git a/library/SubcircuitLibrary/CD4069/README.md b/library/SubcircuitLibrary/CD4069/README.md new file mode 100644 index 00000000..5e356565 --- /dev/null +++ b/library/SubcircuitLibrary/CD4069/README.md @@ -0,0 +1,27 @@ + +# CD4069 IC + +CD4069 is Hex NOT Gate IC. It is designed with 180nm CMOS technology in eSim consisting six NOR Gates. When all the input is LOW, then only output is HIGH, and vice-versa. It is also known as Inverter Gate. +## Usage/Examples + +Logic inversion + +Pulse shaping + +Oscillators + +High-input-impedance amplifiers +## Documentation + +To know the details of CD4069 IC please go through with the documentation : [CD4069_datasheet](https://www.ti.com/lit/gpn/cd4069ub) + +## Comments/Notes + +Please note this is a complete digital IC. It works fine at the time of simulation. + +## Contributer + +Name: Ankush Mondal +Email: mondalankush369@gmail.com +Year: 2022 +Position: FOSSEE Summer Fellow 2022
\ No newline at end of file diff --git a/library/SubcircuitLibrary/CD4069/analysis b/library/SubcircuitLibrary/CD4069/analysis new file mode 100644 index 00000000..ebd5c0a9 --- /dev/null +++ b/library/SubcircuitLibrary/CD4069/analysis @@ -0,0 +1 @@ +.tran 0e-00 0e-00 0e-00
\ No newline at end of file |