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author | Sumanto Kar | 2024-11-21 20:48:20 +0530 |
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committer | Sumanto Kar | 2024-11-21 20:48:20 +0530 |
commit | 4bc15163a1005bdcd0cb023e6161e2db8bcff00c (patch) | |
tree | f9744c5f018f080addd0100cd535257ed97bdf87 /library/SubcircuitLibrary/lm102_sub/lm102_sub.cir.out | |
parent | ac1c0c32e68fb7c4d1d738e9721f76b612eda5c3 (diff) | |
download | eSim-4bc15163a1005bdcd0cb023e6161e2db8bcff00c.tar.gz eSim-4bc15163a1005bdcd0cb023e6161e2db8bcff00c.tar.bz2 eSim-4bc15163a1005bdcd0cb023e6161e2db8bcff00c.zip |
LM102 is a voltage regulator
Diffstat (limited to 'library/SubcircuitLibrary/lm102_sub/lm102_sub.cir.out')
-rw-r--r-- | library/SubcircuitLibrary/lm102_sub/lm102_sub.cir.out | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/lm102_sub/lm102_sub.cir.out b/library/SubcircuitLibrary/lm102_sub/lm102_sub.cir.out new file mode 100644 index 00000000..91abf6b9 --- /dev/null +++ b/library/SubcircuitLibrary/lm102_sub/lm102_sub.cir.out @@ -0,0 +1,61 @@ +* c:\fossee\esim\library\subcircuitlibrary\lm102_sub\lm102_sub.cir + +.include D.lib +.include PNP.lib +.include NPN.lib +q1 net-_q1-pad1_ net-_q1-pad1_ net-_q1-pad3_ Q2N2222 +q5 net-_c1-pad1_ net-_q10-pad2_ net-_q5-pad3_ Q2N2222 +q2 net-_q15-pad2_ net-_q1-pad1_ net-_q10-pad2_ Q2N2907A +r5 net-_q1-pad3_ net-_q5-pad3_ 6k +r12 net-_q1-pad3_ net-_q10-pad3_ 3k +q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222 +q15 net-_q12-pad1_ net-_q15-pad2_ net-_q15-pad3_ Q2N2222 +r15 net-_q1-pad3_ net-_q15-pad3_ 270 +q12 net-_q12-pad1_ net-_q12-pad1_ net-_d1-pad1_ Q2N2222 +q13 net-_q13-pad1_ net-_q13-pad1_ net-_q10-pad1_ Q2N2222 +q9 net-_d1-pad2_ net-_q8-pad3_ net-_q11-pad3_ Q2N2222 +q11 net-_q11-pad1_ net-_q11-pad2_ net-_q11-pad3_ Q2N2222 +q8 net-_d1-pad2_ net-_d1-pad1_ net-_q8-pad3_ Q2N2222 +q14 net-_q11-pad1_ net-_c2-pad2_ net-_q11-pad2_ Q2N2222 +r10 net-_q13-pad1_ net-_q8-pad3_ 200k +r13 net-_q13-pad1_ net-_q11-pad2_ 200k +r14 net-_c2-pad2_ net-_q12-pad1_ 3k +r17 net-_q12-pad1_ net-_d1-pad2_ 246 +r16 net-_d1-pad2_ net-_q16-pad2_ 3k +q16 net-_c2-pad1_ net-_q16-pad2_ net-_q11-pad1_ Q2N2222 +q18 net-_q18-pad1_ net-_c2-pad1_ net-_q16-pad2_ Q2N2222 +q19 net-_q18-pad1_ net-_q16-pad2_ net-_d1-pad2_ Q2N2222 +q17 net-_c2-pad1_ net-_d1-pad2_ net-_q12-pad1_ Q2N2222 +c2 net-_c2-pad1_ net-_c2-pad2_ 20pf +q6 net-_c1-pad1_ net-_q6-pad2_ net-_q6-pad3_ Q2N2907A +q7 net-_c2-pad1_ net-_q6-pad2_ net-_q7-pad3_ Q2N2907A +r3 net-_r3-pad1_ net-_q18-pad1_ 500 +r8 net-_r8-pad1_ net-_q18-pad1_ 500 +r9 net-_q7-pad3_ net-_r8-pad1_ 1k +d1 net-_d1-pad1_ net-_d1-pad2_ 1N4148 +r4 net-_q6-pad3_ net-_r3-pad1_ 1k +r11 net-_q10-pad1_ net-_q11-pad3_ 200 +r1 net-_q10-pad2_ net-_q3-pad3_ 10k +* u2 net-_u2-padin_ net-_q6-pad2_ zener +* u3 net-_c1-pad2_ net-_u2-padin_ zener +c1 net-_c1-pad1_ net-_c1-pad2_ 10pf +r6 net-_q3-pad3_ net-_c1-pad2_ 2k +q4 net-_q18-pad1_ net-_c1-pad1_ net-_q3-pad2_ Q2N2222 +q3 net-_q18-pad1_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222 +r2 net-_q3-pad3_ net-_q3-pad2_ 4k +* u1 net-_r3-pad1_ net-_r8-pad1_ net-_d1-pad1_ net-_q1-pad3_ net-_q15-pad3_ net-_q12-pad1_ net-_q18-pad1_ port +a1 net-_u2-padin_ net-_q6-pad2_ u2 +a2 net-_c1-pad2_ net-_u2-padin_ u3 +* Schematic Name: zener, NgSpice Name: zener +.model u2 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |