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| author | Sumanto Kar | 2025-06-14 17:58:58 +0530 |
|---|---|---|
| committer | GitHub | 2025-06-14 17:58:58 +0530 |
| commit | eaf176100fc3c4eb20dab7f8293fa5d09f3409da (patch) | |
| tree | 19078474dd4fe389cb4a0496df56d2cf56fe2273 /library/SubcircuitLibrary/esim_ic_files/sn54ls48/b_origin.cir | |
| parent | 7975bc597123cab9d82f26262ea23f1e03282422 (diff) | |
| parent | fe3e9dcb6f62796ff392d7ec68febbd0a82e318b (diff) | |
| download | eSim-master.tar.gz eSim-master.tar.bz2 eSim-master.zip | |
Subcircuitfiles Files of ICs (Contributor : Shanthi priya)
Diffstat (limited to 'library/SubcircuitLibrary/esim_ic_files/sn54ls48/b_origin.cir')
| -rw-r--r-- | library/SubcircuitLibrary/esim_ic_files/sn54ls48/b_origin.cir | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54ls48/b_origin.cir b/library/SubcircuitLibrary/esim_ic_files/sn54ls48/b_origin.cir new file mode 100644 index 00000000..ed5a9067 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54ls48/b_origin.cir @@ -0,0 +1,20 @@ +* C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\b_origin\b_origin.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 04/11/25 01:52:12 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U1 /w /x /y /z Net-_U1-Pad5_ PORT +U2 /w Net-_U2-Pad2_ d_inverter +U3 /x Net-_U3-Pad2_ d_inverter +U4 /y Net-_U4-Pad2_ d_inverter +U5 /z Net-_U5-Pad2_ d_inverter +X2 Net-_U7-Pad3_ Net-_U8-Pad3_ Net-_U6-Pad3_ Net-_X1-Pad4_ Net-_U1-Pad5_ 4_OR +X1 Net-_U2-Pad2_ /y /z Net-_X1-Pad4_ 3_and +U6 Net-_U4-Pad2_ Net-_U5-Pad2_ Net-_U6-Pad3_ d_and +U8 Net-_U3-Pad2_ Net-_U4-Pad2_ Net-_U8-Pad3_ d_and +U7 Net-_U3-Pad2_ Net-_U2-Pad2_ Net-_U7-Pad3_ d_and + +.end |