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| author | Sumanto Kar | 2025-06-14 17:58:58 +0530 |
|---|---|---|
| committer | GitHub | 2025-06-14 17:58:58 +0530 |
| commit | eaf176100fc3c4eb20dab7f8293fa5d09f3409da (patch) | |
| tree | 19078474dd4fe389cb4a0496df56d2cf56fe2273 /library/SubcircuitLibrary/esim_ic_files/sn54als573 | |
| parent | 7975bc597123cab9d82f26262ea23f1e03282422 (diff) | |
| parent | fe3e9dcb6f62796ff392d7ec68febbd0a82e318b (diff) | |
| download | eSim-master.tar.gz eSim-master.tar.bz2 eSim-master.zip | |
Subcircuitfiles Files of ICs (Contributor : Shanthi priya)
Diffstat (limited to 'library/SubcircuitLibrary/esim_ic_files/sn54als573')
22 files changed, 2254 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375-cache.lib b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375-cache.lib new file mode 100644 index 00000000..c743d042 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375-cache.lib @@ -0,0 +1,94 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# d_and +# +DEF d_and U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_and" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 +A 150 49 100 6 900 0 1 0 N 250 50 150 150 +P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N +X IN1 1 -450 100 200 R 50 50 1 1 I +X IN2 2 -450 0 200 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# d_inverter +# +DEF d_inverter U 0 40 Y Y 1 F N +F0 "U" 0 -100 60 H V C CNN +F1 "d_inverter" 0 150 60 H V C CNN +F2 "" 50 -50 60 H V C CNN +F3 "" 50 -50 60 H V C CNN +DRAW +P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N +X ~ 1 -300 0 200 R 50 50 1 1 I +X ~ 2 300 0 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_nor +# +DEF d_nor U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_nor" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A -450 50 224 266 -266 0 1 0 N -250 150 -250 -50 +A -25 -124 325 574 323 0 1 0 N 150 150 250 50 +A 74 125 191 -665 -231 0 1 0 N 150 -50 250 50 +P 2 0 1 0 -250 -50 150 -50 N +P 2 0 1 0 -250 150 150 150 N +X IN1 1 -450 100 215 R 50 50 1 1 I +X IN2 2 -450 0 215 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.cir b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.cir new file mode 100644 index 00000000..c3a71da2 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.cir @@ -0,0 +1,16 @@ +* C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\4d_375\4d_375.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 05/10/25 10:11:18 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U2 Net-_U1-Pad2_ Net-_U2-Pad2_ d_inverter +U3 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U3-Pad3_ d_and +U4 Net-_U2-Pad2_ Net-_U1-Pad4_ Net-_U4-Pad3_ d_and +U5 Net-_U3-Pad3_ Net-_U4-Pad3_ Net-_U1-Pad3_ d_nor +U6 Net-_U1-Pad3_ Net-_U1-Pad4_ d_inverter +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ PORT + +.end diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.cir.out b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.cir.out new file mode 100644 index 00000000..8f3125d0 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.cir.out @@ -0,0 +1,32 @@ +* c:\users\shanthipriya\desktop\madeeasy\fossee\esim\library\subcircuitlibrary\4d_375\4d_375.cir + +* u2 net-_u1-pad2_ net-_u2-pad2_ d_inverter +* u3 net-_u1-pad1_ net-_u1-pad2_ net-_u3-pad3_ d_and +* u4 net-_u2-pad2_ net-_u1-pad4_ net-_u4-pad3_ d_and +* u5 net-_u3-pad3_ net-_u4-pad3_ net-_u1-pad3_ d_nor +* u6 net-_u1-pad3_ net-_u1-pad4_ d_inverter +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ port +a1 net-_u1-pad2_ net-_u2-pad2_ u2 +a2 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u3-pad3_ u3 +a3 [net-_u2-pad2_ net-_u1-pad4_ ] net-_u4-pad3_ u4 +a4 [net-_u3-pad3_ net-_u4-pad3_ ] net-_u1-pad3_ u5 +a5 net-_u1-pad3_ net-_u1-pad4_ u6 +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u3 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u4 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u5 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.pro b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.sch b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.sch new file mode 100644 index 00000000..fd00405b --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.sch @@ -0,0 +1,192 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L d_inverter U2 +U 1 1 681ED689 +P 3400 3450 +F 0 "U2" H 3400 3350 60 0000 C CNN +F 1 "d_inverter" H 3400 3600 60 0000 C CNN +F 2 "" H 3450 3400 60 0000 C CNN +F 3 "" H 3450 3400 60 0000 C CNN + 1 3400 3450 + 1 0 0 -1 +$EndComp +$Comp +L d_and U3 +U 1 1 681ED6AE +P 4550 2500 +F 0 "U3" H 4550 2500 60 0000 C CNN +F 1 "d_and" H 4600 2600 60 0000 C CNN +F 2 "" H 4550 2500 60 0000 C CNN +F 3 "" H 4550 2500 60 0000 C CNN + 1 4550 2500 + 1 0 0 -1 +$EndComp +$Comp +L d_and U4 +U 1 1 681ED6F1 +P 4550 3500 +F 0 "U4" H 4550 3500 60 0000 C CNN +F 1 "d_and" H 4600 3600 60 0000 C CNN +F 2 "" H 4550 3500 60 0000 C CNN +F 3 "" H 4550 3500 60 0000 C CNN + 1 4550 3500 + 1 0 0 -1 +$EndComp +$Comp +L d_nor U5 +U 1 1 681ED73E +P 5750 3000 +F 0 "U5" H 5750 3000 60 0000 C CNN +F 1 "d_nor" H 5800 3100 60 0000 C CNN +F 2 "" H 5750 3000 60 0000 C CNN +F 3 "" H 5750 3000 60 0000 C CNN + 1 5750 3000 + 1 0 0 -1 +$EndComp +$Comp +L d_inverter U6 +U 1 1 681ED77D +P 7000 2950 +F 0 "U6" H 7000 2850 60 0000 C CNN +F 1 "d_inverter" H 7000 3100 60 0000 C CNN +F 2 "" H 7050 2900 60 0000 C CNN +F 3 "" H 7050 2900 60 0000 C CNN + 1 7000 2950 + 1 0 0 -1 +$EndComp +Wire Wire Line + 3100 3450 2300 3450 +Wire Wire Line + 4100 2500 2800 2500 +Wire Wire Line + 2800 2500 2800 3450 +Connection ~ 2800 3450 +Wire Wire Line + 4100 2400 2200 2400 +Wire Wire Line + 3700 3450 4100 3450 +Wire Wire Line + 4100 3450 4100 3400 +Wire Wire Line + 7300 2950 7900 2950 +Wire Wire Line + 4100 3500 4100 4150 +Wire Wire Line + 4100 4150 7500 4150 +Wire Wire Line + 7500 4150 7500 2950 +Connection ~ 7500 2950 +Wire Wire Line + 6200 2950 6700 2950 +Wire Wire Line + 5000 2450 5300 2450 +Wire Wire Line + 5300 2450 5300 2900 +Wire Wire Line + 5000 3450 5300 3450 +Wire Wire Line + 5300 3450 5300 3000 +Wire Wire Line + 6450 2950 6450 2350 +Wire Wire Line + 6450 2350 7900 2350 +Connection ~ 6450 2950 +$Comp +L PORT U1 +U 1 1 681ED8C7 +P 1950 2400 +F 0 "U1" H 2000 2500 30 0000 C CNN +F 1 "PORT" H 1950 2400 30 0000 C CNN +F 2 "" H 1950 2400 60 0000 C CNN +F 3 "" H 1950 2400 60 0000 C CNN + 1 1950 2400 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 2 1 681ED912 +P 2050 3450 +F 0 "U1" H 2100 3550 30 0000 C CNN +F 1 "PORT" H 2050 3450 30 0000 C CNN +F 2 "" H 2050 3450 60 0000 C CNN +F 3 "" H 2050 3450 60 0000 C CNN + 2 2050 3450 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 681ED949 +P 8150 2350 +F 0 "U1" H 8200 2450 30 0000 C CNN +F 1 "PORT" H 8150 2350 30 0000 C CNN +F 2 "" H 8150 2350 60 0000 C CNN +F 3 "" H 8150 2350 60 0000 C CNN + 3 8150 2350 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 4 1 681ED9BE +P 8150 2950 +F 0 "U1" H 8200 3050 30 0000 C CNN +F 1 "PORT" H 8150 2950 30 0000 C CNN +F 2 "" H 8150 2950 60 0000 C CNN +F 3 "" H 8150 2950 60 0000 C CNN + 4 8150 2950 + -1 0 0 1 +$EndComp +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.sub b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.sub new file mode 100644 index 00000000..e39abdd0 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375.sub @@ -0,0 +1,26 @@ +* Subcircuit 4d_375 +.subckt 4d_375 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ +* c:\users\shanthipriya\desktop\madeeasy\fossee\esim\library\subcircuitlibrary\4d_375\4d_375.cir +* u2 net-_u1-pad2_ net-_u2-pad2_ d_inverter +* u3 net-_u1-pad1_ net-_u1-pad2_ net-_u3-pad3_ d_and +* u4 net-_u2-pad2_ net-_u1-pad4_ net-_u4-pad3_ d_and +* u5 net-_u3-pad3_ net-_u4-pad3_ net-_u1-pad3_ d_nor +* u6 net-_u1-pad3_ net-_u1-pad4_ d_inverter +a1 net-_u1-pad2_ net-_u2-pad2_ u2 +a2 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u3-pad3_ u3 +a3 [net-_u2-pad2_ net-_u1-pad4_ ] net-_u4-pad3_ u4 +a4 [net-_u3-pad3_ net-_u4-pad3_ ] net-_u1-pad3_ u5 +a5 net-_u1-pad3_ net-_u1-pad4_ u6 +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u3 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u4 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_nor, NgSpice Name: d_nor +.model u5 d_nor(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u6 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Control Statements + +.ends 4d_375
\ No newline at end of file diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375_Previous_Values.xml b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375_Previous_Values.xml new file mode 100644 index 00000000..eb73ebcf --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/4d_375_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis><source /><model><u2 name="type">d_inverter<field1 name="Enter Rise Delay (default=1.0e-9)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Input Load (default=1.0e-12)" /></u2><u3 name="type">d_and<field4 name="Enter Rise Delay (default=1.0e-9)" /><field5 name="Enter Fall Delay (default=1.0e-9)" /><field6 name="Enter Input Load (default=1.0e-12)" /></u3><u4 name="type">d_and<field7 name="Enter Rise Delay (default=1.0e-9)" /><field8 name="Enter Fall Delay (default=1.0e-9)" /><field9 name="Enter Input Load (default=1.0e-12)" /></u4><u5 name="type">d_nor<field10 name="Enter Rise Delay (default=1.0e-9)" /><field11 name="Enter Fall Delay (default=1.0e-9)" /><field12 name="Enter Input Load (default=1.0e-12)" /></u5><u6 name="type">d_inverter<field13 name="Enter Rise Delay (default=1.0e-9)" /><field14 name="Enter Fall Delay (default=1.0e-9)" /><field15 name="Enter Input Load (default=1.0e-12)" /></u6></model><devicemodel /><subcircuit /></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/analysis b/library/SubcircuitLibrary/esim_ic_files/sn54als573/analysis new file mode 100644 index 00000000..df2a21bc --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/analysis @@ -0,0 +1 @@ +.tran 10e-06 100e-03 0e-09
\ No newline at end of file diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373-cache.lib b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373-cache.lib new file mode 100644 index 00000000..3965bcb6 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373-cache.lib @@ -0,0 +1,91 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# PORT +# +DEF PORT U 0 40 Y Y 26 F N +F0 "U" 50 100 30 H V C CNN +F1 "PORT" 0 0 30 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0 +A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50 +S -100 50 100 -50 0 1 0 N +X ~ 1 250 0 100 L 30 30 1 1 B +X ~ 2 250 0 100 L 30 30 2 1 B +X ~ 3 250 0 100 L 30 30 3 1 B +X ~ 4 250 0 100 L 30 30 4 1 B +X ~ 5 250 0 100 L 30 30 5 1 B +X ~ 6 250 0 100 L 30 30 6 1 B +X ~ 7 250 0 100 L 30 30 7 1 B +X ~ 8 250 0 100 L 30 30 8 1 B +X ~ 9 250 0 100 L 30 30 9 1 B +X ~ 10 250 0 100 L 30 30 10 1 B +X ~ 11 250 0 100 L 30 30 11 1 B +X ~ 12 250 0 100 L 30 30 12 1 B +X ~ 13 250 0 100 L 30 30 13 1 B +X ~ 14 250 0 100 L 30 30 14 1 B +X ~ 15 250 0 100 L 30 30 15 1 B +X ~ 16 250 0 100 L 30 30 16 1 B +X ~ 17 250 0 100 L 30 30 17 1 B +X ~ 18 250 0 100 L 30 30 18 1 B +X ~ 19 250 0 100 L 30 30 19 1 B +X ~ 20 250 0 100 L 30 30 20 1 B +X ~ 21 250 0 100 L 30 30 21 1 B +X ~ 22 250 0 100 L 30 30 22 1 B +X ~ 23 250 0 100 L 30 30 23 1 B +X ~ 24 250 0 100 L 30 30 24 1 B +X ~ 25 250 0 100 L 30 30 25 1 B +X ~ 26 250 0 100 L 30 30 26 1 B +ENDDRAW +ENDDEF +# +# d_and +# +DEF d_and U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "d_and" 50 100 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +A 149 50 100 -894 0 0 1 0 N 150 -50 250 50 +A 150 49 100 6 900 0 1 0 N 250 50 150 150 +P 4 0 1 0 150 -50 -250 -50 -250 150 150 150 N +X IN1 1 -450 100 200 R 50 50 1 1 I +X IN2 2 -450 0 200 R 50 50 1 1 I +X OUT 3 450 50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# d_inverter +# +DEF d_inverter U 0 40 Y Y 1 F N +F0 "U" 0 -100 60 H V C CNN +F1 "d_inverter" 0 150 60 H V C CNN +F2 "" 50 -50 60 H V C CNN +F3 "" 50 -50 60 H V C CNN +DRAW +P 4 0 1 0 -100 50 -100 -50 100 0 -100 50 N +X ~ 1 -300 0 200 R 50 50 1 1 I +X ~ 2 300 0 200 L 50 50 1 1 O I +ENDDRAW +ENDDEF +# +# d_l +# +DEF d_l X 0 40 Y Y 1 F N +F0 "X" 0 -400 60 H V C CNN +F1 "d_l" 0 450 60 H V C CNN +F2 "" 0 0 60 H I C CNN +F3 "" 0 0 60 H I C CNN +DRAW +S 300 400 -300 -300 0 1 0 N +X D 1 -500 300 200 R 50 50 1 1 I +X E 2 -500 -150 200 R 50 50 1 1 I +X Qbar 3 500 300 200 L 50 50 1 1 O +X Q 4 500 -150 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.cir b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.cir new file mode 100644 index 00000000..2aa1c47b --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.cir @@ -0,0 +1,28 @@ +* C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\ls373\ls373.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 05/12/25 07:42:26 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +X1 Net-_U1-Pad3_ Net-_U2-Pad2_ ? Net-_U3-Pad2_ d_l +X2 Net-_U1-Pad4_ Net-_U2-Pad2_ ? Net-_U4-Pad2_ d_l +X3 Net-_U1-Pad5_ Net-_U2-Pad2_ ? Net-_U5-Pad2_ d_l +X4 Net-_U1-Pad6_ Net-_U2-Pad2_ ? Net-_U6-Pad2_ d_l +X5 Net-_U1-Pad7_ Net-_U2-Pad2_ ? Net-_U7-Pad2_ d_l +X6 Net-_U1-Pad8_ Net-_U2-Pad2_ ? Net-_U8-Pad2_ d_l +X7 Net-_U1-Pad9_ Net-_U2-Pad2_ ? Net-_U9-Pad2_ d_l +X8 Net-_U1-Pad10_ Net-_U2-Pad2_ ? Net-_U10-Pad2_ d_l +U2 Net-_U1-Pad1_ Net-_U2-Pad2_ d_inverter +U1 Net-_U1-Pad1_ Net-_U1-Pad2_ Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U1-Pad5_ Net-_U1-Pad6_ Net-_U1-Pad7_ Net-_U1-Pad8_ Net-_U1-Pad9_ Net-_U1-Pad10_ Net-_U1-Pad11_ Net-_U1-Pad12_ Net-_U1-Pad13_ Net-_U1-Pad14_ Net-_U1-Pad15_ Net-_U1-Pad16_ Net-_U1-Pad17_ Net-_U1-Pad18_ PORT +U3 Net-_U1-Pad2_ Net-_U3-Pad2_ Net-_U1-Pad11_ d_and +U4 Net-_U1-Pad2_ Net-_U4-Pad2_ Net-_U1-Pad12_ d_and +U5 Net-_U1-Pad2_ Net-_U5-Pad2_ Net-_U1-Pad13_ d_and +U6 Net-_U1-Pad2_ Net-_U6-Pad2_ Net-_U1-Pad14_ d_and +U7 Net-_U1-Pad2_ Net-_U7-Pad2_ Net-_U1-Pad15_ d_and +U8 Net-_U1-Pad2_ Net-_U8-Pad2_ Net-_U1-Pad16_ d_and +U9 Net-_U1-Pad2_ Net-_U9-Pad2_ Net-_U1-Pad17_ d_and +U10 Net-_U1-Pad2_ Net-_U10-Pad2_ Net-_U1-Pad18_ d_and + +.end diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.cir.out b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.cir.out new file mode 100644 index 00000000..2b95c412 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.cir.out @@ -0,0 +1,57 @@ +* c:\users\shanthipriya\desktop\madeeasy\fossee\esim\library\subcircuitlibrary\ls373\ls373.cir + +.include 4d_375.sub +x1 net-_u1-pad3_ net-_u2-pad2_ ? net-_u3-pad2_ 4d_375 +x2 net-_u1-pad4_ net-_u2-pad2_ ? net-_u4-pad2_ 4d_375 +x3 net-_u1-pad5_ net-_u2-pad2_ ? net-_u5-pad2_ 4d_375 +x4 net-_u1-pad6_ net-_u2-pad2_ ? net-_u6-pad2_ 4d_375 +x5 net-_u1-pad7_ net-_u2-pad2_ ? net-_u7-pad2_ 4d_375 +x6 net-_u1-pad8_ net-_u2-pad2_ ? net-_u8-pad2_ 4d_375 +x7 net-_u1-pad9_ net-_u2-pad2_ ? net-_u9-pad2_ 4d_375 +x8 net-_u1-pad10_ net-_u2-pad2_ ? net-_u10-pad2_ 4d_375 +* u2 net-_u1-pad1_ net-_u2-pad2_ d_inverter +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ net-_u1-pad17_ net-_u1-pad18_ port +* u3 net-_u1-pad2_ net-_u3-pad2_ net-_u1-pad11_ d_and +* u4 net-_u1-pad2_ net-_u4-pad2_ net-_u1-pad12_ d_and +* u5 net-_u1-pad2_ net-_u5-pad2_ net-_u1-pad13_ d_and +* u6 net-_u1-pad2_ net-_u6-pad2_ net-_u1-pad14_ d_and +* u7 net-_u1-pad2_ net-_u7-pad2_ net-_u1-pad15_ d_and +* u8 net-_u1-pad2_ net-_u8-pad2_ net-_u1-pad16_ d_and +* u9 net-_u1-pad2_ net-_u9-pad2_ net-_u1-pad17_ d_and +* u10 net-_u1-pad2_ net-_u10-pad2_ net-_u1-pad18_ d_and +a1 net-_u1-pad1_ net-_u2-pad2_ u2 +a2 [net-_u1-pad2_ net-_u3-pad2_ ] net-_u1-pad11_ u3 +a3 [net-_u1-pad2_ net-_u4-pad2_ ] net-_u1-pad12_ u4 +a4 [net-_u1-pad2_ net-_u5-pad2_ ] net-_u1-pad13_ u5 +a5 [net-_u1-pad2_ net-_u6-pad2_ ] net-_u1-pad14_ u6 +a6 [net-_u1-pad2_ net-_u7-pad2_ ] net-_u1-pad15_ u7 +a7 [net-_u1-pad2_ net-_u8-pad2_ ] net-_u1-pad16_ u8 +a8 [net-_u1-pad2_ net-_u9-pad2_ ] net-_u1-pad17_ u9 +a9 [net-_u1-pad2_ net-_u10-pad2_ ] net-_u1-pad18_ u10 +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u3 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u4 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u5 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u6 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u7 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u8 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u9 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u10 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.pro b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.sch b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.sch new file mode 100644 index 00000000..98e8421d --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.sch @@ -0,0 +1,574 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +LIBS:ls373-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L d_l X1 +U 1 1 681F460C +P 5750 1300 +F 0 "X1" H 5750 900 60 0000 C CNN +F 1 "d_l" H 5750 1750 60 0000 C CNN +F 2 "" H 5750 1300 60 0001 C CNN +F 3 "" H 5750 1300 60 0001 C CNN + 1 5750 1300 + 1 0 0 -1 +$EndComp +$Comp +L d_l X2 +U 1 1 681F4668 +P 5750 2050 +F 0 "X2" H 5750 1650 60 0000 C CNN +F 1 "d_l" H 5750 2500 60 0000 C CNN +F 2 "" H 5750 2050 60 0001 C CNN +F 3 "" H 5750 2050 60 0001 C CNN + 1 5750 2050 + 1 0 0 -1 +$EndComp +$Comp +L d_l X3 +U 1 1 681F471D +P 5750 2800 +F 0 "X3" H 5750 2400 60 0000 C CNN +F 1 "d_l" H 5750 3250 60 0000 C CNN +F 2 "" H 5750 2800 60 0001 C CNN +F 3 "" H 5750 2800 60 0001 C CNN + 1 5750 2800 + 1 0 0 -1 +$EndComp +$Comp +L d_l X4 +U 1 1 681F4723 +P 5750 3550 +F 0 "X4" H 5750 3150 60 0000 C CNN +F 1 "d_l" H 5750 4000 60 0000 C CNN +F 2 "" H 5750 3550 60 0001 C CNN +F 3 "" H 5750 3550 60 0001 C CNN + 1 5750 3550 + 1 0 0 -1 +$EndComp +$Comp +L d_l X5 +U 1 1 681F4C25 +P 5750 4300 +F 0 "X5" H 5750 3900 60 0000 C CNN +F 1 "d_l" H 5750 4750 60 0000 C CNN +F 2 "" H 5750 4300 60 0001 C CNN +F 3 "" H 5750 4300 60 0001 C CNN + 1 5750 4300 + 1 0 0 -1 +$EndComp +$Comp +L d_l X6 +U 1 1 681F4C2B +P 5750 5050 +F 0 "X6" H 5750 4650 60 0000 C CNN +F 1 "d_l" H 5750 5500 60 0000 C CNN +F 2 "" H 5750 5050 60 0001 C CNN +F 3 "" H 5750 5050 60 0001 C CNN + 1 5750 5050 + 1 0 0 -1 +$EndComp +$Comp +L d_l X7 +U 1 1 681F4C31 +P 5750 5800 +F 0 "X7" H 5750 5400 60 0000 C CNN +F 1 "d_l" H 5750 6250 60 0000 C CNN +F 2 "" H 5750 5800 60 0001 C CNN +F 3 "" H 5750 5800 60 0001 C CNN + 1 5750 5800 + 1 0 0 -1 +$EndComp +$Comp +L d_l X8 +U 1 1 681F4C37 +P 5750 6550 +F 0 "X8" H 5750 6150 60 0000 C CNN +F 1 "d_l" H 5750 7000 60 0000 C CNN +F 2 "" H 5750 6550 60 0001 C CNN +F 3 "" H 5750 6550 60 0001 C CNN + 1 5750 6550 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5250 6700 4800 6700 +Wire Wire Line + 4800 6700 4800 600 +Wire Wire Line + 5250 1450 4800 1450 +Connection ~ 4800 1450 +Wire Wire Line + 5250 2200 4800 2200 +Connection ~ 4800 2200 +Wire Wire Line + 5250 2950 4800 2950 +Connection ~ 4800 2950 +Wire Wire Line + 5250 3700 4800 3700 +Connection ~ 4800 3700 +Wire Wire Line + 5250 4450 4800 4450 +Connection ~ 4800 4450 +Wire Wire Line + 5250 5200 4800 5200 +Connection ~ 4800 5200 +Wire Wire Line + 5250 5950 4800 5950 +Connection ~ 4800 5950 +Wire Wire Line + 7400 1450 8000 1450 +Wire Wire Line + 7400 2200 8000 2200 +Wire Wire Line + 7400 2950 8000 2950 +Wire Wire Line + 7400 3700 8000 3700 +Wire Wire Line + 7400 4450 8000 4450 +Wire Wire Line + 7400 5200 8000 5200 +Wire Wire Line + 7400 5950 8000 5950 +Wire Wire Line + 7400 6700 8000 6700 +$Comp +L d_inverter U2 +U 1 1 681F58CB +P 4500 600 +F 0 "U2" H 4500 500 60 0000 C CNN +F 1 "d_inverter" H 4500 750 60 0000 C CNN +F 2 "" H 4550 550 60 0000 C CNN +F 3 "" H 4550 550 60 0000 C CNN + 1 4500 600 + 1 0 0 -1 +$EndComp +Wire Wire Line + 5250 1000 4450 1000 +Wire Wire Line + 5250 1750 4450 1750 +Wire Wire Line + 5250 2500 4450 2500 +Wire Wire Line + 5250 3250 4450 3250 +Wire Wire Line + 5250 4000 4450 4000 +Wire Wire Line + 5250 4750 4450 4750 +Wire Wire Line + 5250 5500 4450 5500 +Wire Wire Line + 5250 6250 4450 6250 +$Comp +L PORT U1 +U 1 1 681F5EC8 +P 3950 600 +F 0 "U1" H 4000 700 30 0000 C CNN +F 1 "PORT" H 3950 600 30 0000 C CNN +F 2 "" H 3950 600 60 0000 C CNN +F 3 "" H 3950 600 60 0000 C CNN + 1 3950 600 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 3 1 681F5F68 +P 4200 1000 +F 0 "U1" H 4250 1100 30 0000 C CNN +F 1 "PORT" H 4200 1000 30 0000 C CNN +F 2 "" H 4200 1000 60 0000 C CNN +F 3 "" H 4200 1000 60 0000 C CNN + 3 4200 1000 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 4 1 681F5FAB +P 4200 1750 +F 0 "U1" H 4250 1850 30 0000 C CNN +F 1 "PORT" H 4200 1750 30 0000 C CNN +F 2 "" H 4200 1750 60 0000 C CNN +F 3 "" H 4200 1750 60 0000 C CNN + 4 4200 1750 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 5 1 681F5FEA +P 4200 2500 +F 0 "U1" H 4250 2600 30 0000 C CNN +F 1 "PORT" H 4200 2500 30 0000 C CNN +F 2 "" H 4200 2500 60 0000 C CNN +F 3 "" H 4200 2500 60 0000 C CNN + 5 4200 2500 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 6 1 681F602B +P 4200 3250 +F 0 "U1" H 4250 3350 30 0000 C CNN +F 1 "PORT" H 4200 3250 30 0000 C CNN +F 2 "" H 4200 3250 60 0000 C CNN +F 3 "" H 4200 3250 60 0000 C CNN + 6 4200 3250 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 7 1 681F606E +P 4200 4000 +F 0 "U1" H 4250 4100 30 0000 C CNN +F 1 "PORT" H 4200 4000 30 0000 C CNN +F 2 "" H 4200 4000 60 0000 C CNN +F 3 "" H 4200 4000 60 0000 C CNN + 7 4200 4000 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 8 1 681F60B5 +P 4200 4750 +F 0 "U1" H 4250 4850 30 0000 C CNN +F 1 "PORT" H 4200 4750 30 0000 C CNN +F 2 "" H 4200 4750 60 0000 C CNN +F 3 "" H 4200 4750 60 0000 C CNN + 8 4200 4750 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 9 1 681F60FC +P 4200 5500 +F 0 "U1" H 4250 5600 30 0000 C CNN +F 1 "PORT" H 4200 5500 30 0000 C CNN +F 2 "" H 4200 5500 60 0000 C CNN +F 3 "" H 4200 5500 60 0000 C CNN + 9 4200 5500 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 10 1 681F6188 +P 4200 6250 +F 0 "U1" H 4250 6350 30 0000 C CNN +F 1 "PORT" H 4200 6250 30 0000 C CNN +F 2 "" H 4200 6250 60 0000 C CNN +F 3 "" H 4200 6250 60 0000 C CNN + 10 4200 6250 + 1 0 0 -1 +$EndComp +$Comp +L PORT U1 +U 11 1 681F64D3 +P 8250 1450 +F 0 "U1" H 8300 1550 30 0000 C CNN +F 1 "PORT" H 8250 1450 30 0000 C CNN +F 2 "" H 8250 1450 60 0000 C CNN +F 3 "" H 8250 1450 60 0000 C CNN + 11 8250 1450 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 12 1 681F652E +P 8250 2200 +F 0 "U1" H 8300 2300 30 0000 C CNN +F 1 "PORT" H 8250 2200 30 0000 C CNN +F 2 "" H 8250 2200 60 0000 C CNN +F 3 "" H 8250 2200 60 0000 C CNN + 12 8250 2200 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 13 1 681F658D +P 8250 2950 +F 0 "U1" H 8300 3050 30 0000 C CNN +F 1 "PORT" H 8250 2950 30 0000 C CNN +F 2 "" H 8250 2950 60 0000 C CNN +F 3 "" H 8250 2950 60 0000 C CNN + 13 8250 2950 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 14 1 681F65EE +P 8250 3700 +F 0 "U1" H 8300 3800 30 0000 C CNN +F 1 "PORT" H 8250 3700 30 0000 C CNN +F 2 "" H 8250 3700 60 0000 C CNN +F 3 "" H 8250 3700 60 0000 C CNN + 14 8250 3700 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 15 1 681F6653 +P 8250 4450 +F 0 "U1" H 8300 4550 30 0000 C CNN +F 1 "PORT" H 8250 4450 30 0000 C CNN +F 2 "" H 8250 4450 60 0000 C CNN +F 3 "" H 8250 4450 60 0000 C CNN + 15 8250 4450 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 16 1 681F66C6 +P 8250 5200 +F 0 "U1" H 8300 5300 30 0000 C CNN +F 1 "PORT" H 8250 5200 30 0000 C CNN +F 2 "" H 8250 5200 60 0000 C CNN +F 3 "" H 8250 5200 60 0000 C CNN + 16 8250 5200 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 17 1 681F6731 +P 8250 5950 +F 0 "U1" H 8300 6050 30 0000 C CNN +F 1 "PORT" H 8250 5950 30 0000 C CNN +F 2 "" H 8250 5950 60 0000 C CNN +F 3 "" H 8250 5950 60 0000 C CNN + 17 8250 5950 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 18 1 681F67A4 +P 8250 6700 +F 0 "U1" H 8300 6800 30 0000 C CNN +F 1 "PORT" H 8250 6700 30 0000 C CNN +F 2 "" H 8250 6700 60 0000 C CNN +F 3 "" H 8250 6700 60 0000 C CNN + 18 8250 6700 + -1 0 0 1 +$EndComp +$Comp +L PORT U1 +U 2 1 68215E7A +P 3950 800 +F 0 "U1" H 4000 900 30 0000 C CNN +F 1 "PORT" H 3950 800 30 0000 C CNN +F 2 "" H 3950 800 60 0000 C CNN +F 3 "" H 3950 800 60 0000 C CNN + 2 3950 800 + 1 0 0 -1 +$EndComp +Wire Wire Line + 4200 800 6850 800 +Wire Wire Line + 6850 800 6850 6250 +$Comp +L d_and U3 +U 1 1 68215F4D +P 6950 1450 +F 0 "U3" H 6950 1450 60 0000 C CNN +F 1 "d_and" H 7000 1550 60 0000 C CNN +F 2 "" H 6950 1450 60 0000 C CNN +F 3 "" H 6950 1450 60 0000 C CNN + 1 6950 1450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6850 1000 6500 1000 +Wire Wire Line + 6500 1000 6500 1350 +Wire Wire Line + 6500 1450 6250 1450 +Wire Wire Line + 7400 1400 7400 1450 +$Comp +L d_and U4 +U 1 1 682160E0 +P 6950 2200 +F 0 "U4" H 6950 2200 60 0000 C CNN +F 1 "d_and" H 7000 2300 60 0000 C CNN +F 2 "" H 6950 2200 60 0000 C CNN +F 3 "" H 6950 2200 60 0000 C CNN + 1 6950 2200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6500 1750 6500 2100 +Wire Wire Line + 6500 2200 6250 2200 +Wire Wire Line + 7400 2150 7400 2200 +Wire Wire Line + 6850 1750 6500 1750 +Connection ~ 6850 1000 +$Comp +L d_and U5 +U 1 1 68216224 +P 6950 2950 +F 0 "U5" H 6950 2950 60 0000 C CNN +F 1 "d_and" H 7000 3050 60 0000 C CNN +F 2 "" H 6950 2950 60 0000 C CNN +F 3 "" H 6950 2950 60 0000 C CNN + 1 6950 2950 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6500 2500 6500 2850 +Wire Wire Line + 6500 2950 6250 2950 +Wire Wire Line + 6850 2500 6500 2500 +Connection ~ 6850 1750 +Wire Wire Line + 7400 2900 7400 2950 +$Comp +L d_and U6 +U 1 1 68216384 +P 6950 3700 +F 0 "U6" H 6950 3700 60 0000 C CNN +F 1 "d_and" H 7000 3800 60 0000 C CNN +F 2 "" H 6950 3700 60 0000 C CNN +F 3 "" H 6950 3700 60 0000 C CNN + 1 6950 3700 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6500 3250 6500 3600 +Wire Wire Line + 6500 3700 6250 3700 +Wire Wire Line + 7400 3650 7400 3700 +Wire Wire Line + 6850 3250 6500 3250 +Connection ~ 6850 2500 +$Comp +L d_and U7 +U 1 1 68216E4F +P 6950 4450 +F 0 "U7" H 6950 4450 60 0000 C CNN +F 1 "d_and" H 7000 4550 60 0000 C CNN +F 2 "" H 6950 4450 60 0000 C CNN +F 3 "" H 6950 4450 60 0000 C CNN + 1 6950 4450 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6500 4000 6500 4350 +Wire Wire Line + 6500 4450 6250 4450 +Wire Wire Line + 7400 4400 7400 4450 +Wire Wire Line + 6850 4000 6500 4000 +Connection ~ 6850 3250 +$Comp +L d_and U8 +U 1 1 68216F80 +P 6950 5200 +F 0 "U8" H 6950 5200 60 0000 C CNN +F 1 "d_and" H 7000 5300 60 0000 C CNN +F 2 "" H 6950 5200 60 0000 C CNN +F 3 "" H 6950 5200 60 0000 C CNN + 1 6950 5200 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6500 4750 6500 5100 +Wire Wire Line + 6500 5200 6250 5200 +Wire Wire Line + 7400 5150 7400 5200 +Wire Wire Line + 6850 4750 6500 4750 +Connection ~ 6850 4000 +$Comp +L d_and U9 +U 1 1 6821710F +P 6950 5950 +F 0 "U9" H 6950 5950 60 0000 C CNN +F 1 "d_and" H 7000 6050 60 0000 C CNN +F 2 "" H 6950 5950 60 0000 C CNN +F 3 "" H 6950 5950 60 0000 C CNN + 1 6950 5950 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6500 5500 6500 5850 +Wire Wire Line + 6500 5950 6250 5950 +Wire Wire Line + 7400 5900 7400 5950 +Wire Wire Line + 6850 5500 6500 5500 +Connection ~ 6850 4750 +$Comp +L d_and U10 +U 1 1 682172A8 +P 6950 6700 +F 0 "U10" H 6950 6700 60 0000 C CNN +F 1 "d_and" H 7000 6800 60 0000 C CNN +F 2 "" H 6950 6700 60 0000 C CNN +F 3 "" H 6950 6700 60 0000 C CNN + 1 6950 6700 + 1 0 0 -1 +$EndComp +Wire Wire Line + 6500 6250 6500 6600 +Wire Wire Line + 6500 6700 6250 6700 +Wire Wire Line + 7400 6650 7400 6700 +Wire Wire Line + 6850 6250 6500 6250 +Connection ~ 6850 5500 +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.sub b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.sub new file mode 100644 index 00000000..4a7b2475 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373.sub @@ -0,0 +1,51 @@ +* Subcircuit ls373 +.subckt ls373 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ net-_u1-pad15_ net-_u1-pad16_ net-_u1-pad17_ net-_u1-pad18_ +* c:\users\shanthipriya\desktop\madeeasy\fossee\esim\library\subcircuitlibrary\ls373\ls373.cir +.include 4d_375.sub +x1 net-_u1-pad3_ net-_u2-pad2_ ? net-_u3-pad2_ 4d_375 +x2 net-_u1-pad4_ net-_u2-pad2_ ? net-_u4-pad2_ 4d_375 +x3 net-_u1-pad5_ net-_u2-pad2_ ? net-_u5-pad2_ 4d_375 +x4 net-_u1-pad6_ net-_u2-pad2_ ? net-_u6-pad2_ 4d_375 +x5 net-_u1-pad7_ net-_u2-pad2_ ? net-_u7-pad2_ 4d_375 +x6 net-_u1-pad8_ net-_u2-pad2_ ? net-_u8-pad2_ 4d_375 +x7 net-_u1-pad9_ net-_u2-pad2_ ? net-_u9-pad2_ 4d_375 +x8 net-_u1-pad10_ net-_u2-pad2_ ? net-_u10-pad2_ 4d_375 +* u2 net-_u1-pad1_ net-_u2-pad2_ d_inverter +* u3 net-_u1-pad2_ net-_u3-pad2_ net-_u1-pad11_ d_and +* u4 net-_u1-pad2_ net-_u4-pad2_ net-_u1-pad12_ d_and +* u5 net-_u1-pad2_ net-_u5-pad2_ net-_u1-pad13_ d_and +* u6 net-_u1-pad2_ net-_u6-pad2_ net-_u1-pad14_ d_and +* u7 net-_u1-pad2_ net-_u7-pad2_ net-_u1-pad15_ d_and +* u8 net-_u1-pad2_ net-_u8-pad2_ net-_u1-pad16_ d_and +* u9 net-_u1-pad2_ net-_u9-pad2_ net-_u1-pad17_ d_and +* u10 net-_u1-pad2_ net-_u10-pad2_ net-_u1-pad18_ d_and +a1 net-_u1-pad1_ net-_u2-pad2_ u2 +a2 [net-_u1-pad2_ net-_u3-pad2_ ] net-_u1-pad11_ u3 +a3 [net-_u1-pad2_ net-_u4-pad2_ ] net-_u1-pad12_ u4 +a4 [net-_u1-pad2_ net-_u5-pad2_ ] net-_u1-pad13_ u5 +a5 [net-_u1-pad2_ net-_u6-pad2_ ] net-_u1-pad14_ u6 +a6 [net-_u1-pad2_ net-_u7-pad2_ ] net-_u1-pad15_ u7 +a7 [net-_u1-pad2_ net-_u8-pad2_ ] net-_u1-pad16_ u8 +a8 [net-_u1-pad2_ net-_u9-pad2_ ] net-_u1-pad17_ u9 +a9 [net-_u1-pad2_ net-_u10-pad2_ ] net-_u1-pad18_ u10 +* Schematic Name: d_inverter, NgSpice Name: d_inverter +.model u2 d_inverter(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u3 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u4 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u5 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u6 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u7 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u8 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u9 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Schematic Name: d_and, NgSpice Name: d_and +.model u10 d_and(rise_delay=1.0e-9 fall_delay=1.0e-9 input_load=1.0e-12 ) +* Control Statements + +.ends ls373
\ No newline at end of file diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373_Previous_Values.xml b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373_Previous_Values.xml new file mode 100644 index 00000000..dd6b790d --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/ls373_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source /><model><u2 name="type">d_inverter<field1 name="Enter Rise Delay (default=1.0e-9)" /><field2 name="Enter Fall Delay (default=1.0e-9)" /><field3 name="Enter Input Load (default=1.0e-12)" /></u2><u3 name="type">d_and<field4 name="Enter Rise Delay (default=1.0e-9)" /><field5 name="Enter Fall Delay (default=1.0e-9)" /><field6 name="Enter Input Load (default=1.0e-12)" /></u3><u4 name="type">d_and<field7 name="Enter Rise Delay (default=1.0e-9)" /><field8 name="Enter Fall Delay (default=1.0e-9)" /><field9 name="Enter Input Load (default=1.0e-12)" /></u4><u5 name="type">d_and<field10 name="Enter Rise Delay (default=1.0e-9)" /><field11 name="Enter Fall Delay (default=1.0e-9)" /><field12 name="Enter Input Load (default=1.0e-12)" /></u5><u6 name="type">d_and<field13 name="Enter Rise Delay (default=1.0e-9)" /><field14 name="Enter Fall Delay (default=1.0e-9)" /><field15 name="Enter Input Load (default=1.0e-12)" /></u6><u7 name="type">d_and<field16 name="Enter Rise Delay (default=1.0e-9)" /><field17 name="Enter Fall Delay (default=1.0e-9)" /><field18 name="Enter Input Load (default=1.0e-12)" /></u7><u8 name="type">d_and<field19 name="Enter Rise Delay (default=1.0e-9)" /><field20 name="Enter Fall Delay (default=1.0e-9)" /><field21 name="Enter Input Load (default=1.0e-12)" /></u8><u9 name="type">d_and<field22 name="Enter Rise Delay (default=1.0e-9)" /><field23 name="Enter Fall Delay (default=1.0e-9)" /><field24 name="Enter Input Load (default=1.0e-12)" /></u9><u10 name="type">d_and<field25 name="Enter Rise Delay (default=1.0e-9)" /><field26 name="Enter Fall Delay (default=1.0e-9)" /><field27 name="Enter Input Load (default=1.0e-12)" /></u10></model><devicemodel /><subcircuit><x1><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\4d_375</field></x1><x2><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\4d_375</field></x2><x3><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\4d_375</field></x3><x4><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\4d_375</field></x4><x5><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\4d_375</field></x5><x6><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\4d_375</field></x6><x7><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\4d_375</field></x7><x8><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\4d_375</field></x8></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">sec</field4><field5 name="Step Combo">sec</field5><field6 name="Stop Combo">sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573-cache.lib b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573-cache.lib new file mode 100644 index 00000000..2ac1dc3f --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573-cache.lib @@ -0,0 +1,172 @@ +EESchema-LIBRARY Version 2.3 +#encoding utf-8 +# +# DC +# +DEF DC v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "DC" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 w +X - 2 0 -450 300 U 50 50 1 1 w +ENDDRAW +ENDDEF +# +# GND +# +DEF GND #PWR 0 0 Y Y 1 F P +F0 "#PWR" 0 -250 50 H I C CNN +F1 "GND" 0 -150 50 H V C CNN +F2 "" 0 0 50 H I C CNN +F3 "" 0 0 50 H I C CNN +DRAW +P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N +X GND 1 0 0 0 D 50 50 1 1 W N +ENDDRAW +ENDDEF +# +# adc_bridge_2 +# +DEF adc_bridge_2 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "adc_bridge_2" 0 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -400 200 350 -100 0 1 0 N +X IN1 1 -600 50 200 R 50 50 1 1 I +X IN2 2 -600 -50 200 R 50 50 1 1 I +X OUT1 3 550 50 200 L 50 50 1 1 O +X OUT2 4 550 -50 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# adc_bridge_8 +# +DEF adc_bridge_8 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "adc_bridge_8" 0 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -400 200 350 -700 0 1 0 N +X IN1 1 -600 50 200 R 50 50 1 1 I +X IN2 2 -600 -50 200 R 50 50 1 1 I +X IN3 3 -600 -150 200 R 50 50 1 1 I +X IN4 4 -600 -250 200 R 50 50 1 1 I +X IN5 5 -600 -350 200 R 50 50 1 1 I +X IN6 6 -600 -450 200 R 50 50 1 1 I +X IN7 7 -600 -550 200 R 50 50 1 1 I +X IN8 8 -600 -650 200 R 50 50 1 1 I +X OUT1 9 550 50 200 L 50 50 1 1 O +X OUT2 10 550 -50 200 L 50 50 1 1 O +X OUT3 11 550 -150 200 L 50 50 1 1 O +X OUT4 12 550 -250 200 L 50 50 1 1 O +X OUT5 13 550 -350 200 L 50 50 1 1 O +X OUT6 14 550 -450 200 L 50 50 1 1 O +X OUT7 15 550 -550 200 L 50 50 1 1 O +X OUT8 16 550 -650 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# dac_bridge_8 +# +DEF dac_bridge_8 U 0 40 Y Y 1 F N +F0 "U" 0 0 60 H V C CNN +F1 "dac_bridge_8" 0 150 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +S -400 200 350 -700 0 1 0 N +X IN1 1 -600 50 200 R 50 50 1 1 I +X IN2 2 -600 -50 200 R 50 50 1 1 I +X IN3 3 -600 -150 200 R 50 50 1 1 I +X IN4 4 -600 -250 200 R 50 50 1 1 I +X IN5 5 -600 -350 200 R 50 50 1 1 I +X IN6 6 -600 -450 200 R 50 50 1 1 I +X IN7 7 -600 -550 200 R 50 50 1 1 I +X IN8 8 -600 -650 200 R 50 50 1 1 I +X OUT1 9 550 50 200 L 50 50 1 1 O +X OUT2 10 550 -50 200 L 50 50 1 1 O +X OUT3 11 550 -150 200 L 50 50 1 1 O +X OUT4 12 550 -250 200 L 50 50 1 1 O +X OUT5 13 550 -350 200 L 50 50 1 1 O +X OUT6 14 550 -450 200 L 50 50 1 1 O +X OUT7 15 550 -550 200 L 50 50 1 1 O +X OUT8 16 550 -650 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# ls573 +# +DEF ls573 x 0 40 Y Y 1 F N +F0 "x" 50 -300 60 H V C CNN +F1 "ls573" 0 1050 60 H V C CNN +F2 "" 0 1050 60 H I C CNN +F3 "" 0 1050 60 H I C CNN +DRAW +S 400 900 -400 -250 0 1 0 N +X OE 1 -600 800 200 R 50 50 1 1 I +X LE 2 -600 700 200 R 50 50 1 1 I +X 1D 3 -600 550 200 R 50 50 1 1 I +X 2D 4 -600 450 200 R 50 50 1 1 I +X 3D 5 -600 350 200 R 50 50 1 1 I +X 4D 6 -600 250 200 R 50 50 1 1 I +X 5D 7 -600 150 200 R 50 50 1 1 I +X 6D 8 -600 50 200 R 50 50 1 1 I +X 7D 9 -600 -50 200 R 50 50 1 1 I +X 8D 10 -600 -150 200 R 50 50 1 1 I +X 1Q 11 600 800 200 L 50 50 1 1 O +X 2Q 12 600 700 200 L 50 50 1 1 O +X 3Q 13 600 600 200 L 50 50 1 1 O +X 4Q 14 600 500 200 L 50 50 1 1 O +X 5Q 15 600 400 200 L 50 50 1 1 O +X 6Q 16 600 300 200 L 50 50 1 1 O +X 7Q 17 600 200 200 L 50 50 1 1 O +X 8Q 18 600 100 200 L 50 50 1 1 O +ENDDRAW +ENDDEF +# +# plot_v1 +# +DEF plot_v1 U 0 40 Y Y 1 F N +F0 "U" 0 500 60 H V C CNN +F1 "plot_v1" 200 350 60 H V C CNN +F2 "" 0 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +DRAW +C 0 500 100 0 1 0 N +X ~ ~ 0 200 200 U 50 50 1 1 I +ENDDRAW +ENDDEF +# +# pulse +# +DEF pulse v 0 40 Y Y 1 F N +F0 "v" -200 100 60 H V C CNN +F1 "pulse" -200 -50 60 H V C CNN +F2 "R1" -300 0 60 H V C CNN +F3 "" 0 0 60 H V C CNN +$FPLIST + 1_pin +$ENDFPLIST +DRAW +A -25 -450 501 928 871 0 1 0 N -50 50 0 50 +A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50 +A 75 600 551 -926 -873 0 1 0 N 50 50 100 50 +A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50 +A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50 +A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50 +C 0 0 150 0 1 0 N +X + 1 0 450 300 D 50 50 1 1 P +X - 2 0 -450 300 U 50 50 1 1 P +ENDDRAW +ENDDEF +# +#End Library diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.cir b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.cir new file mode 100644 index 00000000..ddc2f6a5 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.cir @@ -0,0 +1,32 @@ +* C:\Users\Shanthipriya\eSim-Workspace\74ls573\74ls573.cir + +* EESchema Netlist Version 1.1 (Spice format) creation date: 05/30/25 14:02:47 + +* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N +* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0 + +* Sheet Name: / +U2 1D 2D 3D 4D 5D 6D 7D 8D Net-_U2-Pad9_ Net-_U2-Pad10_ Net-_U2-Pad11_ Net-_U2-Pad12_ Net-_U2-Pad13_ Net-_U2-Pad14_ Net-_U2-Pad15_ Net-_U2-Pad16_ adc_bridge_8 +U3 Net-_U3-Pad1_ Net-_U3-Pad2_ Net-_U3-Pad3_ Net-_U3-Pad4_ Net-_U3-Pad5_ Net-_U3-Pad6_ Net-_U3-Pad7_ Net-_U3-Pad8_ 1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q dac_bridge_8 +U1 oe LE Net-_U1-Pad3_ Net-_U1-Pad4_ adc_bridge_2 +v3 1D GND pulse +v4 2D GND pulse +v5 3D GND pulse +v6 4D GND pulse +v7 5D GND pulse +v8 6D GND pulse +v9 7D GND pulse +v10 8D GND pulse +U4 1Q plot_v1 +U5 2Q plot_v1 +U6 3Q plot_v1 +U7 4Q plot_v1 +U8 5Q plot_v1 +U9 6Q plot_v1 +U10 7Q plot_v1 +U11 8Q plot_v1 +x1 Net-_U1-Pad3_ Net-_U1-Pad4_ Net-_U2-Pad9_ Net-_U2-Pad10_ Net-_U2-Pad11_ Net-_U2-Pad12_ Net-_U2-Pad13_ Net-_U2-Pad14_ Net-_U2-Pad15_ Net-_U2-Pad16_ Net-_U3-Pad1_ Net-_U3-Pad2_ Net-_U3-Pad3_ Net-_U3-Pad4_ Net-_U3-Pad5_ Net-_U3-Pad6_ Net-_U3-Pad7_ Net-_U3-Pad8_ ls573 +v1 oe GND DC +v2 LE GND DC + +.end diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.cir.out b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.cir.out new file mode 100644 index 00000000..2b090dc7 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.cir.out @@ -0,0 +1,51 @@ +* c:\users\shanthipriya\esim-workspace\74ls573\74ls573.cir + +.include ls373.sub +* u2 1d 2d 3d 4d 5d 6d 7d 8d net-_u2-pad9_ net-_u2-pad10_ net-_u2-pad11_ net-_u2-pad12_ net-_u2-pad13_ net-_u2-pad14_ net-_u2-pad15_ net-_u2-pad16_ adc_bridge_8 +* u3 net-_u3-pad1_ net-_u3-pad2_ net-_u3-pad3_ net-_u3-pad4_ net-_u3-pad5_ net-_u3-pad6_ net-_u3-pad7_ net-_u3-pad8_ 1q 2q 3q 4q 5q 6q 7q 8q dac_bridge_8 +* u1 oe le net-_u1-pad3_ net-_u1-pad4_ adc_bridge_2 +v3 1d gnd pulse(0 5 0 1u 1u 4m 8m) +v4 2d gnd pulse(0 5 0m 1u 1u 4m 8m) +v5 3d gnd pulse(0 5 0 1u 1u 4m 8m) +v6 4d gnd pulse(0 5 0 1u 1u 4m 8m) +v7 5d gnd pulse(0 5 0 1u 1u 4m 8m) +v8 6d gnd pulse(0 5 0 1u 1u 4m 8m) +v9 7d gnd pulse(0 5 0 1u 1u 4m 8m) +v10 8d gnd pulse(0 5 0 1u 1u 4m 8m) +* u4 1q plot_v1 +* u5 2q plot_v1 +* u6 3q plot_v1 +* u7 4q plot_v1 +* u8 5q plot_v1 +* u9 6q plot_v1 +* u10 7q plot_v1 +* u11 8q plot_v1 +x1 net-_u1-pad3_ net-_u1-pad4_ net-_u2-pad9_ net-_u2-pad10_ net-_u2-pad11_ net-_u2-pad12_ net-_u2-pad13_ net-_u2-pad14_ net-_u2-pad15_ net-_u2-pad16_ net-_u3-pad1_ net-_u3-pad2_ net-_u3-pad3_ net-_u3-pad4_ net-_u3-pad5_ net-_u3-pad6_ net-_u3-pad7_ net-_u3-pad8_ ls373 +v1 oe gnd dc 0 +v2 le gnd dc 5 +a1 [1d 2d 3d 4d 5d 6d 7d 8d ] [net-_u2-pad9_ net-_u2-pad10_ net-_u2-pad11_ net-_u2-pad12_ net-_u2-pad13_ net-_u2-pad14_ net-_u2-pad15_ net-_u2-pad16_ ] u2 +a2 [net-_u3-pad1_ net-_u3-pad2_ net-_u3-pad3_ net-_u3-pad4_ net-_u3-pad5_ net-_u3-pad6_ net-_u3-pad7_ net-_u3-pad8_ ] [1q 2q 3q 4q 5q 6q 7q 8q ] u3 +a3 [oe le ] [net-_u1-pad3_ net-_u1-pad4_ ] u1 +* Schematic Name: adc_bridge_8, NgSpice Name: adc_bridge +.model u2 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) +* Schematic Name: dac_bridge_8, NgSpice Name: dac_bridge +.model u3 dac_bridge(out_low=0.0 out_high=5.0 out_undef=0.5 input_load=1.0e-12 t_rise=1.0e-9 t_fall=1.0e-9 ) +* Schematic Name: adc_bridge_2, NgSpice Name: adc_bridge +.model u1 adc_bridge(in_low=1.0 in_high=2.0 rise_delay=1.0e-9 fall_delay=1.0e-9 ) +.tran 10e-06 100e-03 0e-09 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +plot v(1q) +plot v(2q) +plot v(3q) +plot v(4q) +plot v(5q) +plot v(6q) +plot v(7q) +plot v(8q) +.endc +.end diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.pro b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.pro new file mode 100644 index 00000000..e27a398b --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.pro @@ -0,0 +1,73 @@ +update=22/05/2015 07:44:53 +version=1 +last_client=kicad +[general] +version=1 +RootSch= +BoardNm= +[pcbnew] +version=1 +LastNetListRead= +UseCmpFile=1 +PadDrill=0.600000000000 +PadDrillOvalY=0.600000000000 +PadSizeH=1.500000000000 +PadSizeV=1.500000000000 +PcbTextSizeV=1.500000000000 +PcbTextSizeH=1.500000000000 +PcbTextThickness=0.300000000000 +ModuleTextSizeV=1.000000000000 +ModuleTextSizeH=1.000000000000 +ModuleTextSizeThickness=0.150000000000 +SolderMaskClearance=0.000000000000 +SolderMaskMinWidth=0.000000000000 +DrawSegmentWidth=0.200000000000 +BoardOutlineThickness=0.100000000000 +ModuleOutlineThickness=0.150000000000 +[cvpcb] +version=1 +NetIExt=net +[eeschema] +version=1 +LibDir= +[eeschema/libraries] +LibName1=adc-dac +LibName2=memory +LibName3=xilinx +LibName4=microcontrollers +LibName5=dsp +LibName6=microchip +LibName7=analog_switches +LibName8=motorola +LibName9=texas +LibName10=intel +LibName11=audio +LibName12=interface +LibName13=digital-audio +LibName14=philips +LibName15=display +LibName16=cypress +LibName17=siliconi +LibName18=opto +LibName19=atmel +LibName20=contrib +LibName21=power +LibName22=eSim_Plot +LibName23=transistors +LibName24=conn +LibName25=eSim_User +LibName26=regul +LibName27=74xx +LibName28=cmos4000 +LibName29=eSim_Analog +LibName30=eSim_Devices +LibName31=eSim_Digital +LibName32=eSim_Hybrid +LibName33=eSim_Miscellaneous +LibName34=eSim_Power +LibName35=eSim_Sources +LibName36=eSim_Subckt +LibName37=eSim_Nghdl +LibName38=eSim_Ngveri +LibName39=eSim_SKY130 +LibName40=eSim_SKY130_Subckts diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.proj b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.proj new file mode 100644 index 00000000..a51ca27b --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.proj @@ -0,0 +1 @@ +schematicFile 74ls373.sch diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.sch b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.sch new file mode 100644 index 00000000..0ca11790 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573.sch @@ -0,0 +1,614 @@ +EESchema Schematic File Version 2 +LIBS:adc-dac +LIBS:memory +LIBS:xilinx +LIBS:microcontrollers +LIBS:dsp +LIBS:microchip +LIBS:analog_switches +LIBS:motorola +LIBS:texas +LIBS:intel +LIBS:audio +LIBS:interface +LIBS:digital-audio +LIBS:philips +LIBS:display +LIBS:cypress +LIBS:siliconi +LIBS:opto +LIBS:atmel +LIBS:contrib +LIBS:power +LIBS:eSim_Plot +LIBS:transistors +LIBS:conn +LIBS:eSim_User +LIBS:regul +LIBS:74xx +LIBS:cmos4000 +LIBS:eSim_Analog +LIBS:eSim_Devices +LIBS:eSim_Digital +LIBS:eSim_Hybrid +LIBS:eSim_Miscellaneous +LIBS:eSim_Power +LIBS:eSim_Sources +LIBS:eSim_Subckt +LIBS:eSim_Nghdl +LIBS:eSim_Ngveri +LIBS:eSim_SKY130 +LIBS:eSim_SKY130_Subckts +LIBS:74ls573-cache +EELAYER 25 0 +EELAYER END +$Descr A4 11693 8268 +encoding utf-8 +Sheet 1 1 +Title "" +Date "" +Rev "" +Comp "" +Comment1 "" +Comment2 "" +Comment3 "" +Comment4 "" +$EndDescr +$Comp +L adc_bridge_8 U2 +U 1 1 681F4F2B +P 4400 3000 +F 0 "U2" H 4400 3000 60 0000 C CNN +F 1 "adc_bridge_8" H 4400 3150 60 0000 C CNN +F 2 "" H 4400 3000 60 0000 C CNN +F 3 "" H 4400 3000 60 0000 C CNN + 1 4400 3000 + 1 0 0 -1 +$EndComp +$Comp +L dac_bridge_8 U3 +U 1 1 681F4F66 +P 6750 2750 +F 0 "U3" H 6750 2750 60 0000 C CNN +F 1 "dac_bridge_8" H 6750 2900 60 0000 C CNN +F 2 "" H 6750 2750 60 0000 C CNN +F 3 "" H 6750 2750 60 0000 C CNN + 1 6750 2750 + 1 0 0 -1 +$EndComp +$Comp +L adc_bridge_2 U1 +U 1 1 681F4FB3 +P 4400 2700 +F 0 "U1" H 4400 2700 60 0000 C CNN +F 1 "adc_bridge_2" H 4400 2850 60 0000 C CNN +F 2 "" H 4400 2700 60 0000 C CNN +F 3 "" H 4400 2700 60 0000 C CNN + 1 4400 2700 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR01 +U 1 1 681F5109 +P 750 3900 +F 0 "#PWR01" H 750 3650 50 0001 C CNN +F 1 "GND" H 750 3750 50 0000 C CNN +F 2 "" H 750 3900 50 0001 C CNN +F 3 "" H 750 3900 50 0001 C CNN + 1 750 3900 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR02 +U 1 1 681F5129 +P 1150 4150 +F 0 "#PWR02" H 1150 3900 50 0001 C CNN +F 1 "GND" H 1150 4000 50 0000 C CNN +F 2 "" H 1150 4150 50 0001 C CNN +F 3 "" H 1150 4150 50 0001 C CNN + 1 1150 4150 + 1 0 0 -1 +$EndComp +$Comp +L pulse v3 +U 1 1 681F5173 +P 1500 4850 +F 0 "v3" H 1300 4950 60 0000 C CNN +F 1 "pulse" H 1300 4800 60 0000 C CNN +F 2 "R1" H 1200 4850 60 0000 C CNN +F 3 "" H 1500 4850 60 0000 C CNN + 1 1500 4850 + 1 0 0 -1 +$EndComp +$Comp +L pulse v4 +U 1 1 681F51F8 +P 1900 4850 +F 0 "v4" H 1700 4950 60 0000 C CNN +F 1 "pulse" H 1700 4800 60 0000 C CNN +F 2 "R1" H 1600 4850 60 0000 C CNN +F 3 "" H 1900 4850 60 0000 C CNN + 1 1900 4850 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR03 +U 1 1 681F5233 +P 1500 5550 +F 0 "#PWR03" H 1500 5300 50 0001 C CNN +F 1 "GND" H 1500 5400 50 0000 C CNN +F 2 "" H 1500 5550 50 0001 C CNN +F 3 "" H 1500 5550 50 0001 C CNN + 1 1500 5550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR04 +U 1 1 681F5257 +P 1900 5550 +F 0 "#PWR04" H 1900 5300 50 0001 C CNN +F 1 "GND" H 1900 5400 50 0000 C CNN +F 2 "" H 1900 5550 50 0001 C CNN +F 3 "" H 1900 5550 50 0001 C CNN + 1 1900 5550 + 1 0 0 -1 +$EndComp +$Comp +L pulse v5 +U 1 1 681F52DE +P 2300 4850 +F 0 "v5" H 2100 4950 60 0000 C CNN +F 1 "pulse" H 2100 4800 60 0000 C CNN +F 2 "R1" H 2000 4850 60 0000 C CNN +F 3 "" H 2300 4850 60 0000 C CNN + 1 2300 4850 + 1 0 0 -1 +$EndComp +$Comp +L pulse v6 +U 1 1 681F52E4 +P 2700 4850 +F 0 "v6" H 2500 4950 60 0000 C CNN +F 1 "pulse" H 2500 4800 60 0000 C CNN +F 2 "R1" H 2400 4850 60 0000 C CNN +F 3 "" H 2700 4850 60 0000 C CNN + 1 2700 4850 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR05 +U 1 1 681F52EA +P 2300 5550 +F 0 "#PWR05" H 2300 5300 50 0001 C CNN +F 1 "GND" H 2300 5400 50 0000 C CNN +F 2 "" H 2300 5550 50 0001 C CNN +F 3 "" H 2300 5550 50 0001 C CNN + 1 2300 5550 + 1 0 0 -1 +$EndComp +$Comp +L GND #PWR06 +U 1 1 681F52F0 +P 2700 5550 +F 0 "#PWR06" H 2700 5300 50 0001 C CNN +F 1 "GND" H 2700 5400 50 0000 C CNN +F 2 "" H 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GLabel 8500 4250 0 60 Input ~ 0 +6Q +Text GLabel 8700 4350 0 60 Input ~ 0 +7Q +Text GLabel 8900 4450 0 60 Input ~ 0 +8Q +Wire Wire Line + 8500 4250 8500 3200 +Connection ~ 8500 3200 +Text GLabel 2900 1500 2 60 Input ~ 0 +8D +Wire Wire Line + 2900 1500 2900 3950 +Text GLabel 2700 1400 2 60 Input ~ 0 +7D +Wire Wire Line + 2700 1400 2700 2900 +Text GLabel 2500 1300 2 60 Input ~ 0 +6D +Text GLabel 2300 1200 2 60 Input ~ 0 +5D +Wire Wire Line + 2300 1200 2300 2500 +Wire Wire Line + 2500 1300 2500 4100 +Text GLabel 2050 1100 2 60 Input ~ 0 +4D +Wire Wire Line + 2050 1100 2050 3800 +Text GLabel 1850 1000 2 60 Input ~ 0 +3D +Text GLabel 1650 900 2 60 Input ~ 0 +2D +Text GLabel 1450 800 2 60 Input ~ 0 +1D +Wire Wire Line + 1450 800 1450 2950 +Wire Wire Line + 1650 900 1650 3050 +Wire Wire Line + 1850 1000 1850 3350 +Connection ~ 1500 2950 +Connection ~ 1900 3050 +Wire Wire Line + 1850 3350 2300 3350 +Connection ~ 2300 3350 +Wire Wire Line + 2050 3800 2700 3800 +Connection ~ 2700 3800 +Wire Wire Line + 2300 2500 2400 2500 +Wire Wire Line + 2400 2500 2400 4050 +Wire Wire Line + 2400 4050 3100 4050 +Connection ~ 3100 4050 +Wire Wire Line + 2500 4100 3500 4100 +Connection ~ 3500 4100 +Wire Wire Line + 2700 2900 2850 2900 +Wire Wire Line + 2850 2900 2850 3900 +Connection ~ 3700 3900 +Wire Wire Line + 2900 3950 4300 3950 +Connection ~ 4300 3950 +Wire Wire Line + 8050 4050 8050 3000 +Connection ~ 8050 3000 +Wire Wire Line + 8300 4150 8300 3100 +Connection ~ 8300 3100 +Wire Wire Line + 8900 4450 8900 3400 +Connection ~ 8900 3400 +Wire Wire Line + 7650 3850 7650 2800 +Connection ~ 7650 2800 +Wire Wire Line + 8700 4350 8700 3300 +Connection ~ 8700 3300 +$Comp +L ls573 x1 +U 1 1 68215BF4 +P 5550 3500 +F 0 "x1" H 5600 3200 60 0000 C CNN +F 1 "ls573" H 5550 4550 60 0000 C CNN +F 2 "" H 5550 4550 60 0001 C CNN +F 3 "" H 5550 4550 60 0001 C CNN + 1 5550 3500 + 1 0 0 -1 +$EndComp +Text GLabel 750 1800 2 60 Input ~ 0 +oe +Wire Wire Line + 750 1800 750 2650 +Connection ~ 1200 2750 +Text GLabel 1200 1900 2 60 Input ~ 0 +LE +Wire Wire Line + 1200 1900 1200 2750 +$Comp +L DC v1 +U 1 1 68396D07 +P 750 3100 +F 0 "v1" H 550 3200 60 0000 C CNN +F 1 "DC" H 550 3050 60 0000 C CNN +F 2 "R1" H 450 3100 60 0000 C CNN +F 3 "" H 750 3100 60 0000 C CNN + 1 750 3100 + 1 0 0 -1 +$EndComp +$Comp +L DC v2 +U 1 1 68396D5A +P 1150 3350 +F 0 "v2" H 950 3450 60 0000 C CNN +F 1 "DC" H 950 3300 60 0000 C CNN +F 2 "R1" H 850 3350 60 0000 C CNN +F 3 "" H 1150 3350 60 0000 C CNN + 1 1150 3350 + 1 0 0 -1 +$EndComp +$EndSCHEMATC diff --git a/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573_Previous_Values.xml b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573_Previous_Values.xml new file mode 100644 index 00000000..dc8b5216 --- /dev/null +++ b/library/SubcircuitLibrary/esim_ic_files/sn54als573/sn54als573_Previous_Values.xml @@ -0,0 +1 @@ +<KicadtoNgspice><source><v1 name="Source type">dc<field1 name="Value">0</field1></v1><v2 name="Source type">dc<field1 name="Value">5</field1></v2><v3 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1u</field4><field5 name="Fall Time">1u</field5><field5 name="Pulse width">4m</field5><field5 name="Period">8m</field5></v3><v4 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0m</field3><field4 name="Rise Time">1u</field4><field5 name="Fall Time">1u</field5><field5 name="Pulse width">4m</field5><field5 name="Period">8m</field5></v4><v5 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1u</field4><field5 name="Fall Time">1u</field5><field5 name="Pulse width">4m</field5><field5 name="Period">8m</field5></v5><v6 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1u</field4><field5 name="Fall Time">1u</field5><field5 name="Pulse width">4m</field5><field5 name="Period">8m</field5></v6><v7 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1u</field4><field5 name="Fall Time">1u</field5><field5 name="Pulse width">4m</field5><field5 name="Period">8m</field5></v7><v8 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1u</field4><field5 name="Fall Time">1u</field5><field5 name="Pulse width">4m</field5><field5 name="Period">8m</field5></v8><v9 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1u</field4><field5 name="Fall Time">1u</field5><field5 name="Pulse width">4m</field5><field5 name="Period">8m</field5></v9><v10 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1u</field4><field5 name="Fall Time">1u</field5><field5 name="Pulse width">4m</field5><field5 name="Period">8m</field5></v10><v1 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0</field3><field4 name="Rise Time">1u</field4><field5 name="Fall Time">1u</field5><field5 name="Pulse width">4m</field5><field5 name="Period">8m</field5></v1><v2 name="Source type">pulse<field1 name="Initial Value">0</field1><field2 name="Pulse Value">5</field2><field3 name="Delay Time">0m</field3><field4 name="Rise Time">1u</field4><field5 name="Fall Time">1u</field5><field5 name="Pulse width">4m</field5><field5 name="Period">8m</field5></v2></source><model><u2 name="type">adc_bridge<field1 name="Enter value for in_low (default=1.0)" /><field2 name="Enter value for in_high (default=2.0)" /><field3 name="Enter Rise Delay (default=1.0e-9)" /><field4 name="Enter Fall Delay (default=1.0e-9)" /></u2><u3 name="type">dac_bridge<field5 name="Enter value for out_low (default=0.0)" /><field6 name="Enter value for out_high (default=5.0)" /><field7 name="Enter value for out_undef (default=0.5)" /><field8 name="Enter value for input load (default=1.0e-12)" /><field9 name="Enter the Rise Time (default=1.0e-9)" /><field10 name="Enter the Fall Time (default=1.0e-9)" /></u3><u1 name="type">adc_bridge<field11 name="Enter value for in_low (default=1.0)" /><field12 name="Enter value for in_high (default=2.0)" /><field13 name="Enter Rise Delay (default=1.0e-9)" /><field14 name="Enter Fall Delay (default=1.0e-9)" /></u1></model><devicemodel /><subcircuit><x1><field>C:\Users\Shanthipriya\Desktop\madeeasy\FOSSEE\eSim\library\SubcircuitLibrary\ls373</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time">0</field1><field2 name="Step Time">10</field2><field3 name="Stop Time">100</field3><field4 name="Start Combo">ns</field4><field5 name="Step Combo">us</field5><field6 name="Stop Combo">ms</field6></tran></analysis></KicadtoNgspice>
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