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| author | Maanit | 2025-02-16 19:38:47 +0530 |
|---|---|---|
| committer | Maanit | 2025-02-16 19:38:47 +0530 |
| commit | 9da74f5f268449a049fc1fe1691a6f8d0f498dc1 (patch) | |
| tree | 1144a82cbabf332210df55a71cb587bc8dad63a2 /library/SubcircuitLibrary/SN74LS00/SN74LS00.cir.out | |
| parent | 5b7ef235576d903e20c11e348fcaf5c2b30bb059 (diff) | |
| download | eSim-9da74f5f268449a049fc1fe1691a6f8d0f498dc1.tar.gz eSim-9da74f5f268449a049fc1fe1691a6f8d0f498dc1.tar.bz2 eSim-9da74f5f268449a049fc1fe1691a6f8d0f498dc1.zip | |
SN74LS00 is a Quad 2-Input NAND Gate IC
Diffstat (limited to 'library/SubcircuitLibrary/SN74LS00/SN74LS00.cir.out')
| -rw-r--r-- | library/SubcircuitLibrary/SN74LS00/SN74LS00.cir.out | 17 |
1 files changed, 17 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/SN74LS00/SN74LS00.cir.out b/library/SubcircuitLibrary/SN74LS00/SN74LS00.cir.out new file mode 100644 index 00000000..15fe255d --- /dev/null +++ b/library/SubcircuitLibrary/SN74LS00/SN74LS00.cir.out @@ -0,0 +1,17 @@ +* c:\fossee\esim\library\subcircuitlibrary\sn74ls00\sn74ls00.cir + +.include NAND_GATE_FINAL.sub +x1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad14_ NAND_GATE_FINAL +x3 net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad14_ NAND_GATE_FINAL +x2 net-_u1-pad10_ net-_u1-pad9_ net-_u1-pad8_ net-_u1-pad14_ NAND_GATE_FINAL +x4 net-_u1-pad13_ net-_u1-pad12_ net-_u1-pad11_ net-_u1-pad14_ NAND_GATE_FINAL +* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ ? net-_u1-pad8_ net-_u1-pad9_ net-_u1-pad10_ net-_u1-pad11_ net-_u1-pad12_ net-_u1-pad13_ net-_u1-pad14_ port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |