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| author | Sumanto Kar | 2024-11-19 13:01:48 +0530 |
|---|---|---|
| committer | Sumanto Kar | 2024-11-19 13:35:37 +0530 |
| commit | fbc2f9c88467e45dda45be6ad48e607d2797d5cf (patch) | |
| tree | 6eb539107e3c9a78049dc615b118db4e4cf01738 /library/SubcircuitLibrary/SN7483A_sub/4_OR.sub | |
| parent | 84061eca7de0c15700012c8627aade77c60a05c7 (diff) | |
| download | eSim-fbc2f9c88467e45dda45be6ad48e607d2797d5cf.tar.gz eSim-fbc2f9c88467e45dda45be6ad48e607d2797d5cf.tar.bz2 eSim-fbc2f9c88467e45dda45be6ad48e607d2797d5cf.zip | |
Revert "Subcircuit Files of ICs(Contributor: Sudheshna Prabakaran) (#285)"
This reverts commit 84061eca7de0c15700012c8627aade77c60a05c7.
Diffstat (limited to 'library/SubcircuitLibrary/SN7483A_sub/4_OR.sub')
| -rw-r--r-- | library/SubcircuitLibrary/SN7483A_sub/4_OR.sub | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/library/SubcircuitLibrary/SN7483A_sub/4_OR.sub b/library/SubcircuitLibrary/SN7483A_sub/4_OR.sub deleted file mode 100644 index d1fd3a24..00000000 --- a/library/SubcircuitLibrary/SN7483A_sub/4_OR.sub +++ /dev/null @@ -1,18 +0,0 @@ -* Subcircuit 4_OR -.subckt 4_OR net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ -* c:\users\malli\esim\src\subcircuitlibrary\4_or\4_or.cir -* u2 net-_u1-pad1_ net-_u1-pad2_ net-_u2-pad3_ d_or -* u3 net-_u1-pad3_ net-_u1-pad4_ net-_u3-pad3_ d_or -* u4 net-_u2-pad3_ net-_u3-pad3_ net-_u1-pad5_ d_or -a1 [net-_u1-pad1_ net-_u1-pad2_ ] net-_u2-pad3_ u2 -a2 [net-_u1-pad3_ net-_u1-pad4_ ] net-_u3-pad3_ u3 -a3 [net-_u2-pad3_ net-_u3-pad3_ ] net-_u1-pad5_ u4 -* Schematic Name: d_or, NgSpice Name: d_or -.model u2 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_or, NgSpice Name: d_or -.model u3 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Schematic Name: d_or, NgSpice Name: d_or -.model u4 d_or(fall_delay=1.0e-9 input_load=1.0e-12 rise_delay=1.0e-9 ) -* Control Statements - -.ends 4_OR
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