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author | Aditya Minocha | 2024-08-25 21:52:15 +0530 |
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committer | GitHub | 2024-08-25 21:52:15 +0530 |
commit | 64a830500ffbadd67c42d008e68c52dfdc6f28d2 (patch) | |
tree | acfd8da39aadba7cc285de455dfb30248d10ebc5 /library/SubcircuitLibrary/SN54HC148/SN54HC148-cache.lib | |
parent | 7f60ce39c1e72fff19153772e66a628f9678e5c9 (diff) | |
download | eSim-64a830500ffbadd67c42d008e68c52dfdc6f28d2.tar.gz eSim-64a830500ffbadd67c42d008e68c52dfdc6f28d2.tar.bz2 eSim-64a830500ffbadd67c42d008e68c52dfdc6f28d2.zip |
SN54HC148 IC - 8:3 Priority Encoder (Remaining Files)
Diffstat (limited to 'library/SubcircuitLibrary/SN54HC148/SN54HC148-cache.lib')
-rw-r--r-- | library/SubcircuitLibrary/SN54HC148/SN54HC148-cache.lib | 118 |
1 files changed, 118 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/SN54HC148/SN54HC148-cache.lib b/library/SubcircuitLibrary/SN54HC148/SN54HC148-cache.lib new file mode 100644 index 00000000..e64e041c --- /dev/null +++ b/library/SubcircuitLibrary/SN54HC148/SN54HC148-cache.lib @@ -0,0 +1,118 @@ +EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# DC
+#
+DEF DC v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "DC" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 50 1 1 w
+X - 2 0 -450 300 U 50 50 1 1 w
+ENDDRAW
+ENDDEF
+#
+# GND
+#
+DEF GND #PWR 0 0 Y Y 1 F P
+F0 "#PWR" 0 -250 50 H I C CNN
+F1 "GND" 0 -150 50 H V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+DRAW
+P 6 0 1 0 0 0 0 -50 50 -50 0 -100 -50 -50 0 -50 N
+X GND 1 0 0 0 D 50 50 1 1 W N
+ENDDRAW
+ENDDEF
+#
+# SN54HC148_IC
+#
+DEF SN54HC148_IC X 0 40 Y Y 1 F N
+F0 "X" 1900 750 60 H V C CNN
+F1 "SN54HC148_IC" 1900 850 60 H V C CNN
+F2 "" 450 600 60 H I C CNN
+F3 "" 450 600 60 H I C CNN
+DRAW
+A 1900 1800 269 -1582 -218 0 1 0 N 1650 1700 2150 1700
+S 1300 0 2500 1700 0 1 0 N
+X 4 1 1100 1500 200 R 50 50 1 1 I
+X 5 2 1100 1300 200 R 50 50 1 1 I
+X 6 3 1100 1100 200 R 50 50 1 1 I
+X 7 4 1100 900 200 R 50 50 1 1 I
+X EI 5 1100 700 200 R 50 50 1 1 I
+X A2 6 1100 500 200 R 50 50 1 1 O
+X A1 7 1100 300 200 R 50 50 1 1 O
+X GND 8 1100 100 200 R 50 50 1 1 I
+X A0 9 2700 100 200 L 50 50 1 1 O
+X 0 10 2700 300 200 L 50 50 1 1 I
+X 1 11 2700 500 200 L 50 50 1 1 I
+X 2 12 2700 700 200 L 50 50 1 1 I
+X 3 13 2700 900 200 L 50 50 1 1 I
+X GS 14 2700 1100 200 L 50 50 1 1 O
+X EO 15 2700 1300 200 L 50 50 1 1 O
+X VCC 16 2700 1500 200 L 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# plot_v1
+#
+DEF plot_v1 U 0 40 Y Y 1 F N
+F0 "U" 0 500 60 H V C CNN
+F1 "plot_v1" 200 350 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 0 500 100 0 1 0 N
+X ~ ~ 0 200 200 U 50 50 1 1 I
+ENDDRAW
+ENDDEF
+#
+# pulse
+#
+DEF pulse v 0 40 Y Y 1 F N
+F0 "v" -200 100 60 H V C CNN
+F1 "pulse" -200 -50 60 H V C CNN
+F2 "R1" -300 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ 1_pin
+$ENDFPLIST
+DRAW
+A -25 -450 501 928 871 0 1 0 N -50 50 0 50
+A 25 400 451 -931 -868 0 1 0 N 0 -50 50 -50
+A 75 600 551 -926 -873 0 1 0 N 50 50 100 50
+A 350 0 403 -1728 1728 0 1 0 N -50 -50 -50 50
+A 450 0 453 1736 -1736 0 1 0 N 0 50 0 -50
+A 600 0 552 -1748 1748 0 1 0 N 50 -50 50 50
+C 0 0 150 0 1 0 N
+X + 1 0 450 300 D 50 50 1 1 P
+X - 2 0 -450 300 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
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