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| author | Aditya Minocha | 2024-08-25 21:34:06 +0530 |
|---|---|---|
| committer | GitHub | 2024-08-25 21:34:06 +0530 |
| commit | 7f60ce39c1e72fff19153772e66a628f9678e5c9 (patch) | |
| tree | 34df2c39041c02ff50dc5fbc0aecf1d1298305a5 /library/SubcircuitLibrary/SN54HC148/9_NAND.sub | |
| parent | 4148cefab1bccb6c2cd4ae3606e5450cf090dac0 (diff) | |
| download | eSim-7f60ce39c1e72fff19153772e66a628f9678e5c9.tar.gz eSim-7f60ce39c1e72fff19153772e66a628f9678e5c9.tar.bz2 eSim-7f60ce39c1e72fff19153772e66a628f9678e5c9.zip | |
SN54HC148 IC - 8:3 Priority Encoder
Diffstat (limited to 'library/SubcircuitLibrary/SN54HC148/9_NAND.sub')
| -rw-r--r-- | library/SubcircuitLibrary/SN54HC148/9_NAND.sub | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/SN54HC148/9_NAND.sub b/library/SubcircuitLibrary/SN54HC148/9_NAND.sub new file mode 100644 index 00000000..d83a97b2 --- /dev/null +++ b/library/SubcircuitLibrary/SN54HC148/9_NAND.sub @@ -0,0 +1,26 @@ +* Subcircuit 9_NAND
+.subckt 9_NAND net-_m1-pad2_ net-_m2-pad2_ net-_m3-pad2_ net-_m13-pad2_ net-_m14-pad2_ net-_m15-pad2_ net-_m10-pad2_ net-_m11-pad2_ net-_m12-pad2_ net-_m12-pad3_ net-_m1-pad1_ net-_m1-pad3_
+* c:\fossee\esim\library\subcircuitlibrary\9_nand\9_nand.cir
+.include NMOS-180nm.lib
+.include PMOS-180nm.lib
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m2 net-_m1-pad1_ net-_m2-pad2_ net-_m1-pad3_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m3 net-_m1-pad1_ net-_m3-pad2_ net-_m1-pad3_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m13 net-_m1-pad1_ net-_m13-pad2_ net-_m1-pad3_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m14 net-_m1-pad1_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m15 net-_m1-pad1_ net-_m15-pad2_ net-_m1-pad3_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m16 net-_m1-pad1_ net-_m10-pad2_ net-_m1-pad3_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m17 net-_m1-pad1_ net-_m11-pad2_ net-_m1-pad3_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m4 net-_m1-pad3_ net-_m1-pad2_ net-_m4-pad3_ net-_m4-pad3_ CMOSN W=100u L=100u M=1
+m5 net-_m4-pad3_ net-_m2-pad2_ net-_m5-pad3_ net-_m5-pad3_ CMOSN W=100u L=100u M=1
+m6 net-_m5-pad3_ net-_m3-pad2_ net-_m6-pad3_ net-_m6-pad3_ CMOSN W=100u L=100u M=1
+m7 net-_m6-pad3_ net-_m13-pad2_ net-_m7-pad3_ net-_m7-pad3_ CMOSN W=100u L=100u M=1
+m8 net-_m7-pad3_ net-_m14-pad2_ net-_m8-pad3_ net-_m8-pad3_ CMOSN W=100u L=100u M=1
+m9 net-_m8-pad3_ net-_m15-pad2_ net-_m10-pad1_ net-_m10-pad1_ CMOSN W=100u L=100u M=1
+m10 net-_m10-pad1_ net-_m10-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1
+m11 net-_m10-pad3_ net-_m11-pad2_ net-_m11-pad3_ net-_m11-pad3_ CMOSN W=100u L=100u M=1
+m12 net-_m11-pad3_ net-_m12-pad2_ net-_m12-pad3_ net-_m12-pad3_ CMOSN W=100u L=100u M=1
+m18 net-_m1-pad1_ net-_m12-pad2_ net-_m1-pad3_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+* Control Statements
+
+.ends 9_NAND
\ No newline at end of file |