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| author | Aditya Minocha | 2024-08-25 20:34:12 +0530 |
|---|---|---|
| committer | GitHub | 2024-08-25 20:34:12 +0530 |
| commit | fc5760e7cc8c4f415c9b4390dcf7d3879d24f973 (patch) | |
| tree | 02979e8268973da8383228c8faf35c7fe4eca309 /library/SubcircuitLibrary/MC1455B_IC/MC1455B_IC.cir.out | |
| parent | 80c18ab21a75c2193fe867f6fc8ac23bbb559d59 (diff) | |
| download | eSim-fc5760e7cc8c4f415c9b4390dcf7d3879d24f973.tar.gz eSim-fc5760e7cc8c4f415c9b4390dcf7d3879d24f973.tar.bz2 eSim-fc5760e7cc8c4f415c9b4390dcf7d3879d24f973.zip | |
MC1455B IC - Monolithic Timer
Diffstat (limited to 'library/SubcircuitLibrary/MC1455B_IC/MC1455B_IC.cir.out')
| -rw-r--r-- | library/SubcircuitLibrary/MC1455B_IC/MC1455B_IC.cir.out | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/MC1455B_IC/MC1455B_IC.cir.out b/library/SubcircuitLibrary/MC1455B_IC/MC1455B_IC.cir.out new file mode 100644 index 00000000..0e208d7a --- /dev/null +++ b/library/SubcircuitLibrary/MC1455B_IC/MC1455B_IC.cir.out @@ -0,0 +1,26 @@ +* c:\users\aditya\esim-workspace\mc1455b_ic\mc1455b_ic.cir
+
+.include MC1455B_ic1.sub
+r2 out gnd 1k
+r3 in net-_r1-pad1_ 5.1k
+c1 net-_c1-pad1_ gnd 0.01u
+c2 vcap gnd 0.1u
+r1 net-_r1-pad1_ vcap 100.9k
+v1 in gnd dc 15
+x1 gnd vcap out in net-_c1-pad1_ vcap net-_r1-pad1_ in MC1455B_ic1
+r4 in out 1k
+* u1 in plot_v1
+* u2 out plot_v1
+* u3 vcap plot_v1
+.tran 0.01e-03 50e-03 0e-03
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+plot v(in)
+plot v(out)
+plot v(vcap)
+.endc
+.end
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