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| author | Aditya Minocha | 2024-08-25 21:58:26 +0530 |
|---|---|---|
| committer | GitHub | 2024-08-25 21:58:26 +0530 |
| commit | 7b98810d458d8cf7a68ff62831ab8ea1cc5846f8 (patch) | |
| tree | 68cabb9841a619ecc0280dde27f0be7b3ba39d0f /library/SubcircuitLibrary/Logic_Gates/Logic_Gates.proj | |
| parent | e8f999d879320df46aaec04605cb92ff06ad4809 (diff) | |
| download | eSim-7b98810d458d8cf7a68ff62831ab8ea1cc5846f8.tar.gz eSim-7b98810d458d8cf7a68ff62831ab8ea1cc5846f8.tar.bz2 eSim-7b98810d458d8cf7a68ff62831ab8ea1cc5846f8.zip | |
Logic Gates
Diffstat (limited to 'library/SubcircuitLibrary/Logic_Gates/Logic_Gates.proj')
| -rw-r--r-- | library/SubcircuitLibrary/Logic_Gates/Logic_Gates.proj | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/Logic_Gates/Logic_Gates.proj b/library/SubcircuitLibrary/Logic_Gates/Logic_Gates.proj new file mode 100644 index 00000000..3ccc4e8d --- /dev/null +++ b/library/SubcircuitLibrary/Logic_Gates/Logic_Gates.proj @@ -0,0 +1 @@ +schematicFile Logic_Gates.sch
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