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author | Aditya Minocha | 2024-08-25 20:32:50 +0530 |
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committer | GitHub | 2024-08-25 20:32:50 +0530 |
commit | 80c18ab21a75c2193fe867f6fc8ac23bbb559d59 (patch) | |
tree | 95612eb2768daab4be47b5e57c9cdd09e7621461 /library/SubcircuitLibrary/LOG_100/LOG_100.cir | |
parent | 55568c864d1f19971c15c27df999ea161a07f366 (diff) | |
download | eSim-80c18ab21a75c2193fe867f6fc8ac23bbb559d59.tar.gz eSim-80c18ab21a75c2193fe867f6fc8ac23bbb559d59.tar.bz2 eSim-80c18ab21a75c2193fe867f6fc8ac23bbb559d59.zip |
LOG100 IC - Logarithmic Amplifier
Diffstat (limited to 'library/SubcircuitLibrary/LOG_100/LOG_100.cir')
-rw-r--r-- | library/SubcircuitLibrary/LOG_100/LOG_100.cir | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/LOG_100/LOG_100.cir b/library/SubcircuitLibrary/LOG_100/LOG_100.cir new file mode 100644 index 00000000..44aff7b4 --- /dev/null +++ b/library/SubcircuitLibrary/LOG_100/LOG_100.cir @@ -0,0 +1,22 @@ +* C:\Users\Aditya\eSim-Workspace\LOG_100\LOG_100.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 07/17/24 18:49:54
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+v1 Net-_X1-Pad6_ GND DC
+v2 Net-_X1-Pad9_ GND DC
+U4 OUT plot_db
+U3 OUT plot_v1
+R1 Net-_R1-Pad1_ GND 1000k
+U5 Net-_R3-Pad1_ I2 plot_i2
+U2 Net-_R2-Pad2_ I1 plot_i2
+v3 I1b GND DC
+v4 I2b GND DC
+R3 Net-_R3-Pad1_ I2b 10k
+R2 I1b Net-_R2-Pad2_ 10k
+X1 I1 Net-_R1-Pad1_ ? OUT ? Net-_X1-Pad6_ OUT ? Net-_X1-Pad9_ ? ? ? ? I2 LOG_100
+
+.end
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