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| author | Sumanto Kar | 2024-11-21 21:11:54 +0530 |
|---|---|---|
| committer | Sumanto Kar | 2024-11-21 21:11:54 +0530 |
| commit | ad9243230423e1f3dc80e70afc22069f2feee9de (patch) | |
| tree | 0cfbfe01a8af3336cce0aec91ff861ef70c27492 /library/SubcircuitLibrary/LM78L_Sub/LM78L_sub.cir.out | |
| parent | 74540c24f6bf95637b224a963e9f8170b7ac8942 (diff) | |
| download | eSim-ad9243230423e1f3dc80e70afc22069f2feee9de.tar.gz eSim-ad9243230423e1f3dc80e70afc22069f2feee9de.tar.bz2 eSim-ad9243230423e1f3dc80e70afc22069f2feee9de.zip | |
LM78L is a low-current positive voltage regulator
Diffstat (limited to 'library/SubcircuitLibrary/LM78L_Sub/LM78L_sub.cir.out')
| -rw-r--r-- | library/SubcircuitLibrary/LM78L_Sub/LM78L_sub.cir.out | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/LM78L_Sub/LM78L_sub.cir.out b/library/SubcircuitLibrary/LM78L_Sub/LM78L_sub.cir.out new file mode 100644 index 00000000..08bd6f0a --- /dev/null +++ b/library/SubcircuitLibrary/LM78L_Sub/LM78L_sub.cir.out @@ -0,0 +1,65 @@ +* c:\fossee\esim\library\subcircuitlibrary\lm78l_sub\lm78l_sub.cir + +.include PNP.lib +.include NPN.lib +.include NJF.lib +r1 net-_j1-pad1_ net-_q2-pad3_ 418 +j1 net-_j1-pad1_ net-_j1-pad2_ net-_j1-pad3_ J2N3819 +q2 net-_q1-pad3_ net-_q1-pad1_ net-_q2-pad3_ Q2N2907A +q3 net-_q1-pad1_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A +q8 net-_q12-pad3_ net-_q1-pad1_ net-_j1-pad1_ Q2N2907A +q1 net-_q1-pad1_ net-_j1-pad3_ net-_q1-pad3_ Q2N2222 +q4 net-_q1-pad1_ net-_q1-pad3_ net-_q4-pad3_ Q2N2222 +r2 net-_q4-pad3_ net-_q7-pad2_ 576 +q7 net-_q7-pad1_ net-_q7-pad2_ net-_q4-pad3_ Q2N2907A +r3 net-_q7-pad2_ net-_r3-pad2_ 3.41k +* u1 ? net-_j1-pad3_ zener +r4 net-_r3-pad2_ net-_q11-pad2_ 3.89k +q5 net-_q11-pad2_ net-_q11-pad2_ net-_q5-pad3_ Q2N2222 +q6 net-_q5-pad3_ net-_q5-pad3_ net-_j1-pad2_ Q2N2222 +* u2 net-_j1-pad2_ net-_q1-pad3_ zener +r5 net-_q7-pad1_ net-_j1-pad2_ 7.8k +q9 net-_q12-pad3_ net-_q7-pad1_ net-_j1-pad2_ Q2N2222 +q12 net-_j1-pad2_ net-_c1-pad1_ net-_q12-pad3_ Q2N2907A +r8 net-_q12-pad3_ net-_c1-pad1_ 5.76k +q10 net-_q10-pad1_ net-_q10-pad2_ net-_q10-pad3_ Q2N2222 +q13 net-_c1-pad1_ net-_c1-pad2_ net-_q10-pad3_ Q2N2222 +r6 net-_q10-pad2_ net-_r3-pad2_ 13k +q14 net-_q12-pad3_ net-_q14-pad2_ net-_q14-pad3_ Q2N2222 +r9 net-_q14-pad3_ net-_r13-pad1_ 100 +* u4 net-_q14-pad2_ net-_r10-pad1_ zener +r11 net-_q16-pad3_ net-_q14-pad2_ 100 +q15 net-_j1-pad1_ net-_q12-pad3_ net-_q10-pad1_ Q2N2222 +r13 net-_r13-pad1_ net-_q10-pad1_ 2.5k +q16 net-_j1-pad1_ net-_q10-pad1_ net-_q16-pad3_ Q2N2222 +r14 net-_r13-pad1_ net-_q16-pad3_ 1.9 +r10 net-_r10-pad1_ net-_r10-pad2_ 5k +* u3 net-_r10-pad2_ net-_j1-pad1_ zener +q11 net-_q10-pad3_ net-_q11-pad2_ net-_q11-pad3_ Q2N2222 +r7 net-_q11-pad3_ net-_j1-pad2_ 2.84k +c1 net-_c1-pad1_ net-_c1-pad2_ 5pf +r12 net-_r12-pad1_ net-_c1-pad2_ 15k +r15 net-_r12-pad1_ net-_r13-pad1_ 1.5k +r16 net-_j1-pad2_ net-_r12-pad1_ 2.23k +* u5 net-_j1-pad1_ net-_r13-pad1_ net-_j1-pad2_ port +a1 ? net-_j1-pad3_ u1 +a2 net-_j1-pad2_ net-_q1-pad3_ u2 +a3 net-_q14-pad2_ net-_r10-pad1_ u4 +a4 net-_r10-pad2_ net-_j1-pad1_ u3 +* Schematic Name: zener, NgSpice Name: zener +.model u1 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u2 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u4 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +.tran 0.01e-00 0.1e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |