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| author | Sumanto Kar | 2024-11-19 13:31:58 +0530 |
|---|---|---|
| committer | Sumanto Kar | 2024-11-19 13:35:37 +0530 |
| commit | a53a8fcfcc45bc6291f47ae58e881f777db5a4a4 (patch) | |
| tree | beeae6feead8f4f3ae5bb12f9262865572c68976 /library/SubcircuitLibrary/LM340_12V_SUB/LM340_12V-PORT.cir.out | |
| parent | 5bff51121c3b88eac80080d399e7112987f6b50e (diff) | |
| download | eSim-a53a8fcfcc45bc6291f47ae58e881f777db5a4a4.tar.gz eSim-a53a8fcfcc45bc6291f47ae58e881f777db5a4a4.tar.bz2 eSim-a53a8fcfcc45bc6291f47ae58e881f777db5a4a4.zip | |
LM340 12V is a 12V positive voltage regulator
Diffstat (limited to 'library/SubcircuitLibrary/LM340_12V_SUB/LM340_12V-PORT.cir.out')
| -rw-r--r-- | library/SubcircuitLibrary/LM340_12V_SUB/LM340_12V-PORT.cir.out | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/LM340_12V_SUB/LM340_12V-PORT.cir.out b/library/SubcircuitLibrary/LM340_12V_SUB/LM340_12V-PORT.cir.out new file mode 100644 index 00000000..ca1caa1f --- /dev/null +++ b/library/SubcircuitLibrary/LM340_12V_SUB/LM340_12V-PORT.cir.out @@ -0,0 +1,64 @@ +* c:\fossee2\esim\library\subcircuitlibrary\lm340_12v-port\lm340_12v-port.cir + +.include PNP.lib +.include NPN.lib +r1 net-_q1-pad1_ net-_q1-pad2_ 80k +* u2 net-_q16-pad3_ net-_q1-pad2_ zener +q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ Q2N2222 +r2 net-_q1-pad3_ net-_q3-pad2_ 7k +r3 net-_q3-pad2_ net-_q2-pad2_ 4.97k +r4 net-_q2-pad2_ net-_q16-pad3_ 830 +q2 net-_q12-pad1_ net-_q2-pad2_ net-_q16-pad3_ Q2N2222 +q3 net-_q3-pad1_ net-_q3-pad2_ net-_q3-pad3_ Q2N2222 +r5 net-_q3-pad3_ net-_q7-pad3_ 500 +q5 net-_q3-pad1_ net-_q1-pad3_ net-_q5-pad3_ Q2N2222 +q7 net-_q5-pad3_ net-_q13-pad2_ net-_q7-pad3_ Q2N2222 +q8 net-_q7-pad3_ net-_q8-pad2_ net-_c1-pad2_ Q2N2222 +q4 net-_q3-pad1_ net-_q3-pad1_ net-_q1-pad1_ Q2N2907A +q6 net-_q12-pad1_ net-_q3-pad1_ net-_q1-pad1_ Q2N2907A +r6 net-_c1-pad2_ net-_q16-pad3_ 1.2k +r7 net-_q7-pad3_ net-_q8-pad2_ 1.9k +r8 net-_q8-pad2_ net-_c1-pad1_ 26 +q9 net-_c1-pad1_ net-_c1-pad2_ net-_q16-pad3_ Q2N2222 +c1 net-_c1-pad1_ net-_c1-pad2_ 4p +q10 net-_q10-pad1_ net-_c1-pad1_ net-_q10-pad3_ Q2N2222 +r9 net-_q10-pad3_ net-_q16-pad3_ 12.1k +q11 net-_c2-pad2_ net-_q10-pad3_ net-_q11-pad3_ Q2N2222 +r12 net-_q11-pad3_ net-_q16-pad3_ 1k +r11 net-_q10-pad1_ net-_c2-pad2_ 16.5k +q13 net-_q13-pad1_ net-_q13-pad2_ net-_q10-pad1_ Q2N2222 +r10 net-_q12-pad3_ net-_r10-pad2_ 100 +q12 net-_q12-pad1_ net-_q12-pad2_ net-_q12-pad3_ Q2N2222 +r14 net-_q1-pad1_ net-_r14-pad2_ 16k +* u3 net-_q12-pad2_ net-_r14-pad2_ zener +r15 net-_q12-pad2_ net-_q19-pad3_ 380 +q17 net-_q1-pad1_ net-_q12-pad1_ net-_q13-pad1_ Q2N2222 +q19 net-_q1-pad1_ net-_q13-pad1_ net-_q19-pad3_ Q2N2222 +r18 net-_q13-pad1_ net-_q12-pad2_ 1.62k +r19 net-_q19-pad3_ net-_r10-pad2_ 0.25 +r20 net-_r10-pad2_ net-_q13-pad2_ 7.2k +q14 net-_c2-pad1_ net-_c2-pad2_ net-_q14-pad3_ Q2N2222 +q15 net-_q14-pad3_ net-_q14-pad3_ net-_q15-pad3_ Q2N2222 +r13 net-_q15-pad3_ net-_q16-pad3_ 4k +c2 net-_c2-pad1_ net-_c2-pad2_ 20p +q16 net-_c2-pad1_ net-_q14-pad3_ net-_q16-pad3_ Q2N2222 +r17 net-_q18-pad3_ net-_c2-pad1_ 4k +r16 net-_q12-pad1_ net-_q18-pad3_ 850 +q18 net-_q16-pad3_ net-_c2-pad1_ net-_q18-pad3_ Q2N2907A +r21 net-_q13-pad2_ net-_q16-pad3_ 2.67k +* u1 net-_q16-pad3_ net-_q1-pad1_ net-_r10-pad2_ port +a1 net-_q16-pad3_ net-_q1-pad2_ u2 +a2 net-_q12-pad2_ net-_r14-pad2_ u3 +* Schematic Name: zener, NgSpice Name: zener +.model u2 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +* Schematic Name: zener, NgSpice Name: zener +.model u3 zener(v_breakdown=5.6 i_breakdown=2.0e-2 i_sat=1.0e-12 n_forward=1.0 limit_switch=FALSE ) +.tran 10e-03 100e-03 0e-03 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |