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author | Aditya Minocha | 2024-08-25 21:57:05 +0530 |
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committer | GitHub | 2024-08-25 21:57:05 +0530 |
commit | e8f999d879320df46aaec04605cb92ff06ad4809 (patch) | |
tree | 8302564ddbd31c0b63eda373db82c6de34c1b5de /library/SubcircuitLibrary/Flip_Flops/D_FF.cir.out | |
parent | 64a830500ffbadd67c42d008e68c52dfdc6f28d2 (diff) | |
download | eSim-e8f999d879320df46aaec04605cb92ff06ad4809.tar.gz eSim-e8f999d879320df46aaec04605cb92ff06ad4809.tar.bz2 eSim-e8f999d879320df46aaec04605cb92ff06ad4809.zip |
Flip Flops
Diffstat (limited to 'library/SubcircuitLibrary/Flip_Flops/D_FF.cir.out')
-rw-r--r-- | library/SubcircuitLibrary/Flip_Flops/D_FF.cir.out | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/Flip_Flops/D_FF.cir.out b/library/SubcircuitLibrary/Flip_Flops/D_FF.cir.out new file mode 100644 index 00000000..1dc94a57 --- /dev/null +++ b/library/SubcircuitLibrary/Flip_Flops/D_FF.cir.out @@ -0,0 +1,40 @@ +* c:\fossee\esim\library\subcircuitlibrary\d_ff\d_ff.cir
+
+.include NAND.sub
+.include NOT.sub
+.include PMOS-180nm.lib
+.include NMOS-180nm.lib
+x1 net-_u1-pad2_ net-_x1-pad2_ net-_u1-pad6_ net-_u1-pad5_ NOT
+x5 net-_x1-pad2_ net-_x10-pad1_ net-_u1-pad6_ net-_u1-pad5_ NOT
+x9 net-_m1-pad1_ net-_x16-pad2_ net-_m5-pad3_ net-_u1-pad6_ net-_u1-pad5_ NAND
+x10 net-_x10-pad1_ net-_m5-pad3_ net-_m3-pad1_ net-_u1-pad6_ net-_u1-pad5_ NAND
+x11 net-_x10-pad1_ net-_m5-pad1_ net-_x11-pad3_ net-_u1-pad6_ net-_u1-pad5_ NAND
+x16 net-_x11-pad3_ net-_x16-pad2_ net-_m7-pad1_ net-_u1-pad6_ net-_u1-pad5_ NAND
+x2 net-_u1-pad3_ net-_x2-pad2_ net-_u1-pad6_ net-_u1-pad5_ NOT
+x6 net-_x2-pad2_ net-_m1-pad3_ net-_u1-pad6_ net-_u1-pad5_ NOT
+x3 net-_u1-pad4_ net-_x3-pad2_ net-_u1-pad6_ net-_u1-pad5_ NOT
+x7 net-_x3-pad2_ net-_x16-pad2_ net-_u1-pad6_ net-_u1-pad5_ NOT
+m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad1_ CMOSP W=100u L=100u M=1
+m2 net-_m1-pad1_ net-_m2-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSN W=100u L=100u M=1
+m3 net-_m3-pad1_ net-_m2-pad2_ net-_m1-pad1_ net-_m3-pad1_ CMOSP W=100u L=100u M=1
+m4 net-_m3-pad1_ net-_m1-pad2_ net-_m1-pad1_ net-_m1-pad1_ CMOSN W=100u L=100u M=1
+m5 net-_m5-pad1_ net-_m2-pad2_ net-_m5-pad3_ net-_m5-pad1_ CMOSP W=100u L=100u M=1
+m6 net-_m5-pad1_ net-_m1-pad2_ net-_m5-pad3_ net-_m5-pad3_ CMOSN W=100u L=100u M=1
+m7 net-_m7-pad1_ net-_m1-pad2_ net-_m5-pad1_ net-_m7-pad1_ CMOSP W=100u L=100u M=1
+m8 net-_m7-pad1_ net-_m2-pad2_ net-_m5-pad1_ net-_m5-pad1_ CMOSN W=100u L=100u M=1
+x12 net-_x11-pad3_ net-_x12-pad2_ net-_u1-pad6_ net-_u1-pad5_ NOT
+x14 net-_x12-pad2_ net-_u1-pad7_ net-_u1-pad6_ net-_u1-pad5_ NOT
+x13 net-_m7-pad1_ net-_x13-pad2_ net-_u1-pad6_ net-_u1-pad5_ NOT
+x15 net-_x13-pad2_ net-_u1-pad8_ net-_u1-pad6_ net-_u1-pad5_ NOT
+x4 net-_u1-pad1_ net-_m2-pad2_ net-_u1-pad6_ net-_u1-pad5_ NOT
+x8 net-_m2-pad2_ net-_m1-pad2_ net-_u1-pad6_ net-_u1-pad5_ NOT
+* u1 net-_u1-pad1_ net-_u1-pad2_ net-_u1-pad3_ net-_u1-pad4_ net-_u1-pad5_ net-_u1-pad6_ net-_u1-pad7_ net-_u1-pad8_ port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
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