Merge branch 'master' into sky130-dev

20 files changed, 1541 insertions, 0 deletions

diff --git a/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106-cache.lib b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106-cache.lib
new file mode 100644
index 00000000..d1bbdfdd
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106-cache.lib
@@ -0,0 +1,83 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 -50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+ALIAS resistor
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+# lm_741
+#
+DEF lm_741 X 0 40 Y Y 1 F N
+F0 "X" -200 0 60 H V C CNN
+F1 "lm_741" -100 -250 60 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+P 4 0 1 0 -350 350 350 0 -350 -350 -350 350 N
+X off_null 1 -50 400 200 D 50 38 1 1 I
+X inv 2 -550 150 200 R 50 38 1 1 I
+X non_inv 3 -550 -100 200 R 50 38 1 1 I
+X v_neg 4 -150 -450 200 U 50 38 1 1 I
+X off_null 5 50 350 200 D 50 38 1 1 I
+X out 6 550 0 200 L 50 38 1 1 O
+X v_pos 7 -150 450 200 D 50 38 1 1 I
+X NC 8 150 -300 200 U 50 38 1 1 N
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.cir b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.cir
new file mode 100644
index 00000000..ca9bf959
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.cir
@@ -0,0 +1,16 @@
+* C:\FOSSEE\eSim\library\SubcircuitLibrary\Diffamp_INA106\Diffamp_INA106.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 7/20/2022 1:33:22 PM
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+X1  ? Net-_R1-Pad2_ Net-_R2-Pad2_ /V- ? /Output /V+ ? lm_741		
+R1  /-IN Net-_R1-Pad2_ 100k		
+R2  /+IN Net-_R2-Pad2_ 100k		
+R4  Net-_R1-Pad2_ /Sense 10k		
+R3  Net-_R2-Pad2_ /REF 10k		
+U1  /REF /-IN /+IN /V- /Sense /Output /V+ ? PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.cir.out b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.cir.out
new file mode 100644
index 00000000..464817c3
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.cir.out
@@ -0,0 +1,18 @@
+* c:\fossee\esim\library\subcircuitlibrary\diffamp_ina106\diffamp_ina106.cir
+
+.include lm_741.sub
+x1 ? net-_r1-pad2_ net-_r2-pad2_ /v- ? /output /v+ ? lm_741
+r1  /-in net-_r1-pad2_ 100k
+r2  /+in net-_r2-pad2_ 100k
+r4  net-_r1-pad2_ /sense 10k
+r3  net-_r2-pad2_ /ref 10k
+* u1  /ref /-in /+in /v- /sense /output /v+ ? port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.pro b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.pro
new file mode 100644
index 00000000..d7f78c3b
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.pro
@@ -0,0 +1,71 @@
+update=22/05/2015 07:44:53
+version=1
+last_client=kicad
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=adc-dac
+LibName2=memory
+LibName3=xilinx
+LibName4=microcontrollers
+LibName5=dsp
+LibName6=microchip
+LibName7=analog_switches
+LibName8=motorola
+LibName9=texas
+LibName10=intel
+LibName11=audio
+LibName12=interface
+LibName13=digital-audio
+LibName14=philips
+LibName15=display
+LibName16=cypress
+LibName17=siliconi
+LibName18=opto
+LibName19=atmel
+LibName20=contrib
+LibName21=power
+LibName22=eSim_Plot
+LibName23=transistors
+LibName24=conn
+LibName25=eSim_User
+LibName26=regul
+LibName27=74xx
+LibName28=cmos4000
+LibName29=eSim_Analog
+LibName30=eSim_Devices
+LibName31=eSim_Digital
+LibName32=eSim_Hybrid
+LibName33=eSim_Miscellaneous
+LibName34=eSim_Power
+LibName35=eSim_Sources
+LibName36=eSim_Subckt
+LibName37=eSim_Nghdl
+LibName38=eSim_Ngveri
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.sch b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.sch
new file mode 100644
index 00000000..19e9c3bb
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.sch
@@ -0,0 +1,247 @@
+EESchema Schematic File Version 2
+LIBS:adc-dac
+LIBS:memory
+LIBS:xilinx
+LIBS:microcontrollers
+LIBS:dsp
+LIBS:microchip
+LIBS:analog_switches
+LIBS:motorola
+LIBS:texas
+LIBS:intel
+LIBS:audio
+LIBS:interface
+LIBS:digital-audio
+LIBS:philips
+LIBS:display
+LIBS:cypress
+LIBS:siliconi
+LIBS:opto
+LIBS:atmel
+LIBS:contrib
+LIBS:power
+LIBS:eSim_Plot
+LIBS:transistors
+LIBS:conn
+LIBS:eSim_User
+LIBS:regul
+LIBS:74xx
+LIBS:cmos4000
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Power
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_Nghdl
+LIBS:eSim_Ngveri
+LIBS:Diffamp_INA106-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L lm_741 X1
+U 1 1 62D11E03
+P 5050 3650
+F 0 "X1" H 4850 3650 60  0000 C CNN
+F 1 "lm_741" H 4950 3400 60  0000 C CNN
+F 2 "" H 5050 3650 60  0000 C CNN
+F 3 "" H 5050 3650 60  0000 C CNN
+	1    5050 3650
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R1
+U 1 1 62D11E04
+P 3450 3550
+F 0 "R1" H 3500 3680 50  0000 C CIB
+F 1 "100k" H 3500 3500 50  0000 C CNN
+F 2 "" H 3500 3530 30  0000 C CNN
+F 3 "" V 3500 3600 30  0000 C CNN
+	1    3450 3550
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R2
+U 1 1 62D11E05
+P 3450 3800
+F 0 "R2" H 3500 3930 50  0000 C CIB
+F 1 "100k" H 3500 3750 50  0000 C CNN
+F 2 "" H 3500 3780 30  0000 C CNN
+F 3 "" V 3500 3850 30  0000 C CNN
+	1    3450 3800
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R4
+U 1 1 62D11E06
+P 5300 3050
+F 0 "R4" H 5350 3180 50  0000 C CIB
+F 1 "10k" H 5350 3000 50  0000 C CNN
+F 2 "" H 5350 3030 30  0000 C CNN
+F 3 "" V 5350 3100 30  0000 C CNN
+	1    5300 3050
+	1    0    0    -1  
+$EndComp
+$Comp
+L resistor R3
+U 1 1 62D11E07
+P 4200 4400
+F 0 "R3" H 4250 4530 50  0000 C CIB
+F 1 "10k" H 4250 4350 50  0000 C CNN
+F 2 "" H 4250 4380 30  0000 C CNN
+F 3 "" V 4250 4450 30  0000 C CNN
+	1    4200 4400
+	0    1    1    0   
+$EndComp
+Wire Wire Line
+	5500 3000 6650 3000
+Wire Wire Line
+	3650 3750 4500 3750
+Wire Wire Line
+	3650 3500 4500 3500
+Wire Wire Line
+	4900 4100 4900 4350
+Wire Wire Line
+	4250 3000 5200 3000
+Wire Wire Line
+	4250 3000 4250 3500
+Connection ~ 4250 3500
+Wire Wire Line
+	4250 4300 4250 3750
+Connection ~ 4250 3750
+Wire Wire Line
+	4800 3150 4900 3150
+Wire Wire Line
+	4900 3150 4900 3200
+Wire Wire Line
+	2700 3500 3350 3500
+Wire Wire Line
+	2700 3750 3350 3750
+Wire Wire Line
+	3750 4650 4250 4650
+Wire Wire Line
+	4250 4650 4250 4600
+Text Label 2900 3500 0    60   Italic 0
+-IN
+Text Label 2900 3750 0    60   Italic 0
++IN
+Text Label 4850 3150 0    60   ~ 12
+V+
+Text Label 4900 4200 0    60   ~ 12
+V-
+Text Label 6350 3000 0    60   ~ 0
+Sense
+Text Label 3900 4650 0    60   ~ 0
+REF
+Text Label 6350 3650 0    49   Italic 0
+Output
+NoConn ~ 5000 3250
+NoConn ~ 5100 3300
+Wire Wire Line
+	4900 4350 4850 4350
+$Comp
+L PORT U1
+U 3 1 62D11F12
+P 2450 3750
+F 0 "U1" H 2500 3850 30  0000 C CNN
+F 1 "PORT" H 2450 3750 30  0000 C CNN
+F 2 "" H 2450 3750 60  0000 C CNN
+F 3 "" H 2450 3750 60  0000 C CNN
+	3    2450 3750
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 1 1 62D11F93
+P 3500 4650
+F 0 "U1" H 3550 4750 30  0000 C CNN
+F 1 "PORT" H 3500 4650 30  0000 C CNN
+F 2 "" H 3500 4650 60  0000 C CNN
+F 3 "" H 3500 4650 60  0000 C CNN
+	1    3500 4650
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 62D1202E
+P 2450 3500
+F 0 "U1" H 2500 3600 30  0000 C CNN
+F 1 "PORT" H 2450 3500 30  0000 C CNN
+F 2 "" H 2450 3500 60  0000 C CNN
+F 3 "" H 2450 3500 60  0000 C CNN
+	2    2450 3500
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 5 1 62D12099
+P 6900 3000
+F 0 "U1" H 6950 3100 30  0000 C CNN
+F 1 "PORT" H 6900 3000 30  0000 C CNN
+F 2 "" H 6900 3000 60  0000 C CNN
+F 3 "" H 6900 3000 60  0000 C CNN
+	5    6900 3000
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 7 1 62D12114
+P 4550 3150
+F 0 "U1" H 4600 3250 30  0000 C CNN
+F 1 "PORT" H 4550 3150 30  0000 C CNN
+F 2 "" H 4550 3150 60  0000 C CNN
+F 3 "" H 4550 3150 60  0000 C CNN
+	7    4550 3150
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 8 1 62D121A7
+P 6200 4250
+F 0 "U1" H 6250 4350 30  0000 C CNN
+F 1 "PORT" H 6200 4250 30  0000 C CNN
+F 2 "" H 6200 4250 60  0000 C CNN
+F 3 "" H 6200 4250 60  0000 C CNN
+	8    6200 4250
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 4 1 62D121EE
+P 4600 4350
+F 0 "U1" H 4650 4450 30  0000 C CNN
+F 1 "PORT" H 4600 4350 30  0000 C CNN
+F 2 "" H 4600 4350 60  0000 C CNN
+F 3 "" H 4600 4350 60  0000 C CNN
+	4    4600 4350
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 6 1 62D1221F
+P 6900 3650
+F 0 "U1" H 6950 3750 30  0000 C CNN
+F 1 "PORT" H 6900 3650 30  0000 C CNN
+F 2 "" H 6900 3650 60  0000 C CNN
+F 3 "" H 6900 3650 60  0000 C CNN
+	6    6900 3650
+	-1   0    0    1   
+$EndComp
+NoConn ~ 5950 4250
+Wire Wire Line
+	5600 3650 6650 3650
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.sub b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.sub
new file mode 100644
index 00000000..18c305cf
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106.sub
@@ -0,0 +1,12 @@
+* Subcircuit Diffamp_INA106
+.subckt Diffamp_INA106 /ref /-in /+in /v- /sense /output /v+ ? 
+* c:\fossee\esim\library\subcircuitlibrary\diffamp_ina106\diffamp_ina106.cir
+.include lm_741.sub
+x1 ? net-_r1-pad2_ net-_r2-pad2_ /v- ? /output /v+ ? lm_741
+r1  /-in net-_r1-pad2_ 100k
+r2  /+in net-_r2-pad2_ 100k
+r4  net-_r1-pad2_ /sense 10k
+r3  net-_r2-pad2_ /ref 10k
+* Control Statements
+
+.ends Diffamp_INA106
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106_Previous_Values.xml b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106_Previous_Values.xml
new file mode 100644
index 00000000..a7f22b8a
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/Diffamp_INA106_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel /><subcircuit><x1><field>C:\FOSSEE\eSim\library\SubcircuitLibrary\lm_741</field></x1></subcircuit><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/NPN.lib b/library/SubcircuitLibrary/Diffamp_INA106/NPN.lib
new file mode 100644
index 00000000..6509fe7a
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/NPN.lib
@@ -0,0 +1,4 @@
+.model Q2N2222  NPN( Is=14.34f Xti=3 Eg=1.11 Vaf=74.03 Bf=400 Ne=1.307 
++ Ise=14.34f Ikf=.2847 Xtb=1.5 Br=6.092 Nc=2 Isc=0 Ikr=0 Rc=1 Cjc=7.306p 
++ Mjc=.3416 Vjc=.75 Fc=.5 Cje=22.01p Mje=.377 Vje=.75 Tr=46.91n Tf=411.1p 
++ Itf=.6 Vtf=1.7 Xtf=3 Rb=10) 
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/PNP.lib b/library/SubcircuitLibrary/Diffamp_INA106/PNP.lib
new file mode 100644
index 00000000..7edda0ea
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/PNP.lib
@@ -0,0 +1,4 @@
+.model Q2N2907A PNP(Is=650.6E-18 Xti=3 Eg=1.11 Vaf=115.7 Bf=231.7 Ne=1.829
++		Ise=54.81f Ikf=1.079 Xtb=1.5 Br=3.563 Nc=2 Isc=0 Ikr=0 Rc=.715
++		Cjc=14.76p Mjc=.5383 Vjc=.75 Fc=.5 Cje=19.82p Mje=.3357 Vje=.75
++		Tr=111.3n Tf=603.7p Itf=.65 Vtf=5 Xtf=1.7 Rb=10)
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/README.md b/library/SubcircuitLibrary/Diffamp_INA106/README.md
new file mode 100644
index 00000000..e95e5fc5
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/README.md
@@ -0,0 +1,36 @@
+
+## Differential Amplifier IC
+
+Differential Amplifier is a type of amplifier circuit which is used to amplify the difference of input and give the output respectively. It is used to remove noise which is present in input signal.
+
+## Usage/Examples
+
+It is used in Amplitude Modulation.
+
+It is used in Audio Amplifier for exact and noiseless volume control.
+
+It is used in Digital and Analog data transmission system for noise cancellation.
+
+It is used for audio and video processing.
+
+It is used as an automatic gain control circuit.
+
+It is used as an electronic switch.
+
+It is used for motor control.
+
+
+## Documentation
+
+To know the details of INA106 Differential Amplifier IC please refer to this link [INA106_Differential_Amplifier_datasheet.](https://www.ti.com/lit/ds/symlink/ina106.pdf?ts=1659516896123&ref_url=https%253A%252F%252Fwww.google.co.in%252F)
+
+## Comments/Notes
+
+Please note this is a complete analog IC. It works fine at the time of simulation.
+
+## Contributor
+
+Name: Vanshika Tanwar 
+Email: vanshikatanwar30@gmail.com  
+Year: 2022  
+Position: FOSSEE Summer Fellowship Intern 2022
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/analysis b/library/SubcircuitLibrary/Diffamp_INA106/analysis
new file mode 100644
index 00000000..ebd5c0a9
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/analysis
@@ -0,0 +1 @@
+.tran 0e-00 0e-00 0e-00
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/lm_741-cache.lib b/library/SubcircuitLibrary/Diffamp_INA106/lm_741-cache.lib
new file mode 100644
index 00000000..04e3fecd
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/lm_741-cache.lib
@@ -0,0 +1,119 @@
+EESchema-LIBRARY Version 2.3
+#encoding utf-8
+#
+# PORT
+#
+DEF PORT U 0 40 Y Y 26 F N
+F0 "U" 50 100 30 H V C CNN
+F1 "PORT" 0 0 30 H V C CNN
+F2 "" 0 0 60 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+A 325 225 285 -1421 -1278 0 1 0 N 100 50 150 0
+A 376 -275 356 1294 1408 0 1 0 N 150 0 100 -50
+S -100 50 100 -50 0 1 0 N
+X ~ 1 250 0 100 L 30 30 1 1 B
+X ~ 2 250 0 100 L 30 30 2 1 B
+X ~ 3 250 0 100 L 30 30 3 1 B
+X ~ 4 250 0 100 L 30 30 4 1 B
+X ~ 5 250 0 100 L 30 30 5 1 B
+X ~ 6 250 0 100 L 30 30 6 1 B
+X ~ 7 250 0 100 L 30 30 7 1 B
+X ~ 8 250 0 100 L 30 30 8 1 B
+X ~ 9 250 0 100 L 30 30 9 1 B
+X ~ 10 250 0 100 L 30 30 10 1 B
+X ~ 11 250 0 100 L 30 30 11 1 B
+X ~ 12 250 0 100 L 30 30 12 1 B
+X ~ 13 250 0 100 L 30 30 13 1 B
+X ~ 14 250 0 100 L 30 30 14 1 B
+X ~ 15 250 0 100 L 30 30 15 1 B
+X ~ 16 250 0 100 L 30 30 16 1 B
+X ~ 17 250 0 100 L 30 30 17 1 B
+X ~ 18 250 0 100 L 30 30 18 1 B
+X ~ 19 250 0 100 L 30 30 19 1 B
+X ~ 20 250 0 100 L 30 30 20 1 B
+X ~ 21 250 0 100 L 30 30 21 1 B
+X ~ 22 250 0 100 L 30 30 22 1 B
+X ~ 23 250 0 100 L 30 30 23 1 B
+X ~ 24 250 0 100 L 30 30 24 1 B
+X ~ 25 250 0 100 L 30 30 25 1 B
+X ~ 26 250 0 100 L 30 30 26 1 B
+ENDDRAW
+ENDDEF
+#
+# eSim_C
+#
+DEF eSim_C C 0 10 N Y 1 F N
+F0 "C" 25 100 50 H V L CNN
+F1 "eSim_C" 25 -100 50 H V L CNN
+F2 "" 38 -150 30 H V C CNN
+F3 "" 0 0 60 H V C CNN
+$FPLIST
+ C_*
+$ENDFPLIST
+DRAW
+P 2 0 1 20  -80 -30  80 -30 N
+P 2 0 1 20  -80 30  80 30 N
+X ~ 1 0 150 110 D 40 40 1 1 P
+X ~ 2 0 -150 110 U 40 40 1 1 P
+ENDDRAW
+ENDDEF
+#
+# eSim_NPN
+#
+DEF eSim_NPN Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_NPN" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+ALIAS BC547 Q2N2222
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0  25 25  100 100 N
+P 3 0 1 0  25 -25  100 -100  100 -100 N
+P 3 0 1 20  25 75  25 -75  25 -75 N
+P 5 0 1 0  50 -70  70 -50  90 -90  50 -70  50 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_PNP
+#
+DEF eSim_PNP Q 0 0 Y N 1 F N
+F0 "Q" -100 50 50 H V R CNN
+F1 "eSim_PNP" -50 150 50 H V R CNN
+F2 "" 200 100 29 H V C CNN
+F3 "" 0 0 60 H V C CNN
+DRAW
+C 50 0 111 0 1 10 N
+P 2 0 1 0  25 25  100 100 N
+P 3 0 1 0  25 -25  100 -100  100 -100 N
+P 3 0 1 20  25 75  25 -75  25 -75 N
+P 5 0 1 0  90 -70  70 -90  50 -50  90 -70  90 -70 F
+X C 1 100 200 100 D 50 50 1 1 C
+X B 2 -200 0 225 R 50 50 1 1 I
+X E 3 100 -200 100 U 50 50 1 1 E
+ENDDRAW
+ENDDEF
+#
+# eSim_R
+#
+DEF eSim_R R 0 0 N Y 1 F N
+F0 "R" 50 130 50 H V C CNN
+F1 "eSim_R" 50 50 50 H V C CNN
+F2 "" 50 -20 30 H V C CNN
+F3 "" 50 50 30 V V C CNN
+$FPLIST
+ R_*
+ Resistor_*
+$ENDFPLIST
+DRAW
+S 150 10 -50 90 0 1 10 N
+X ~ 1 -100 50 50 R 60 60 1 1 P
+X ~ 2 200 50 50 L 60 60 1 1 P
+ENDDRAW
+ENDDEF
+#
+#End Library
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/lm_741.cir b/library/SubcircuitLibrary/Diffamp_INA106/lm_741.cir
new file mode 100644
index 00000000..4a5917ea
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/lm_741.cir
@@ -0,0 +1,43 @@
+* C:\Users\malli\eSim\src\SubcircuitLibrary\lm_741\lm_741.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 05/25/19 19:37:28
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+Q1  Net-_Q1-Pad1_ Net-_Q1-Pad2_ Net-_Q1-Pad3_ eSim_NPN		
+Q2  Net-_Q1-Pad1_ Net-_Q2-Pad2_ Net-_Q2-Pad3_ eSim_NPN		
+Q6  Net-_Q3-Pad2_ Net-_Q13-Pad1_ Net-_Q1-Pad3_ eSim_PNP		
+Q5  Net-_C1-Pad2_ Net-_Q13-Pad1_ Net-_Q2-Pad3_ eSim_PNP		
+Q3  Net-_Q10-Pad3_ Net-_Q3-Pad2_ Net-_Q3-Pad3_ eSim_NPN		
+Q4  Net-_Q1-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP		
+Q9  Net-_Q13-Pad1_ Net-_Q1-Pad1_ Net-_Q10-Pad3_ eSim_PNP		
+Q8  Net-_C1-Pad2_ Net-_Q3-Pad3_ Net-_Q8-Pad3_ eSim_NPN		
+Q7  Net-_Q3-Pad2_ Net-_Q3-Pad3_ Net-_Q7-Pad3_ eSim_NPN		
+R1  Net-_Q7-Pad3_ Net-_Q12-Pad3_ 1k		
+R2  Net-_Q3-Pad3_ Net-_Q12-Pad3_ 50k		
+R3  Net-_Q8-Pad3_ Net-_Q12-Pad3_ 1k		
+Q12  Net-_Q12-Pad1_ Net-_Q12-Pad1_ Net-_Q12-Pad3_ eSim_NPN		
+Q13  Net-_Q13-Pad1_ Net-_Q12-Pad1_ Net-_Q13-Pad3_ eSim_NPN		
+R4  Net-_Q13-Pad3_ Net-_Q12-Pad3_ 5k		
+R11  Net-_Q10-Pad1_ Net-_Q12-Pad1_ 39k		
+Q10  Net-_Q10-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP		
+Q11  Net-_C1-Pad1_ Net-_Q10-Pad1_ Net-_Q10-Pad3_ eSim_PNP		
+Q14  Net-_C1-Pad1_ Net-_Q14-Pad2_ Net-_Q14-Pad3_ eSim_NPN		
+R8  Net-_C1-Pad1_ Net-_Q14-Pad2_ 4.5k		
+R7  Net-_Q14-Pad3_ Net-_Q14-Pad2_ 7.5k		
+C1  Net-_C1-Pad1_ Net-_C1-Pad2_ 30p		
+Q16  Net-_Q14-Pad3_ Net-_C1-Pad2_ Net-_Q15-Pad2_ eSim_NPN		
+Q15  Net-_Q14-Pad3_ Net-_Q15-Pad2_ Net-_Q15-Pad3_ eSim_NPN		
+R5  Net-_Q15-Pad2_ Net-_Q12-Pad3_ 50k		
+R6  Net-_Q15-Pad3_ Net-_Q12-Pad3_ 50		
+Q17  Net-_C1-Pad2_ Net-_Q15-Pad3_ Net-_Q12-Pad3_ eSim_NPN		
+Q18  Net-_Q10-Pad3_ Net-_C1-Pad1_ Net-_Q18-Pad3_ eSim_NPN		
+Q20  Net-_C1-Pad1_ Net-_Q18-Pad3_ Net-_Q20-Pad3_ eSim_NPN		
+R9  Net-_Q18-Pad3_ Net-_Q20-Pad3_ 25		
+R10  Net-_Q20-Pad3_ Net-_Q19-Pad3_ 50		
+Q19  Net-_Q12-Pad3_ Net-_Q14-Pad3_ Net-_Q19-Pad3_ eSim_PNP		
+U1  Net-_Q7-Pad3_ Net-_Q2-Pad2_ Net-_Q1-Pad2_ Net-_Q12-Pad3_ Net-_Q8-Pad3_ Net-_Q20-Pad3_ Net-_Q10-Pad3_ ? PORT		
+
+.end
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/lm_741.cir.out b/library/SubcircuitLibrary/Diffamp_INA106/lm_741.cir.out
new file mode 100644
index 00000000..a00bd86a
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/lm_741.cir.out
@@ -0,0 +1,46 @@
+* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir
+
+.include npn_1.lib
+.include pnp_1.lib
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1
+q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1
+q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1
+q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1
+q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1
+q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1
+q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1
+r1  net-_q7-pad3_ net-_q12-pad3_ 1k
+r2  net-_q3-pad3_ net-_q12-pad3_ 50k
+r3  net-_q8-pad3_ net-_q12-pad3_ 1k
+q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1
+q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1
+r4  net-_q13-pad3_ net-_q12-pad3_ 5k
+r11  net-_q10-pad1_ net-_q12-pad1_ 39k
+q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1
+r8  net-_c1-pad1_ net-_q14-pad2_ 4.5k
+r7  net-_q14-pad3_ net-_q14-pad2_ 7.5k
+c1  net-_c1-pad1_ net-_c1-pad2_ 30p
+q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1
+q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1
+r5  net-_q15-pad2_ net-_q12-pad3_ 50k
+r6  net-_q15-pad3_ net-_q12-pad3_ 50
+q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1
+q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1
+q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1
+r9  net-_q18-pad3_ net-_q20-pad3_ 25
+r10  net-_q20-pad3_ net-_q19-pad3_ 50
+q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1
+* u1  net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? port
+.tran 0e-00 0e-00 0e-00
+
+* Control Statements 
+.control
+run
+print allv > plot_data_v.txt
+print alli > plot_data_i.txt
+.endc
+.end
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/lm_741.pro b/library/SubcircuitLibrary/Diffamp_INA106/lm_741.pro
new file mode 100644
index 00000000..b56de1b0
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/lm_741.pro
@@ -0,0 +1,44 @@
+update=Fri Jun  7 21:53:51 2019
+version=1
+last_client=eeschema
+[general]
+version=1
+RootSch=
+BoardNm=
+[pcbnew]
+version=1
+LastNetListRead=
+UseCmpFile=1
+PadDrill=0.600000000000
+PadDrillOvalY=0.600000000000
+PadSizeH=1.500000000000
+PadSizeV=1.500000000000
+PcbTextSizeV=1.500000000000
+PcbTextSizeH=1.500000000000
+PcbTextThickness=0.300000000000
+ModuleTextSizeV=1.000000000000
+ModuleTextSizeH=1.000000000000
+ModuleTextSizeThickness=0.150000000000
+SolderMaskClearance=0.000000000000
+SolderMaskMinWidth=0.000000000000
+DrawSegmentWidth=0.200000000000
+BoardOutlineThickness=0.100000000000
+ModuleOutlineThickness=0.150000000000
+[cvpcb]
+version=1
+NetIExt=net
+[eeschema]
+version=1
+LibDir=
+[eeschema/libraries]
+LibName1=power
+LibName2=eSim_Analog
+LibName3=eSim_Devices
+LibName4=eSim_Digital
+LibName5=eSim_Hybrid
+LibName6=eSim_Miscellaneous
+LibName7=eSim_Plot
+LibName8=eSim_Power
+LibName9=eSim_User
+LibName10=eSim_Sources
+LibName11=eSim_Subckt
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/lm_741.sch b/library/SubcircuitLibrary/Diffamp_INA106/lm_741.sch
new file mode 100644
index 00000000..b017fd2b
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/lm_741.sch
@@ -0,0 +1,697 @@
+EESchema Schematic File Version 2
+LIBS:power
+LIBS:eSim_Analog
+LIBS:eSim_Devices
+LIBS:eSim_Digital
+LIBS:eSim_Hybrid
+LIBS:eSim_Miscellaneous
+LIBS:eSim_Plot
+LIBS:eSim_Power
+LIBS:eSim_PSpice
+LIBS:eSim_Sources
+LIBS:eSim_Subckt
+LIBS:eSim_User
+LIBS:lm_741-cache
+EELAYER 25 0
+EELAYER END
+$Descr A4 11693 8268
+encoding utf-8
+Sheet 1 1
+Title ""
+Date ""
+Rev ""
+Comp ""
+Comment1 ""
+Comment2 ""
+Comment3 ""
+Comment4 ""
+$EndDescr
+$Comp
+L eSim_NPN Q1
+U 1 1 5CE90A7B
+P 2650 2700
+F 0 "Q1" H 2550 2750 50  0000 R CNN
+F 1 "eSim_NPN" H 2600 2850 50  0000 R CNN
+F 2 "" H 2850 2800 29  0000 C CNN
+F 3 "" H 2650 2700 60  0000 C CNN
+	1    2650 2700
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_NPN Q2
+U 1 1 5CE90A7C
+P 4300 2700
+F 0 "Q2" H 4200 2750 50  0000 R CNN
+F 1 "eSim_NPN" H 4250 2850 50  0000 R CNN
+F 2 "" H 4500 2800 29  0000 C CNN
+F 3 "" H 4300 2700 60  0000 C CNN
+	1    4300 2700
+	-1   0    0    -1  
+$EndComp
+$Comp
+L eSim_PNP Q6
+U 1 1 5CE90A7D
+P 3000 3200
+F 0 "Q6" H 2900 3250 50  0000 R CNN
+F 1 "eSim_PNP" H 2950 3350 50  0000 R CNN
+F 2 "" H 3200 3300 29  0000 C CNN
+F 3 "" H 3000 3200 60  0000 C CNN
+	1    3000 3200
+	-1   0    0    1   
+$EndComp
+$Comp
+L eSim_PNP Q5
+U 1 1 5CE90A7E
+P 3950 3200
+F 0 "Q5" H 3850 3250 50  0000 R CNN
+F 1 "eSim_PNP" H 3900 3350 50  0000 R CNN
+F 2 "" H 4150 3300 29  0000 C CNN
+F 3 "" H 3950 3200 60  0000 C CNN
+	1    3950 3200
+	1    0    0    1   
+$EndComp
+$Comp
+L eSim_NPN Q3
+U 1 1 5CE90A7F
+P 3300 4000
+F 0 "Q3" H 3200 4050 50  0000 R CNN
+F 1 "eSim_NPN" H 3250 4150 50  0000 R CNN
+F 2 "" H 3500 4100 29  0000 C CNN
+F 3 "" H 3300 4000 60  0000 C CNN
+	1    3300 4000
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_PNP Q4
+U 1 1 5CE90A80
+P 3850 2000
+F 0 "Q4" H 3750 2050 50  0000 R CNN
+F 1 "eSim_PNP" H 3800 2150 50  0000 R CNN
+F 2 "" H 4050 2100 29  0000 C CNN
+F 3 "" H 3850 2000 60  0000 C CNN
+	1    3850 2000
+	-1   0    0    1   
+$EndComp
+$Comp
+L eSim_PNP Q9
+U 1 1 5CE90A81
+P 5200 2000
+F 0 "Q9" H 5100 2050 50  0000 R CNN
+F 1 "eSim_PNP" H 5150 2150 50  0000 R CNN
+F 2 "" H 5400 2100 29  0000 C CNN
+F 3 "" H 5200 2000 60  0000 C CNN
+	1    5200 2000
+	1    0    0    1   
+$EndComp
+$Comp
+L eSim_NPN Q8
+U 1 1 5CE90A82
+P 3950 4600
+F 0 "Q8" H 3850 4650 50  0000 R CNN
+F 1 "eSim_NPN" H 3900 4750 50  0000 R CNN
+F 2 "" H 4150 4700 29  0000 C CNN
+F 3 "" H 3950 4600 60  0000 C CNN
+	1    3950 4600
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_NPN Q7
+U 1 1 5CE90A83
+P 3000 4600
+F 0 "Q7" H 2900 4650 50  0000 R CNN
+F 1 "eSim_NPN" H 2950 4750 50  0000 R CNN
+F 2 "" H 3200 4700 29  0000 C CNN
+F 3 "" H 3000 4600 60  0000 C CNN
+	1    3000 4600
+	-1   0    0    -1  
+$EndComp
+$Comp
+L eSim_R R1
+U 1 1 5CE90A84
+P 2850 5200
+F 0 "R1" H 2900 5330 50  0000 C CNN
+F 1 "1k" H 2900 5250 50  0000 C CNN
+F 2 "" H 2900 5180 30  0000 C CNN
+F 3 "" V 2900 5250 30  0000 C CNN
+	1    2850 5200
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_R R2
+U 1 1 5CE90A85
+P 3550 5200
+F 0 "R2" H 3600 5330 50  0000 C CNN
+F 1 "50k" H 3600 5250 50  0000 C CNN
+F 2 "" H 3600 5180 30  0000 C CNN
+F 3 "" V 3600 5250 30  0000 C CNN
+	1    3550 5200
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_R R3
+U 1 1 5CE90A86
+P 4000 5200
+F 0 "R3" H 4050 5330 50  0000 C CNN
+F 1 "1k" H 4050 5250 50  0000 C CNN
+F 2 "" H 4050 5180 30  0000 C CNN
+F 3 "" V 4050 5250 30  0000 C CNN
+	1    4000 5200
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_NPN Q12
+U 1 1 5CE90A87
+P 6300 4700
+F 0 "Q12" H 6200 4750 50  0000 R CNN
+F 1 "eSim_NPN" H 6250 4850 50  0000 R CNN
+F 2 "" H 6500 4800 29  0000 C CNN
+F 3 "" H 6300 4700 60  0000 C CNN
+	1    6300 4700
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_NPN Q13
+U 1 1 5CE90A88
+P 5400 4700
+F 0 "Q13" H 5300 4750 50  0000 R CNN
+F 1 "eSim_NPN" H 5350 4850 50  0000 R CNN
+F 2 "" H 5600 4800 29  0000 C CNN
+F 3 "" H 5400 4700 60  0000 C CNN
+	1    5400 4700
+	-1   0    0    -1  
+$EndComp
+$Comp
+L eSim_R R4
+U 1 1 5CE90A89
+P 5250 5200
+F 0 "R4" H 5300 5330 50  0000 C CNN
+F 1 "5k" H 5300 5250 50  0000 C CNN
+F 2 "" H 5300 5180 30  0000 C CNN
+F 3 "" V 5300 5250 30  0000 C CNN
+	1    5250 5200
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_R R11
+U 1 1 5CE90A8A
+P 6350 2750
+F 0 "R11" H 6400 2880 50  0000 C CNN
+F 1 "39k" H 6400 2800 50  0000 C CNN
+F 2 "" H 6400 2730 30  0000 C CNN
+F 3 "" V 6400 2800 30  0000 C CNN
+	1    6350 2750
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_PNP Q10
+U 1 1 5CE90A8B
+P 6500 1950
+F 0 "Q10" H 6400 2000 50  0000 R CNN
+F 1 "eSim_PNP" H 6450 2100 50  0000 R CNN
+F 2 "" H 6700 2050 29  0000 C CNN
+F 3 "" H 6500 1950 60  0000 C CNN
+	1    6500 1950
+	-1   0    0    1   
+$EndComp
+$Comp
+L eSim_PNP Q11
+U 1 1 5CE90A8C
+P 7500 1950
+F 0 "Q11" H 7400 2000 50  0000 R CNN
+F 1 "eSim_PNP" H 7450 2100 50  0000 R CNN
+F 2 "" H 7700 2050 29  0000 C CNN
+F 3 "" H 7500 1950 60  0000 C CNN
+	1    7500 1950
+	1    0    0    1   
+$EndComp
+$Comp
+L eSim_NPN Q14
+U 1 1 5CE90A8D
+P 7500 3050
+F 0 "Q14" H 7400 3100 50  0000 R CNN
+F 1 "eSim_NPN" H 7450 3200 50  0000 R CNN
+F 2 "" H 7700 3150 29  0000 C CNN
+F 3 "" H 7500 3050 60  0000 C CNN
+	1    7500 3050
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_R R8
+U 1 1 5CE90A8E
+P 7300 2600
+F 0 "R8" H 7350 2730 50  0000 C CNN
+F 1 "4.5k" H 7350 2650 50  0000 C CNN
+F 2 "" H 7350 2580 30  0000 C CNN
+F 3 "" V 7350 2650 30  0000 C CNN
+	1    7300 2600
+	-1   0    0    1   
+$EndComp
+$Comp
+L eSim_R R7
+U 1 1 5CE90A8F
+P 7300 3400
+F 0 "R7" H 7350 3530 50  0000 C CNN
+F 1 "7.5k" H 7350 3450 50  0000 C CNN
+F 2 "" H 7350 3380 30  0000 C CNN
+F 3 "" V 7350 3450 30  0000 C CNN
+	1    7300 3400
+	-1   0    0    1   
+$EndComp
+$Comp
+L eSim_C C1
+U 1 1 5CE90A90
+P 6600 3200
+F 0 "C1" H 6625 3300 50  0000 L CNN
+F 1 "30p" H 6625 3100 50  0000 L CNN
+F 2 "" H 6638 3050 30  0000 C CNN
+F 3 "" H 6600 3200 60  0000 C CNN
+	1    6600 3200
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_NPN Q16
+U 1 1 5CE90A91
+P 7050 3950
+F 0 "Q16" H 6950 4000 50  0000 R CNN
+F 1 "eSim_NPN" H 7000 4100 50  0000 R CNN
+F 2 "" H 7250 4050 29  0000 C CNN
+F 3 "" H 7050 3950 60  0000 C CNN
+	1    7050 3950
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_NPN Q15
+U 1 1 5CE90A92
+P 7500 4300
+F 0 "Q15" H 7400 4350 50  0000 R CNN
+F 1 "eSim_NPN" H 7450 4450 50  0000 R CNN
+F 2 "" H 7700 4400 29  0000 C CNN
+F 3 "" H 7500 4300 60  0000 C CNN
+	1    7500 4300
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_R R5
+U 1 1 5CE90A93
+P 7100 5050
+F 0 "R5" H 7150 5180 50  0000 C CNN
+F 1 "50k" H 7150 5100 50  0000 C CNN
+F 2 "" H 7150 5030 30  0000 C CNN
+F 3 "" V 7150 5100 30  0000 C CNN
+	1    7100 5050
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_R R6
+U 1 1 5CE90A94
+P 7550 5050
+F 0 "R6" H 7600 5180 50  0000 C CNN
+F 1 "50" H 7600 5100 50  0000 C CNN
+F 2 "" H 7600 5030 30  0000 C CNN
+F 3 "" V 7600 5100 30  0000 C CNN
+	1    7550 5050
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_NPN Q17
+U 1 1 5CE90A95
+P 6800 4700
+F 0 "Q17" H 6700 4750 50  0000 R CNN
+F 1 "eSim_NPN" H 6750 4850 50  0000 R CNN
+F 2 "" H 7000 4800 29  0000 C CNN
+F 3 "" H 6800 4700 60  0000 C CNN
+	1    6800 4700
+	-1   0    0    -1  
+$EndComp
+$Comp
+L eSim_NPN Q18
+U 1 1 5CE90A96
+P 8800 2300
+F 0 "Q18" H 8700 2350 50  0000 R CNN
+F 1 "eSim_NPN" H 8750 2450 50  0000 R CNN
+F 2 "" H 9000 2400 29  0000 C CNN
+F 3 "" H 8800 2300 60  0000 C CNN
+	1    8800 2300
+	1    0    0    -1  
+$EndComp
+$Comp
+L eSim_NPN Q20
+U 1 1 5CE90A97
+P 8400 2750
+F 0 "Q20" H 8300 2800 50  0000 R CNN
+F 1 "eSim_NPN" H 8350 2900 50  0000 R CNN
+F 2 "" H 8600 2850 29  0000 C CNN
+F 3 "" H 8400 2750 60  0000 C CNN
+	1    8400 2750
+	-1   0    0    -1  
+$EndComp
+$Comp
+L eSim_R R9
+U 1 1 5CE90A98
+P 8850 3000
+F 0 "R9" H 8900 3130 50  0000 C CNN
+F 1 "25" H 8900 3050 50  0000 C CNN
+F 2 "" H 8900 2980 30  0000 C CNN
+F 3 "" V 8900 3050 30  0000 C CNN
+	1    8850 3000
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_R R10
+U 1 1 5CE90A99
+P 8850 3750
+F 0 "R10" H 8900 3880 50  0000 C CNN
+F 1 "50" H 8900 3800 50  0000 C CNN
+F 2 "" H 8900 3730 30  0000 C CNN
+F 3 "" V 8900 3800 30  0000 C CNN
+	1    8850 3750
+	0    1    1    0   
+$EndComp
+$Comp
+L eSim_PNP Q19
+U 1 1 5CE90A9A
+P 8800 4600
+F 0 "Q19" H 8700 4650 50  0000 R CNN
+F 1 "eSim_PNP" H 8750 4750 50  0000 R CNN
+F 2 "" H 9000 4700 29  0000 C CNN
+F 3 "" H 8800 4600 60  0000 C CNN
+	1    8800 4600
+	1    0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 3 1 5CE90A9B
+P 1900 1200
+F 0 "U1" H 1950 1300 30  0000 C CNN
+F 1 "PORT" H 1900 1200 30  0000 C CNN
+F 2 "" H 1900 1200 60  0000 C CNN
+F 3 "" H 1900 1200 60  0000 C CNN
+	3    1900 1200
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 2 1 5CE90A9C
+P 4500 1050
+F 0 "U1" H 4550 1150 30  0000 C CNN
+F 1 "PORT" H 4500 1050 30  0000 C CNN
+F 2 "" H 4500 1050 60  0000 C CNN
+F 3 "" H 4500 1050 60  0000 C CNN
+	2    4500 1050
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 7 1 5CE90A9D
+P 9750 1650
+F 0 "U1" H 9800 1750 30  0000 C CNN
+F 1 "PORT" H 9750 1650 30  0000 C CNN
+F 2 "" H 9750 1650 60  0000 C CNN
+F 3 "" H 9750 1650 60  0000 C CNN
+	7    9750 1650
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 6 1 5CE90A9E
+P 9750 3500
+F 0 "U1" H 9800 3600 30  0000 C CNN
+F 1 "PORT" H 9750 3500 30  0000 C CNN
+F 2 "" H 9750 3500 60  0000 C CNN
+F 3 "" H 9750 3500 60  0000 C CNN
+	6    9750 3500
+	-1   0    0    1   
+$EndComp
+$Comp
+L PORT U1
+U 4 1 5CE90A9F
+P 9700 5550
+F 0 "U1" H 9750 5650 30  0000 C CNN
+F 1 "PORT" H 9700 5550 30  0000 C CNN
+F 2 "" H 9700 5550 60  0000 C CNN
+F 3 "" H 9700 5550 60  0000 C CNN
+	4    9700 5550
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	3200 3200 3750 3200
+Wire Wire Line
+	2750 2900 2750 2950
+Wire Wire Line
+	2750 2950 2900 2950
+Wire Wire Line
+	2900 2950 2900 3000
+Wire Wire Line
+	4200 2900 4200 2950
+Wire Wire Line
+	4200 2950 4050 2950
+Wire Wire Line
+	4050 2950 4050 3000
+Wire Wire Line
+	2900 3400 2900 4400
+Wire Wire Line
+	2900 4000 3100 4000
+Wire Wire Line
+	4200 2000 4200 2500
+Wire Wire Line
+	4200 2350 2750 2350
+Wire Wire Line
+	2750 2350 2750 2500
+Wire Wire Line
+	5000 2000 4050 2000
+Connection ~ 4200 2350
+Connection ~ 4200 2000
+Wire Wire Line
+	3750 2200 3750 2350
+Connection ~ 3750 2350
+Wire Wire Line
+	3750 1800 3750 1650
+Wire Wire Line
+	3400 1650 7600 1650
+Wire Wire Line
+	3400 1650 3400 3800
+Wire Wire Line
+	5300 1650 5300 1800
+Connection ~ 3750 1650
+Wire Wire Line
+	5300 2200 5300 4500
+Wire Wire Line
+	5300 3500 3650 3500
+Wire Wire Line
+	3650 3500 3650 3200
+Connection ~ 3650 3200
+Connection ~ 2900 4000
+Wire Wire Line
+	4050 4400 4050 3400
+Wire Wire Line
+	3400 4200 3400 4600
+Wire Wire Line
+	3200 4600 3750 4600
+Connection ~ 3400 4600
+Wire Wire Line
+	4050 5100 4050 4800
+Wire Wire Line
+	3600 5100 3600 4600
+Connection ~ 3600 4600
+Wire Wire Line
+	2900 5100 2900 4800
+Wire Wire Line
+	2900 5400 2900 5550
+Wire Wire Line
+	2900 5550 9450 5550
+Wire Wire Line
+	4050 5550 4050 5400
+Wire Wire Line
+	3600 5400 3600 5550
+Connection ~ 3600 5550
+Wire Wire Line
+	6100 4700 5600 4700
+Wire Wire Line
+	6400 2950 6400 4500
+Wire Wire Line
+	6400 4250 5900 4250
+Wire Wire Line
+	5900 4250 5900 4700
+Connection ~ 5900 4700
+Wire Wire Line
+	5300 5100 5300 4900
+Wire Wire Line
+	5300 5550 5300 5400
+Connection ~ 4050 5550
+Wire Wire Line
+	6400 5550 6400 4900
+Connection ~ 5300 5550
+Connection ~ 5300 3500
+Wire Wire Line
+	6400 1650 6400 1750
+Connection ~ 5300 1650
+Wire Wire Line
+	6400 2150 6400 2650
+Connection ~ 6400 4250
+Wire Wire Line
+	6700 1950 7300 1950
+Wire Wire Line
+	7000 1950 7000 2250
+Wire Wire Line
+	7000 2250 6400 2250
+Connection ~ 6400 2250
+Wire Wire Line
+	7600 1650 7600 1750
+Connection ~ 6400 1650
+Connection ~ 7000 1950
+Wire Wire Line
+	7600 3250 7600 4100
+Wire Wire Line
+	7600 3450 7400 3450
+Wire Wire Line
+	6900 3450 7100 3450
+Wire Wire Line
+	6900 2650 6900 3450
+Wire Wire Line
+	6900 3050 7300 3050
+Wire Wire Line
+	7600 2150 7600 2850
+Wire Wire Line
+	7600 2650 7400 2650
+Wire Wire Line
+	7100 2650 6900 2650
+Connection ~ 6900 3050
+Connection ~ 7600 2650
+Wire Wire Line
+	7300 4300 7150 4300
+Wire Wire Line
+	7150 4150 7150 4950
+Connection ~ 7600 3450
+Wire Wire Line
+	7600 3700 7150 3700
+Wire Wire Line
+	7150 3700 7150 3750
+Connection ~ 7600 3700
+Wire Wire Line
+	6600 3050 6600 2450
+Wire Wire Line
+	6600 2450 7600 2450
+Connection ~ 7600 2450
+Wire Wire Line
+	6600 3350 6600 3950
+Wire Wire Line
+	4050 3950 6850 3950
+Wire Wire Line
+	6700 3950 6700 4500
+Connection ~ 6700 3950
+Wire Wire Line
+	6700 4900 6700 5550
+Connection ~ 6400 5550
+Connection ~ 7150 4300
+Wire Wire Line
+	7600 4950 7600 4500
+Wire Wire Line
+	7000 4700 7600 4700
+Connection ~ 7600 4700
+Wire Wire Line
+	7600 5550 7600 5250
+Connection ~ 6700 5550
+Wire Wire Line
+	7150 5250 7150 5550
+Connection ~ 7150 5550
+Wire Wire Line
+	7600 2300 8600 2300
+Wire Wire Line
+	8300 2300 8300 2550
+Connection ~ 8300 2300
+Connection ~ 7600 2300
+Wire Wire Line
+	8900 2100 8900 1650
+Wire Wire Line
+	7550 1650 9500 1650
+Connection ~ 7550 1650
+Connection ~ 8900 1650
+Wire Wire Line
+	8900 2500 8900 2900
+Wire Wire Line
+	8900 2750 8600 2750
+Connection ~ 8900 2750
+Wire Wire Line
+	8300 2950 8300 3350
+Wire Wire Line
+	8300 3350 8900 3350
+Wire Wire Line
+	8900 3200 8900 3650
+Wire Wire Line
+	8900 4400 8900 3950
+Connection ~ 8900 3350
+Wire Wire Line
+	8900 3500 9500 3500
+Connection ~ 8900 3500
+Wire Wire Line
+	8900 5550 8900 4800
+Connection ~ 7600 5550
+Connection ~ 8900 5550
+Wire Wire Line
+	8600 4600 8100 4600
+Wire Wire Line
+	8100 4600 8100 3850
+Wire Wire Line
+	8100 3850 7600 3850
+Connection ~ 7600 3850
+Connection ~ 4050 3950
+Connection ~ 6600 3950
+Wire Wire Line
+	4500 2700 4750 2700
+Wire Wire Line
+	4750 2700 4750 1050
+Wire Wire Line
+	2450 2700 2150 2700
+Wire Wire Line
+	2150 2700 2150 1200
+$Comp
+L PORT U1
+U 5 1 5CE90AA0
+P 1850 4850
+F 0 "U1" H 1900 4950 30  0000 C CNN
+F 1 "PORT" H 1850 4850 30  0000 C CNN
+F 2 "" H 1850 4850 60  0000 C CNN
+F 3 "" H 1850 4850 60  0000 C CNN
+	5    1850 4850
+	1    0    0    -1  
+$EndComp
+$Comp
+L PORT U1
+U 1 1 5CE90AA1
+P 1850 5100
+F 0 "U1" H 1900 5200 30  0000 C CNN
+F 1 "PORT" H 1850 5100 30  0000 C CNN
+F 2 "" H 1850 5100 60  0000 C CNN
+F 3 "" H 1850 5100 60  0000 C CNN
+	1    1850 5100
+	1    0    0    -1  
+$EndComp
+Wire Wire Line
+	2100 5100 2700 5100
+Wire Wire Line
+	2700 5100 2700 5050
+Wire Wire Line
+	2700 5050 2900 5050
+Connection ~ 2900 5050
+Wire Wire Line
+	2100 4850 2550 4850
+Wire Wire Line
+	2550 4850 2550 4900
+Wire Wire Line
+	2550 4900 4050 4900
+Connection ~ 4050 4900
+$Comp
+L PORT U1
+U 8 1 5CE9368F
+P 9600 6050
+F 0 "U1" H 9650 6150 30  0000 C CNN
+F 1 "PORT" H 9600 6050 30  0000 C CNN
+F 2 "" H 9600 6050 60  0000 C CNN
+F 3 "" H 9600 6050 60  0000 C CNN
+	8    9600 6050
+	-1   0    0    1   
+$EndComp
+Wire Wire Line
+	9350 6050 9100 6050
+NoConn ~ 9100 6050
+$EndSCHEMATC
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/lm_741.sub b/library/SubcircuitLibrary/Diffamp_INA106/lm_741.sub
new file mode 100644
index 00000000..fa8d27b1
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/lm_741.sub
@@ -0,0 +1,40 @@
+* Subcircuit lm_741
+.subckt lm_741 net-_q7-pad3_ net-_q2-pad2_ net-_q1-pad2_ net-_q12-pad3_ net-_q8-pad3_ net-_q20-pad3_ net-_q10-pad3_ ? 
+* c:\users\malli\esim\src\subcircuitlibrary\lm_741\lm_741.cir
+.include npn_1.lib
+.include pnp_1.lib
+q1 net-_q1-pad1_ net-_q1-pad2_ net-_q1-pad3_ npn_1
+q2 net-_q1-pad1_ net-_q2-pad2_ net-_q2-pad3_ npn_1
+q6 net-_q3-pad2_ net-_q13-pad1_ net-_q1-pad3_ pnp_1
+q5 net-_c1-pad2_ net-_q13-pad1_ net-_q2-pad3_ pnp_1
+q3 net-_q10-pad3_ net-_q3-pad2_ net-_q3-pad3_ npn_1
+q4 net-_q1-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q9 net-_q13-pad1_ net-_q1-pad1_ net-_q10-pad3_ pnp_1
+q8 net-_c1-pad2_ net-_q3-pad3_ net-_q8-pad3_ npn_1
+q7 net-_q3-pad2_ net-_q3-pad3_ net-_q7-pad3_ npn_1
+r1  net-_q7-pad3_ net-_q12-pad3_ 1k
+r2  net-_q3-pad3_ net-_q12-pad3_ 50k
+r3  net-_q8-pad3_ net-_q12-pad3_ 1k
+q12 net-_q12-pad1_ net-_q12-pad1_ net-_q12-pad3_ npn_1
+q13 net-_q13-pad1_ net-_q12-pad1_ net-_q13-pad3_ npn_1
+r4  net-_q13-pad3_ net-_q12-pad3_ 5k
+r11  net-_q10-pad1_ net-_q12-pad1_ 39k
+q10 net-_q10-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q11 net-_c1-pad1_ net-_q10-pad1_ net-_q10-pad3_ pnp_1
+q14 net-_c1-pad1_ net-_q14-pad2_ net-_q14-pad3_ npn_1
+r8  net-_c1-pad1_ net-_q14-pad2_ 4.5k
+r7  net-_q14-pad3_ net-_q14-pad2_ 7.5k
+c1  net-_c1-pad1_ net-_c1-pad2_ 30p
+q16 net-_q14-pad3_ net-_c1-pad2_ net-_q15-pad2_ npn_1
+q15 net-_q14-pad3_ net-_q15-pad2_ net-_q15-pad3_ npn_1
+r5  net-_q15-pad2_ net-_q12-pad3_ 50k
+r6  net-_q15-pad3_ net-_q12-pad3_ 50
+q17 net-_c1-pad2_ net-_q15-pad3_ net-_q12-pad3_ npn_1
+q18 net-_q10-pad3_ net-_c1-pad1_ net-_q18-pad3_ npn_1
+q20 net-_c1-pad1_ net-_q18-pad3_ net-_q20-pad3_ npn_1
+r9  net-_q18-pad3_ net-_q20-pad3_ 25
+r10  net-_q20-pad3_ net-_q19-pad3_ 50
+q19 net-_q12-pad3_ net-_q14-pad3_ net-_q19-pad3_ pnp_1
+* Control Statements
+
+.ends lm_741
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/lm_741_Previous_Values.xml b/library/SubcircuitLibrary/Diffamp_INA106/lm_741_Previous_Values.xml
new file mode 100644
index 00000000..b61322bb
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/lm_741_Previous_Values.xml
@@ -0,0 +1 @@
+<KicadtoNgspice><source /><model /><devicemodel><q1><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q1><q20><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q20><q3><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q3><q2><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q2><q5><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q5><q4><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q4><q7><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q7><q6><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q6><q9><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q9><q8><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q8><q15><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q15><q14><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q14><q17><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q17><q16><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q16><q11><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q11><q10><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q10><q13><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q13><q12><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q12><q19><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/pnp_1.lib</field></q19><q18><field>C:/Users/malli/eSim/src/deviceModelLibrary/Transistor/npn_1.lib</field></q18></devicemodel><subcircuit /><analysis><ac><field1 name="Lin">true</field1><field2 name="Dec">false</field2><field3 name="Oct">false</field3><field4 name="Start Frequency" /><field5 name="Stop Frequency" /><field6 name="No. of points" /><field7 name="Start Fre Combo">Hz</field7><field8 name="Stop Fre Combo">Hz</field8></ac><dc><field1 name="Source 1" /><field2 name="Start" /><field3 name="Increment" /><field4 name="Stop" /><field5 name="Operating Point">0</field5><field6 name="Start Combo">Volts or Amperes</field6><field7 name="Increment Combo">Volts or Amperes</field7><field8 name="Stop Combo">Volts or Amperes</field8><field9 name="Source 2" /><field10 name="Start" /><field11 name="Increment" /><field12 name="Stop" /><field13 name="Start Combo">Volts or Amperes</field13><field14 name="Increment Combo">Volts or Amperes</field14><field15 name="Stop Combo">Volts or Amperes</field15></dc><tran><field1 name="Start Time" /><field2 name="Step Time" /><field3 name="Stop Time" /><field4 name="Start Combo">Sec</field4><field5 name="Step Combo">Sec</field5><field6 name="Stop Combo">Sec</field6></tran></analysis></KicadtoNgspice>
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/npn_1.lib b/library/SubcircuitLibrary/Diffamp_INA106/npn_1.lib
new file mode 100644
index 00000000..a1818ed8
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/npn_1.lib
@@ -0,0 +1,29 @@
+.model npn_1 NPN(
++ Vtf=1.7 
++ Cjc=0.5p
++ Nc=2 
++ Tr=46.91n 
++ Ne=1.307 
++ Cje=0.5p
++ Isc=0 
++ Xtb=1.5 
++ Rb=500
++ Rc=1 
++ Tf=411.1p 
++ Xti=3 
++ Ikr=0 
++ Bf=125
++ Fc=.5 
++ Ise=14.34f 
++ Br=6.092 
++ Ikf=.2847 
++ Mje=.377 
++ Mjc=.3416 
++ Vaf=74.03 
++ Vjc=.75 
++ Vje=.75 
++ Xtf=3 
++ Itf=.6 
++ Is=14.34f 
++ Eg=1.11 
+)
\ No newline at end of file
diff --git a/library/SubcircuitLibrary/Diffamp_INA106/pnp_1.lib b/library/SubcircuitLibrary/Diffamp_INA106/pnp_1.lib
new file mode 100644
index 00000000..a4ee06da
--- /dev/null
+++ b/library/SubcircuitLibrary/Diffamp_INA106/pnp_1.lib
@@ -0,0 +1,29 @@
+.model pnp_1 PNP(
++ Vtf=1.7 
++ Cjc=1.5p
++ Nc=2 
++ Tr=46.91n 
++ Ne=1.307 
++ Cje=0.3p
++ Isc=0 
++ Xtb=1.5 
++ Rb=250
++ Rc=1 
++ Tf=411.1p 
++ Xti=3 
++ Ikr=0 
++ Bf=25
++ Fc=.5 
++ Ise=14.34f 
++ Br=6.092 
++ Ikf=.2847 
++ Mje=.377 
++ Mjc=.3416 
++ Vaf=74.03 
++ Vjc=.75 
++ Vje=.75 
++ Xtf=3 
++ Itf=.6 
++ Is=14.34f 
++ Eg=1.11 
+)
\ No newline at end of file