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| author | Saurabh Bansode | 2020-04-24 11:51:22 +0530 |
|---|---|---|
| committer | GitHub | 2020-04-24 11:51:22 +0530 |
| commit | a35d497b81023950a6e675536f9cd4bf895983c2 (patch) | |
| tree | 2329f74685827e8e88aae6c4dad1caee797fecbd /library/SubcircuitLibrary/CMOS_NAND/CMOS_NAND.cir | |
| parent | b8097333ca26b380180de0de18a987e0db292927 (diff) | |
| parent | e279dc2d5fa948fc3e9491d0d36dd42f88a8ecad (diff) | |
| download | eSim-a35d497b81023950a6e675536f9cd4bf895983c2.tar.gz eSim-a35d497b81023950a6e675536f9cd4bf895983c2.tar.bz2 eSim-a35d497b81023950a6e675536f9cd4bf895983c2.zip | |
Merge pull request #152 from saurabhb17/master
Subcircuit for CMOS based NAND gate and its supporting example
Diffstat (limited to 'library/SubcircuitLibrary/CMOS_NAND/CMOS_NAND.cir')
| -rw-r--r-- | library/SubcircuitLibrary/CMOS_NAND/CMOS_NAND.cir | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CMOS_NAND/CMOS_NAND.cir b/library/SubcircuitLibrary/CMOS_NAND/CMOS_NAND.cir new file mode 100644 index 00000000..92015d1f --- /dev/null +++ b/library/SubcircuitLibrary/CMOS_NAND/CMOS_NAND.cir @@ -0,0 +1,16 @@ +* C:\FOSSEE\eSim\library\SubcircuitLibrary\CMOS_NAND\CMOS_NAND.cir
+
+* EESchema Netlist Version 1.1 (Spice format) creation date: 04/23/20 20:21:59
+
+* To exclude a component from the Spice Netlist add [Spice_Netlist_Enabled] user FIELD set to: N
+* To reorder the component spice node sequence add [Spice_Node_Sequence] user FIELD and define sequence: 2,1,0
+
+* Sheet Name: /
+M1 Net-_M1-Pad1_ Net-_M1-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad1_ eSim_MOS_P
+M4 Net-_M1-Pad1_ Net-_M3-Pad2_ Net-_M1-Pad3_ Net-_M1-Pad1_ eSim_MOS_P
+M2 Net-_M1-Pad3_ Net-_M1-Pad2_ Net-_M2-Pad3_ GND eSim_MOS_N
+M3 Net-_M2-Pad3_ Net-_M3-Pad2_ GND GND eSim_MOS_N
+U1 Net-_M1-Pad2_ Net-_M3-Pad2_ Net-_M1-Pad3_ PORT
+v1 Net-_M1-Pad1_ GND DC
+
+.end
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