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author | Sumanto Kar | 2023-05-04 12:25:41 +0530 |
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committer | GitHub | 2023-05-04 12:25:41 +0530 |
commit | 4f21a7fa863aebf0d44af34417c341d6fc475052 (patch) | |
tree | c4b7cb04c78c1a334c963a1d4e4d5a6e43f19e58 /library/SubcircuitLibrary/CD_4081/CD_4081.sub | |
parent | dbebfaea6ae619dfcbfe239bc2cdff07beb57857 (diff) | |
parent | 0fa7cd5ab4a888272d03ad47d0eabfc9095bbbbb (diff) | |
download | eSim-4f21a7fa863aebf0d44af34417c341d6fc475052.tar.gz eSim-4f21a7fa863aebf0d44af34417c341d6fc475052.tar.bz2 eSim-4f21a7fa863aebf0d44af34417c341d6fc475052.zip |
Merge pull request #219 from AnkushECE/master
Sub circuit files for AD620, LM7809, LM386, CD40XX family and CD54HC15X MUX family
Diffstat (limited to 'library/SubcircuitLibrary/CD_4081/CD_4081.sub')
-rw-r--r-- | library/SubcircuitLibrary/CD_4081/CD_4081.sub | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD_4081/CD_4081.sub b/library/SubcircuitLibrary/CD_4081/CD_4081.sub new file mode 100644 index 00000000..f5050506 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4081/CD_4081.sub @@ -0,0 +1,32 @@ +* Subcircuit CD_4081 +.subckt CD_4081 net-_m2-pad2_ net-_m6-pad2_ net-_m10-pad1_ net-_m23-pad1_ net-_m14-pad2_ net-_m18-pad2_ net-_m10-pad3_ net-_m13-pad2_ net-_m16-pad2_ net-_m21-pad1_ net-_m11-pad1_ net-_m1-pad2_ net-_m4-pad2_ net-_m1-pad3_ +* c:\fossee\esim\library\subcircuitlibrary\cd_4081\cd_4081.cir +.include NMOS-180nm.lib +.include PMOS-180nm.lib +m10 net-_m10-pad1_ net-_m10-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m8 net-_m10-pad2_ net-_m6-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m2 net-_m10-pad2_ net-_m2-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m12 net-_m10-pad1_ net-_m10-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m5 net-_m10-pad2_ net-_m2-pad2_ net-_m5-pad3_ net-_m5-pad3_ CMOSN W=100u L=100u M=1 +m6 net-_m5-pad3_ net-_m6-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m23 net-_m23-pad1_ net-_m14-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m20 net-_m14-pad1_ net-_m18-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m14 net-_m14-pad1_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m24 net-_m23-pad1_ net-_m14-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m17 net-_m14-pad1_ net-_m14-pad2_ net-_m17-pad3_ net-_m17-pad3_ CMOSN W=100u L=100u M=1 +m18 net-_m17-pad3_ net-_m18-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m9 net-_m11-pad1_ net-_m1-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m7 net-_m1-pad1_ net-_m4-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m11 net-_m11-pad1_ net-_m1-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m3 net-_m1-pad1_ net-_m1-pad2_ net-_m3-pad3_ net-_m3-pad3_ CMOSN W=100u L=100u M=1 +m4 net-_m3-pad3_ net-_m4-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m21 net-_m21-pad1_ net-_m13-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m19 net-_m13-pad1_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m13 net-_m13-pad1_ net-_m13-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m22 net-_m21-pad1_ net-_m13-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m15 net-_m13-pad1_ net-_m13-pad2_ net-_m15-pad3_ net-_m15-pad3_ CMOSN W=100u L=100u M=1 +m16 net-_m15-pad3_ net-_m16-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +* Control Statements + +.ends CD_4081
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