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| author | AnkushECE | 2022-08-24 22:59:43 +0530 |
|---|---|---|
| committer | AnkushECE | 2022-08-24 22:59:43 +0530 |
| commit | 17da1ca53183d152c61ec720a975b87ddbdb4d06 (patch) | |
| tree | 24522d0f130a22f562819fda314f23064e6ecbb7 /library/SubcircuitLibrary/CD_4081/CD_4081.cir.out | |
| parent | 8144a629b934a21f3df7bb71215311e9b5b5e8cb (diff) | |
| download | eSim-17da1ca53183d152c61ec720a975b87ddbdb4d06.tar.gz eSim-17da1ca53183d152c61ec720a975b87ddbdb4d06.tar.bz2 eSim-17da1ca53183d152c61ec720a975b87ddbdb4d06.zip | |
CD4081 is AND gate IC.
Diffstat (limited to 'library/SubcircuitLibrary/CD_4081/CD_4081.cir.out')
| -rw-r--r-- | library/SubcircuitLibrary/CD_4081/CD_4081.cir.out | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/library/SubcircuitLibrary/CD_4081/CD_4081.cir.out b/library/SubcircuitLibrary/CD_4081/CD_4081.cir.out new file mode 100644 index 00000000..b4c78312 --- /dev/null +++ b/library/SubcircuitLibrary/CD_4081/CD_4081.cir.out @@ -0,0 +1,38 @@ +* c:\fossee\esim\library\subcircuitlibrary\cd_4081\cd_4081.cir + +.include NMOS-180nm.lib +.include PMOS-180nm.lib +m10 net-_m10-pad1_ net-_m10-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m8 net-_m10-pad2_ net-_m6-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m2 net-_m10-pad2_ net-_m2-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m12 net-_m10-pad1_ net-_m10-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m5 net-_m10-pad2_ net-_m2-pad2_ net-_m5-pad3_ net-_m5-pad3_ CMOSN W=100u L=100u M=1 +m6 net-_m5-pad3_ net-_m6-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m23 net-_m23-pad1_ net-_m14-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m20 net-_m14-pad1_ net-_m18-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m14 net-_m14-pad1_ net-_m14-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m24 net-_m23-pad1_ net-_m14-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m17 net-_m14-pad1_ net-_m14-pad2_ net-_m17-pad3_ net-_m17-pad3_ CMOSN W=100u L=100u M=1 +m18 net-_m17-pad3_ net-_m18-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m9 net-_m11-pad1_ net-_m1-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m7 net-_m1-pad1_ net-_m4-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m1 net-_m1-pad1_ net-_m1-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m11 net-_m11-pad1_ net-_m1-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m3 net-_m1-pad1_ net-_m1-pad2_ net-_m3-pad3_ net-_m3-pad3_ CMOSN W=100u L=100u M=1 +m4 net-_m3-pad3_ net-_m4-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m21 net-_m21-pad1_ net-_m13-pad1_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +m19 net-_m13-pad1_ net-_m16-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m13 net-_m13-pad1_ net-_m13-pad2_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m22 net-_m21-pad1_ net-_m13-pad1_ net-_m1-pad3_ net-_m1-pad3_ CMOSP W=100u L=100u M=1 +m15 net-_m13-pad1_ net-_m13-pad2_ net-_m15-pad3_ net-_m15-pad3_ CMOSN W=100u L=100u M=1 +m16 net-_m15-pad3_ net-_m16-pad2_ net-_m10-pad3_ net-_m10-pad3_ CMOSN W=100u L=100u M=1 +* u1 net-_m2-pad2_ net-_m6-pad2_ net-_m10-pad1_ net-_m23-pad1_ net-_m14-pad2_ net-_m18-pad2_ net-_m10-pad3_ net-_m13-pad2_ net-_m16-pad2_ net-_m21-pad1_ net-_m11-pad1_ net-_m1-pad2_ net-_m4-pad2_ net-_m1-pad3_ port +.tran 0e-00 0e-00 0e-00 + +* Control Statements +.control +run +print allv > plot_data_v.txt +print alli > plot_data_i.txt +.endc +.end |